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189 lines
4.8 KiB
189 lines
4.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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#include <dt-bindings/clock/tegra234-clock.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/mailbox/tegra186-hsp.h> |
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#include <dt-bindings/reset/tegra234-reset.h> |
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/ { |
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compatible = "nvidia,tegra234"; |
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interrupt-parent = <&gic>; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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bus@0 { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0x0 0x0 0x0 0x40000000>; |
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misc@100000 { |
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compatible = "nvidia,tegra234-misc"; |
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reg = <0x00100000 0xf000>, |
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<0x0010f000 0x1000>; |
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status = "okay"; |
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}; |
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uarta: serial@3100000 { |
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compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart"; |
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reg = <0x03100000 0x10000>; |
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&bpmp TEGRA234_CLK_UARTA>; |
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clock-names = "serial"; |
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resets = <&bpmp TEGRA234_RESET_UARTA>; |
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reset-names = "serial"; |
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status = "disabled"; |
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}; |
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mmc@3460000 { |
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compatible = "nvidia,tegra234-sdhci", "nvidia,tegra186-sdhci"; |
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reg = <0x03460000 0x20000>; |
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&bpmp TEGRA234_CLK_SDMMC4>; |
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clock-names = "sdhci"; |
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resets = <&bpmp TEGRA234_RESET_SDMMC4>; |
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reset-names = "sdhci"; |
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dma-coherent; |
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status = "disabled"; |
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}; |
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fuse@3810000 { |
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compatible = "nvidia,tegra234-efuse"; |
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reg = <0x03810000 0x10000>; |
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clocks = <&bpmp TEGRA234_CLK_FUSE>; |
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clock-names = "fuse"; |
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}; |
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hsp_top0: hsp@3c00000 { |
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compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp"; |
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reg = <0x03c00000 0xa0000>; |
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; |
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interrupt-names = "doorbell", "shared0", "shared1", "shared2", |
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"shared3", "shared4", "shared5", "shared6", |
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"shared7"; |
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#mbox-cells = <2>; |
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}; |
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hsp_aon: hsp@c150000 { |
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compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp"; |
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reg = <0x0c150000 0x90000>; |
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; |
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/* |
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* Shared interrupt 0 is routed only to AON/SPE, so |
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* we only have 4 shared interrupts for the CCPLEX. |
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*/ |
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interrupt-names = "shared1", "shared2", "shared3", "shared4"; |
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#mbox-cells = <2>; |
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}; |
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rtc@c2a0000 { |
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compatible = "nvidia,tegra234-rtc", "nvidia,tegra20-rtc"; |
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reg = <0x0c2a0000 0x10000>; |
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interrupt-parent = <&pmc>; |
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interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; |
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status = "disabled"; |
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}; |
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pmc: pmc@c360000 { |
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compatible = "nvidia,tegra234-pmc"; |
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reg = <0x0c360000 0x10000>, |
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<0x0c370000 0x10000>, |
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<0x0c380000 0x10000>, |
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<0x0c390000 0x10000>, |
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<0x0c3a0000 0x10000>; |
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reg-names = "pmc", "wake", "aotag", "scratch", "misc"; |
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#interrupt-cells = <2>; |
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interrupt-controller; |
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}; |
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gic: interrupt-controller@f400000 { |
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compatible = "arm,gic-v3"; |
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reg = <0x0f400000 0x010000>, /* GICD */ |
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<0x0f440000 0x200000>; /* GICR */ |
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interrupt-parent = <&gic>; |
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
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#redistributor-regions = <1>; |
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#interrupt-cells = <3>; |
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interrupt-controller; |
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}; |
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}; |
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sysram@40000000 { |
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compatible = "nvidia,tegra234-sysram", "mmio-sram"; |
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reg = <0x0 0x40000000 0x0 0x50000>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0x0 0x0 0x40000000 0x50000>; |
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cpu_bpmp_tx: shmem@4e000 { |
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reg = <0x4e000 0x1000>; |
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label = "cpu-bpmp-tx"; |
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pool; |
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}; |
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cpu_bpmp_rx: shmem@4f000 { |
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reg = <0x4f000 0x1000>; |
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label = "cpu-bpmp-rx"; |
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pool; |
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}; |
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}; |
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bpmp: bpmp { |
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compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp"; |
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mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB |
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TEGRA_HSP_DB_MASTER_BPMP>; |
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shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; |
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#clock-cells = <1>; |
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#reset-cells = <1>; |
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#power-domain-cells = <1>; |
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bpmp_i2c: i2c { |
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compatible = "nvidia,tegra186-bpmp-i2c"; |
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nvidia,bpmp-bus-id = <5>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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}; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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device_type = "cpu"; |
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reg = <0x000>; |
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enable-method = "psci"; |
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}; |
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}; |
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psci { |
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compatible = "arm,psci-1.0"; |
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status = "okay"; |
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method = "smc"; |
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}; |
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timer { |
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compatible = "arm,armv8-timer"; |
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
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interrupt-parent = <&gic>; |
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always-on; |
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}; |
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};
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