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871 lines
18 KiB
871 lines
18 KiB
// SPDX-License-Identifier: (GPL-2.0 OR MIT) |
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/* |
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* Copyright (C) 2019 Zodiac Inflight Innovations |
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*/ |
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#include "imx8mq.dtsi" |
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/ { |
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aliases { |
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mdio-gpio0 = &mdio0; |
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rtc0 = &ds1341; |
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}; |
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chosen { |
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stdout-path = &uart1; |
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}; |
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mdio0: bitbang-mdio { |
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compatible = "virtual,mdio-gpio"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_mdio_bitbang>, <&pinctrl_fec1_phy_reset>; |
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gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>, /* MDC */ |
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<&gpio1 14 GPIO_ACTIVE_HIGH>; /* MDIO */ |
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#address-cells = <1>; |
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#size-cells = <0>; |
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phy0: ethernet-phy@0 { |
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reg = <0>; |
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reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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pcie0_refclk: clock-pcie0-refclk { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <100000000>; |
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}; |
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pcie1_refclk: clock-pcie1-refclk { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <100000000>; |
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}; |
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reg_12p0_main: regulator-12p0-main { |
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compatible = "regulator-fixed"; |
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regulator-name = "12V_MAIN"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-always-on; |
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}; |
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reg_5p0_main: regulator-5p0-main { |
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compatible = "regulator-fixed"; |
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vin-supply = <®_12p0_main>; |
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regulator-name = "5V_MAIN"; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-always-on; |
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}; |
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reg_3p3_main: regulator-3p3-main { |
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compatible = "regulator-fixed"; |
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vin-supply = <®_12p0_main>; |
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regulator-name = "3V3_MAIN"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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}; |
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reg_gen_3p3: regulator-gen-3p3 { |
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compatible = "regulator-fixed"; |
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vin-supply = <®_3p3_main>; |
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regulator-name = "GEN_3V3"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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}; |
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reg_3p3v: regulator-3p3v { |
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compatible = "regulator-fixed"; |
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vin-supply = <®_3p3_main>; |
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regulator-name = "GEN_3V3"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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}; |
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reg_usdhc2_vmmc: regulator-vsd-3v3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_reg_usdhc2>; |
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compatible = "regulator-fixed"; |
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vin-supply = <®_gen_3p3>; |
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regulator-name = "3V3_SD"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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}; |
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reg_arm: regulator-arm { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_reg_arm>; |
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compatible = "regulator-gpio"; |
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vin-supply = <®_12p0_main>; |
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regulator-name = "0V9_ARM"; |
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regulator-min-microvolt = <900000>; |
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regulator-max-microvolt = <1000000>; |
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gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; |
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states = <1000000 0x1 |
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900000 0x0>; |
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regulator-always-on; |
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}; |
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cs2000_ref: cs2000-ref { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <24576000>; |
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}; |
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cs2000_in_dummy: cs2000-in-dummy { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <0>; |
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}; |
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}; |
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&A53_0 { |
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cpu-supply = <®_arm>; |
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}; |
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&A53_1 { |
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cpu-supply = <®_arm>; |
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}; |
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&A53_2 { |
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cpu-supply = <®_arm>; |
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}; |
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&A53_3 { |
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cpu-supply = <®_arm>; |
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}; |
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&fec1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_fec1>; |
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phy-handle = <&phy0>; |
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phy-mode = "rmii"; |
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status = "okay"; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clock-frequency = <12500000>; |
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suppress-preamble; |
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status = "okay"; |
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switch: switch@0 { |
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compatible = "marvell,mv88e6085"; |
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pinctrl-0 = <&pinctrl_switch_irq>; |
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pinctrl-names = "default"; |
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reg = <0>; |
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dsa,member = <0 0>; |
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eeprom-length = <512>; |
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interrupt-parent = <&gpio1>; |
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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label = "gigabit_proc"; |
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phy-handle = <&switchphy0>; |
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}; |
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port@1 { |
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reg = <1>; |
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label = "netaux"; |
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phy-handle = <&switchphy1>; |
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}; |
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port@2 { |
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reg = <2>; |
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label = "cpu"; |
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ethernet = <&fec1>; |
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fixed-link { |
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speed = <100>; |
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full-duplex; |
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}; |
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}; |
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port@3 { |
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reg = <3>; |
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label = "netright"; |
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phy-handle = <&switchphy3>; |
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}; |
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port@4 { |
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reg = <4>; |
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label = "netleft"; |
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phy-handle = <&switchphy4>; |
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}; |
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}; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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switchphy0: switchphy@0 { |
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reg = <0>; |
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interrupt-parent = <&switch>; |
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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switchphy1: switchphy@1 { |
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reg = <1>; |
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interrupt-parent = <&switch>; |
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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switchphy2: switchphy@2 { |
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reg = <2>; |
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interrupt-parent = <&switch>; |
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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switchphy3: switchphy@3 { |
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reg = <3>; |
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interrupt-parent = <&switch>; |
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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switchphy4: switchphy@4 { |
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reg = <4>; |
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interrupt-parent = <&switch>; |
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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}; |
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}; |
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}; |
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}; |
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&gpio3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_gpio3_hog>; |
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usb-emulation-hog { |
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gpio-hog; |
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gpios = <10 GPIO_ACTIVE_HIGH>; |
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output-low; |
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line-name = "usb-emulation"; |
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}; |
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usb-mode1-hog { |
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gpio-hog; |
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gpios = <11 GPIO_ACTIVE_HIGH>; |
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output-high; |
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line-name = "usb-mode1"; |
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}; |
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usb-pwr-hog { |
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gpio-hog; |
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gpios = <12 GPIO_ACTIVE_LOW>; |
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output-high; |
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line-name = "usb-pwr-ctrl-en-n"; |
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}; |
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usb-mode2-hog { |
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gpio-hog; |
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gpios = <13 GPIO_ACTIVE_HIGH>; |
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output-high; |
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line-name = "usb-mode2"; |
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}; |
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}; |
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&i2c1 { |
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clock-frequency = <400000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c1>; |
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status = "okay"; |
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accelerometer@1c { |
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compatible = "fsl,mma8451"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_accel>; |
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reg = <0x1c>; |
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interrupt-parent = <&gpio3>; |
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interrupts = <20 IRQ_TYPE_LEVEL_LOW>; |
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interrupt-names = "INT2"; |
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vdd-supply = <®_gen_3p3>; |
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vddio-supply = <®_gen_3p3>; |
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}; |
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ucs1002: charger@32 { |
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compatible = "microchip,ucs1002"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_ucs1002>; |
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reg = <0x32>; |
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interrupt-parent = <&gpio3>; |
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interrupts = <17 IRQ_TYPE_EDGE_BOTH>, |
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<18 IRQ_TYPE_EDGE_FALLING>; |
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interrupt-names = "a_det", "alert"; |
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}; |
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hpa2: amp@60 { |
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compatible = "ti,tpa6130a2"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_tpa2>; |
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reg = <0x60>; |
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power-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; |
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Vdd-supply = <®_5p0_main>; |
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sound-name-prefix = "HPA2"; |
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}; |
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}; |
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&i2c2 { |
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clock-frequency = <400000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c2>; |
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status = "okay"; |
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pmic@8 { |
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compatible = "fsl,pfuze100"; |
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reg = <0x8>; |
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regulators { |
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sw1a_reg: sw1ab { |
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regulator-min-microvolt = <825000>; |
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regulator-max-microvolt = <1100000>; |
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}; |
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sw1c_reg: sw1c { |
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regulator-min-microvolt = <825000>; |
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regulator-max-microvolt = <1100000>; |
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}; |
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sw2_reg: sw2 { |
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regulator-min-microvolt = <1100000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-always-on; |
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}; |
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sw3a_reg: sw3ab { |
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regulator-min-microvolt = <825000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-always-on; |
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}; |
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sw4_reg: sw4 { |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-always-on; |
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}; |
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swbst_reg: swbst { |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5150000>; |
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}; |
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snvs_reg: vsnvs { |
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regulator-min-microvolt = <1000000>; |
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regulator-max-microvolt = <3000000>; |
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regulator-always-on; |
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}; |
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vref_reg: vrefddr { |
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regulator-always-on; |
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}; |
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vgen1_reg: vgen1 { |
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regulator-min-microvolt = <800000>; |
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regulator-max-microvolt = <1550000>; |
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}; |
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vgen2_reg: vgen2 { |
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regulator-min-microvolt = <850000>; |
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regulator-max-microvolt = <975000>; |
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regulator-always-on; |
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}; |
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vgen3_reg: vgen3 { |
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regulator-min-microvolt = <1675000>; |
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regulator-max-microvolt = <1975000>; |
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regulator-always-on; |
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}; |
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vgen4_reg: vgen4 { |
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regulator-min-microvolt = <1625000>; |
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regulator-max-microvolt = <1875000>; |
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regulator-always-on; |
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}; |
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vgen5_reg: vgen5 { |
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regulator-min-microvolt = <3075000>; |
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regulator-max-microvolt = <3625000>; |
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regulator-always-on; |
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}; |
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vgen6_reg: vgen6 { |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <3300000>; |
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}; |
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}; |
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}; |
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codec1: codec@18 { |
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compatible = "ti,tlv320dac3100"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_codec1>; |
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reg = <0x18>; |
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#sound-dai-cells = <0>; |
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HPVDD-supply = <®_3p3v>; |
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SPRVDD-supply = <®_3p3v>; |
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SPLVDD-supply = <®_3p3v>; |
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AVDD-supply = <®_3p3v>; |
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IOVDD-supply = <®_3p3v>; |
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DVDD-supply = <&vgen4_reg>; |
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reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>; |
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}; |
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eeprom@54 { |
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compatible = "atmel,24c128"; |
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reg = <0x54>; |
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}; |
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hpa1: amp@60 { |
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compatible = "ti,tpa6130a2"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_tpa1>; |
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reg = <0x60>; |
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power-gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>; |
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Vdd-supply = <®_5p0_main>; |
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sound-name-prefix = "HPA1"; |
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}; |
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ds1341: rtc@68 { |
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compatible = "dallas,ds1341"; |
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reg = <0x68>; |
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}; |
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}; |
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&i2c3 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3>; |
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status = "okay"; |
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usbhub: usbhub@2c { |
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compatible ="microchip,usb2513b"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_usbhub>; |
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reg = <0x2c>; |
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reset-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; |
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}; |
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watchdog@38 { |
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compatible = "zii,rave-wdt"; |
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reg = <0x38>; |
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}; |
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cs2000: clkgen@4e { |
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compatible = "cirrus,cs2000-cp"; |
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reg = <0x4e>; |
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#clock-cells = <0>; |
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clock-names = "clk_in", "ref_clk"; |
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clocks = <&cs2000_in_dummy>, <&cs2000_ref>; |
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assigned-clocks = <&cs2000>; |
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assigned-clock-rates = <24000000>; |
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}; |
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}; |
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&i2c4 { |
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clock-frequency = <400000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c4>; |
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status = "okay"; |
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}; |
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&sai2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_sai2>; |
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status = "okay"; |
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}; |
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&uart1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart1>; |
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status = "okay"; |
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}; |
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&uart2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart2>; |
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status = "okay"; |
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rave-sp { |
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compatible = "zii,rave-sp-rdu2"; |
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current-speed = <1000000>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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watchdog { |
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compatible = "zii,rave-sp-watchdog"; |
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}; |
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backlight { |
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compatible = "zii,rave-sp-backlight"; |
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}; |
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pwrbutton { |
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compatible = "zii,rave-sp-pwrbutton"; |
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}; |
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eeprom@a3 { |
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compatible = "zii,rave-sp-eeprom"; |
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reg = <0xa3 0x4000>; |
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zii,eeprom-name = "dds-eeprom"; |
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}; |
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eeprom@a4 { |
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compatible = "zii,rave-sp-eeprom"; |
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reg = <0xa4 0x4000>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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zii,eeprom-name = "main-eeprom"; |
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}; |
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}; |
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}; |
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&usb3_phy0 { |
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vbus-supply = <&ucs1002>; |
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status = "okay"; |
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}; |
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&usb_dwc3_0 { |
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dr_mode = "host"; |
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maximum-speed = "high-speed"; |
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status = "okay"; |
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}; |
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&usb3_phy1 { |
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vbus-supply = <®_5p0_main>; |
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status = "okay"; |
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}; |
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&usb_dwc3_1 { |
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dr_mode = "host"; |
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maximum-speed = "high-speed"; |
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status = "okay"; |
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}; |
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&pcie0 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_pcie0>; |
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reset-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; |
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clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>, |
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<&clk IMX8MQ_CLK_PCIE1_AUX>, |
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<&clk IMX8MQ_CLK_PCIE1_PHY>, |
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<&pcie0_refclk>; |
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clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; |
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status = "okay"; |
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}; |
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&pcie1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_pcie1>; |
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reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; |
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clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, |
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<&clk IMX8MQ_CLK_PCIE2_AUX>, |
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<&clk IMX8MQ_CLK_PCIE2_PHY>, |
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<&pcie1_refclk>; |
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clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; |
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status = "okay"; |
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}; |
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&pgc_gpu { |
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power-supply = <&sw1a_reg>; |
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}; |
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&pgc_vpu { |
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power-supply = <&sw1c_reg>; |
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}; |
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&usdhc1 { |
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>; |
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assigned-clock-rates = <400000000>; |
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pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
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pinctrl-0 = <&pinctrl_usdhc1>; |
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
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vqmmc-supply = <&sw4_reg>; |
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bus-width = <8>; |
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non-removable; |
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no-sd; |
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no-sdio; |
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status = "okay"; |
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}; |
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&usdhc2 { |
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; |
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assigned-clock-rates = <200000000>; |
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pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
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pinctrl-0 = <&pinctrl_usdhc2>; |
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
|
pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
|
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; |
|
vmmc-supply = <®_usdhc2_vmmc>; |
|
status = "okay"; |
|
}; |
|
|
|
&snvs_rtc { |
|
status = "disabled"; |
|
}; |
|
|
|
&iomuxc { |
|
pinctrl_accel: accelgrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_codec1: dac1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_fec1: fec1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 |
|
MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 |
|
MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f |
|
MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f |
|
MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 |
|
MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 |
|
MX8MQ_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x1f |
|
MX8MQ_IOMUXC_ENET_RXC_ENET1_RX_ER 0x91 |
|
MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 |
|
MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f |
|
>; |
|
}; |
|
|
|
pinctrl_fec1_phy_reset: fec1phyresetgrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x11 |
|
>; |
|
}; |
|
|
|
pinctrl_gpio3_hog: gpio3hoggrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x6 |
|
MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x6 |
|
MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x6 |
|
MX8MQ_IOMUXC_NAND_DATA07_GPIO3_IO13 0x6 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c1: i2c1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000022 |
|
MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000a2 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c2: i2c2grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000022 |
|
MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000a2 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c3: i2c3grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000022 |
|
MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000a2 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c4: i2c4grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000022 |
|
MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x400000a2 |
|
>; |
|
}; |
|
|
|
pinctrl_mdio_bitbang: bitbangmdiogrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x44 |
|
MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x64 |
|
>; |
|
}; |
|
|
|
pinctrl_pcie0: pcie0grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_UART4_RXD_PCIE1_CLKREQ_B 0x66 |
|
MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x6 |
|
>; |
|
}; |
|
|
|
pinctrl_pcie1: pcie1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_UART4_TXD_PCIE2_CLKREQ_B 0x66 |
|
MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x6 |
|
>; |
|
}; |
|
|
|
pinctrl_reg_arm: regarmgrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 |
|
>; |
|
}; |
|
|
|
pinctrl_reg_usdhc2: regusdhc2grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_sai2: sai2grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 |
|
MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 |
|
MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 |
|
>; |
|
}; |
|
|
|
pinctrl_switch_irq: switchgrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_tpa1: tpa6130-1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_tpa2: tpa6130-2grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_ts: tsgrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x96 |
|
MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x96 |
|
>; |
|
}; |
|
|
|
pinctrl_uart1: uart1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 |
|
MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 |
|
>; |
|
}; |
|
|
|
pinctrl_uart2: uart2grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 |
|
MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 |
|
>; |
|
}; |
|
|
|
pinctrl_ucs1002: ucs1002grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17 0x41 |
|
MX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_usbhub: usbhubgrp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc1: usdhc1grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 |
|
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 |
|
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 |
|
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 |
|
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc1_100mhz: usdhc1-100grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d |
|
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd |
|
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd |
|
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d |
|
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc1_200mhz: usdhc1-200grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f |
|
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf |
|
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf |
|
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f |
|
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc2: usdhc2grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 |
|
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 |
|
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 |
|
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 |
|
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 |
|
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 |
|
MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc2_100mhz: usdhc2-100grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85 |
|
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5 |
|
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5 |
|
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5 |
|
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5 |
|
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5 |
|
MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc2_200mhz: usdhc2-200grp { |
|
fsl,pins = < |
|
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87 |
|
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7 |
|
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7 |
|
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7 |
|
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7 |
|
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7 |
|
MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 |
|
>; |
|
}; |
|
};
|
|
|