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393 lines
9.4 KiB
393 lines
9.4 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Device Tree file for Boundary Devices i.MX8MMini Nitrogen8MM Rev2 board. |
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* Adrien Grassein <[email protected]> |
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*/ |
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/dts-v1/; |
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#include "imx8mm.dtsi" |
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/ { |
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model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; |
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compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; |
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}; |
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&A53_0 { |
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cpu-supply = <®_buck3>; |
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}; |
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&A53_1 { |
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cpu-supply = <®_buck3>; |
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}; |
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&A53_2 { |
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cpu-supply = <®_buck3>; |
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}; |
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&A53_3 { |
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cpu-supply = <®_buck3>; |
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}; |
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&fec1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_fec1>; |
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phy-mode = "rgmii-id"; |
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phy-handle = <ðphy0>; |
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fsl,magic-packet; |
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status = "okay"; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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ethphy0: ethernet-phy@4 { |
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compatible = "ethernet-phy-ieee802.3-c22"; |
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reg = <4>; |
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interrupts-extended = <&gpio3 16 IRQ_TYPE_LEVEL_LOW>; |
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}; |
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}; |
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}; |
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&i2c1 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c1>; |
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status = "okay"; |
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pmic@8 { |
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compatible = "nxp,pf8121a"; |
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reg = <0x8>; |
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regulators { |
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reg_ldo1: ldo1 { |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_ldo2: ldo2 { |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_ldo3: ldo3 { |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_ldo4: ldo4 { |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <5000000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck1: buck1 { |
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regulator-min-microvolt = <400000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck2: buck2 { |
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regulator-min-microvolt = <400000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck3: buck3 { |
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regulator-min-microvolt = <400000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck4: buck4 { |
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regulator-min-microvolt = <400000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck5: buck5 { |
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regulator-min-microvolt = <400000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck6: buck6 { |
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regulator-min-microvolt = <400000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_buck7: buck7 { |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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reg_vsnvs: vsnvs { |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-boot-on; |
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}; |
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}; |
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}; |
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}; |
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&i2c3 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3>; |
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status = "okay"; |
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i2cmux@70 { |
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compatible = "nxp,pca9540"; |
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reg = <0x70>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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i2c3 { |
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reg = <0>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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rtc@68 { |
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compatible = "microcrystal,rv4162"; |
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reg = <0x68>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3a_rv4162>; |
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interrupts-extended = <&gpio4 22 IRQ_TYPE_LEVEL_LOW>; |
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wakeup-source; |
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}; |
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}; |
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}; |
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}; |
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/* console */ |
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&uart2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart2>; |
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assigned-clocks = <&clk IMX8MM_CLK_UART2>; |
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assigned-clock-parents = <&clk IMX8MM_CLK_24M>; |
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status = "okay"; |
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}; |
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/* eMMC */ |
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&usdhc1 { |
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bus-width = <8>; |
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sdhci-caps-mask = <0x80000000 0x0>; |
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non-removable; |
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pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
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pinctrl-0 = <&pinctrl_usdhc1>; |
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
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status = "okay"; |
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}; |
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/* sdcard */ |
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&usdhc2 { |
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bus-width = <4>; |
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; |
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pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
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pinctrl-0 = <&pinctrl_usdhc2>; |
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
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vqmmc-supply = <®_ldo2>; |
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status = "okay"; |
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}; |
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&wdog1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_wdog>; |
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fsl,ext-reset-output; |
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status = "okay"; |
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}; |
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&iomuxc { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_hog>; |
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pinctrl_fec1: fec1grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 |
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MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 |
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MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f |
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MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f |
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MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f |
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MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f |
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MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 |
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MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 |
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MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 |
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MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 |
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MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f |
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MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 |
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MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 |
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MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f |
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MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x159 |
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>; |
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}; |
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pinctrl_hog: hoggrp { |
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fsl,pins = < |
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MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09 |
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MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x09 |
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>; |
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}; |
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pinctrl_i2c1: i2c1grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 |
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MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 |
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>; |
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}; |
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pinctrl_i2c3: i2c3grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 |
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MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 |
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>; |
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}; |
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pinctrl_i2c3a_rv4162: i2c3a-rv4162grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0 |
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>; |
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}; |
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pinctrl_uart2: uart2grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 |
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MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 |
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>; |
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}; |
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pinctrl_usdhc1: usdhc1grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 |
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0 |
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MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0 |
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MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x141 |
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>; |
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}; |
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pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 |
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4 |
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MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4 |
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>; |
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}; |
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pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 |
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MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6 |
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MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6 |
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>; |
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}; |
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pinctrl_usdhc2: usdhc2grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 |
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 |
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 |
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 |
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 |
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 |
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MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4 |
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>; |
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}; |
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pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 |
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 |
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 |
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 |
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 |
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 |
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>; |
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}; |
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pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 |
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 |
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 |
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 |
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 |
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 |
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>; |
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}; |
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pinctrl_usdhc3: usdhc3grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 |
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 |
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MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 |
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MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 |
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MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 |
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MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 |
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MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x03 |
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>; |
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}; |
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pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 |
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 |
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MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 |
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MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 |
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MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 |
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MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 |
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>; |
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}; |
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pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { |
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fsl,pins = < |
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 |
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 |
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MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 |
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MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 |
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MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 |
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MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 |
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>; |
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}; |
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pinctrl_wdog: wdoggrp { |
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fsl,pins = < |
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MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x140 |
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>; |
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}; |
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};
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