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182 lines
5.0 KiB
182 lines
5.0 KiB
/* |
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* BSD LICENSE |
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* |
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* Copyright(c) 2016-2017 Broadcom. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* * Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* * Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* * Neither the name of Broadcom nor the names of its |
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* contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#include <dt-bindings/clock/bcm-sr.h> |
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osc: oscillator { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <50000000>; |
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}; |
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crmu_ref25m: crmu_ref25m { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&osc>; |
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clock-div = <2>; |
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clock-mult = <1>; |
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}; |
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genpll0: genpll0@1d104 { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-genpll0"; |
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reg = <0x0001d104 0x32>, |
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<0x0001c854 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "genpll0", "clk_125m", "clk_scr", |
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"clk_250", "clk_pcie_axi", |
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"clk_paxc_axi_x2", |
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"clk_paxc_axi"; |
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}; |
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genpll2: genpll2@1d1ac { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-genpll2"; |
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reg = <0x0001d1ac 0x32>, |
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<0x0001c854 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "genpll2", "clk_nic", |
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"clk_ts_500_ref", "clk_125_nitro", |
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"clk_chimp", "clk_nic_flash", |
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"clk_fs"; |
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}; |
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genpll3: genpll3@1d1e0 { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-genpll3"; |
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reg = <0x0001d1e0 0x32>, |
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<0x0001c854 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "genpll3", "clk_hsls", |
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"clk_sdio"; |
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}; |
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genpll4: genpll4@1d214 { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-genpll4"; |
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reg = <0x0001d214 0x32>, |
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<0x0001c854 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "genpll4", "clk_ccn", |
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"clk_tpiu_pll", "clk_noc", |
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"clk_chclk_fs4", |
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"clk_bridge_fscpu"; |
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}; |
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genpll5: genpll5@1d248 { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-genpll5"; |
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reg = <0x0001d248 0x32>, |
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<0x0001c870 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "genpll5", "clk_fs4_hf", |
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"clk_crypto_ae", "clk_raid_ae"; |
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}; |
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lcpll0: lcpll0@1d0c4 { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-lcpll0"; |
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reg = <0x0001d0c4 0x3c>, |
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<0x0001c870 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "lcpll0", "clk_sata_refp", |
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"clk_sata_refn", "clk_sata_350", |
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"clk_sata_500"; |
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}; |
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lcpll1: lcpll1@1d138 { |
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#clock-cells = <1>; |
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compatible = "brcm,sr-lcpll1"; |
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reg = <0x0001d138 0x3c>, |
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<0x0001c870 0x4>; |
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clocks = <&osc>; |
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clock-output-names = "lcpll1", "clk_wan", |
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"clk_usb_ref", |
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"clk_crmu_ts"; |
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}; |
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hsls_clk: hsls_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&genpll3 1>; |
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clock-div = <1>; |
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clock-mult = <1>; |
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}; |
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hsls_div2_clk: hsls_div2_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>; |
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clock-div = <2>; |
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clock-mult = <1>; |
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}; |
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hsls_div4_clk: hsls_div4_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&genpll3 BCM_SR_GENPLL3_HSLS_CLK>; |
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clock-div = <4>; |
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clock-mult = <1>; |
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}; |
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hsls_25m_clk: hsls_25m_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&crmu_ref25m>; |
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clock-div = <1>; |
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clock-mult = <1>; |
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}; |
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hsls_25m_div2_clk: hsls_25m_div2_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&hsls_25m_clk>; |
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clock-div = <2>; |
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clock-mult = <1>; |
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}; |
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sdio0_clk: sdio0_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>; |
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clock-div = <1>; |
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clock-mult = <1>; |
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}; |
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sdio1_clk: sdio1_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-factor-clock"; |
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clocks = <&genpll3 BCM_SR_GENPLL3_SDIO_CLK>; |
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clock-div = <1>; |
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clock-mult = <1>; |
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};
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