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161 lines
3.5 KiB
161 lines
3.5 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved. |
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*/ |
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#include <dt-bindings/interrupt-controller/irq.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/gpio/meson-a1-gpio.h> |
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/ { |
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compatible = "amlogic,a1"; |
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interrupt-parent = <&gic>; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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cpus { |
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#address-cells = <2>; |
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#size-cells = <0>; |
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cpu0: cpu@0 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a35"; |
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reg = <0x0 0x0>; |
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enable-method = "psci"; |
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next-level-cache = <&l2>; |
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}; |
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cpu1: cpu@1 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a35"; |
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reg = <0x0 0x1>; |
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enable-method = "psci"; |
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next-level-cache = <&l2>; |
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}; |
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l2: l2-cache0 { |
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compatible = "cache"; |
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}; |
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}; |
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psci { |
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compatible = "arm,psci-1.0"; |
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method = "smc"; |
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}; |
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reserved-memory { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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linux,cma { |
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compatible = "shared-dma-pool"; |
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reusable; |
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size = <0x0 0x800000>; |
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alignment = <0x0 0x400000>; |
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linux,cma-default; |
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}; |
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}; |
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sm: secure-monitor { |
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compatible = "amlogic,meson-gxbb-sm"; |
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pwrc: power-controller { |
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compatible = "amlogic,meson-a1-pwrc"; |
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#power-domain-cells = <1>; |
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status = "okay"; |
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}; |
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}; |
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soc { |
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compatible = "simple-bus"; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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apb: bus@fe000000 { |
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compatible = "simple-bus"; |
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reg = <0x0 0xfe000000 0x0 0x1000000>; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>; |
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reset: reset-controller@0 { |
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compatible = "amlogic,meson-a1-reset"; |
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reg = <0x0 0x0 0x0 0x8c>; |
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#reset-cells = <1>; |
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}; |
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periphs_pinctrl: pinctrl@0400 { |
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compatible = "amlogic,meson-a1-periphs-pinctrl"; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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gpio: bank@0400 { |
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reg = <0x0 0x0400 0x0 0x003c>, |
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<0x0 0x0480 0x0 0x0118>; |
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reg-names = "mux", "gpio"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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gpio-ranges = <&periphs_pinctrl 0 0 62>; |
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}; |
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}; |
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uart_AO: serial@1c00 { |
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compatible = "amlogic,meson-gx-uart", |
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"amlogic,meson-ao-uart"; |
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reg = <0x0 0x1c00 0x0 0x18>; |
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interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; |
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clocks = <&xtal>, <&xtal>, <&xtal>; |
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clock-names = "xtal", "pclk", "baud"; |
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status = "disabled"; |
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}; |
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uart_AO_B: serial@2000 { |
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compatible = "amlogic,meson-gx-uart", |
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"amlogic,meson-ao-uart"; |
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reg = <0x0 0x2000 0x0 0x18>; |
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interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; |
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clocks = <&xtal>, <&xtal>, <&xtal>; |
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clock-names = "xtal", "pclk", "baud"; |
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status = "disabled"; |
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}; |
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}; |
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gic: interrupt-controller@ff901000 { |
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compatible = "arm,gic-400"; |
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reg = <0x0 0xff901000 0x0 0x1000>, |
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<0x0 0xff902000 0x0 0x2000>, |
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<0x0 0xff904000 0x0 0x2000>, |
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<0x0 0xff906000 0x0 0x2000>; |
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interrupt-controller; |
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interrupts = <GIC_PPI 9 |
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; |
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#interrupt-cells = <3>; |
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#address-cells = <0>; |
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}; |
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}; |
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timer { |
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compatible = "arm,armv8-timer"; |
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interrupts = <GIC_PPI 13 |
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 14 |
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 11 |
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 10 |
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; |
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}; |
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xtal: xtal-clk { |
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compatible = "fixed-clock"; |
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clock-frequency = <24000000>; |
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clock-output-names = "xtal"; |
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#clock-cells = <0>; |
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}; |
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};
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