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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
42 lines
1.1 KiB
Plaintext
42 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
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*
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* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
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*/
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&cbass_wakeup {
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wkup_conf: syscon@43000000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x00 0x43000000 0x00 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x00 0x43000000 0x20000>;
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chipid: chipid@14 {
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compatible = "ti,am654-chipid";
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reg = <0x14 0x4>;
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};
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};
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wkup_uart0: serial@2b300000 {
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compatible = "ti,am64-uart", "ti,am654-uart";
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reg = <0x00 0x2b300000 0x00 0x100>;
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interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 114 0>;
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clock-names = "fclk";
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};
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wkup_i2c0: i2c@2b200000 {
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compatible = "ti,am64-i2c", "ti,omap4-i2c";
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reg = <0x00 0x02b200000 0x00 0x100>;
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interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 107 4>;
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clock-names = "fck";
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};
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};
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