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2a709f28fa
* 0day explit mitigation * Memory corruption prevention * Privilege escalation prevention * Buffer over flow prevention * File System corruption defense * Thread escape prevention This may very well be the most intensive inclusion to BrooklynR. This will not be part of an x86 suite nor it will be released as tool kit. The security core toolkit will remain part of kernel base.
46 lines
1.4 KiB
C
46 lines
1.4 KiB
C
/*
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* This header provides constants for Tegra pinctrl bindings.
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*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Author: Laxman Dewangan <ldewangan@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
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#define _DT_BINDINGS_PINCTRL_TEGRA_H
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/*
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* Enable/disable for diffeent dt properties. This is applicable for
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* properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
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* nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
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*/
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#define TEGRA_PIN_DISABLE 0
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#define TEGRA_PIN_ENABLE 1
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#define TEGRA_PIN_PULL_NONE 0
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#define TEGRA_PIN_PULL_DOWN 1
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#define TEGRA_PIN_PULL_UP 2
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/* Low power mode driver */
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#define TEGRA_PIN_LP_DRIVE_DIV_8 0
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#define TEGRA_PIN_LP_DRIVE_DIV_4 1
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#define TEGRA_PIN_LP_DRIVE_DIV_2 2
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#define TEGRA_PIN_LP_DRIVE_DIV_1 3
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/* Rising/Falling slew rate */
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#define TEGRA_PIN_SLEW_RATE_FASTEST 0
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#define TEGRA_PIN_SLEW_RATE_FAST 1
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#define TEGRA_PIN_SLEW_RATE_SLOW 2
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#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
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#endif
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