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1170 lines
29 KiB
1170 lines
29 KiB
/* |
|
* xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards |
|
* |
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* This software is (C) by the respective authors, and licensed under the GPL |
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* License. |
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* |
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* Written by Arjan van de Ven for Red Hat, Inc. |
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* Based on work by Jeff Garzik, Doug Ledford and Donald Becker |
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* |
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* This software may be used and distributed according to the terms |
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* of the GNU General Public License, incorporated herein by reference. |
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* |
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* |
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* $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $ |
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*/ |
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|
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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|
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/string.h> |
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#include <linux/errno.h> |
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#include <linux/ioport.h> |
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#include <linux/slab.h> |
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#include <linux/interrupt.h> |
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#include <linux/pci.h> |
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#include <linux/netdevice.h> |
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#include <linux/etherdevice.h> |
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#include <linux/skbuff.h> |
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#include <linux/delay.h> |
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#include <linux/bitops.h> |
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|
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#include <linux/uaccess.h> |
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#include <asm/io.h> |
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#ifdef CONFIG_NET_POLL_CONTROLLER |
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#include <asm/irq.h> |
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#endif |
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|
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MODULE_DESCRIPTION("Xircom Cardbus ethernet driver"); |
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MODULE_AUTHOR("Arjan van de Ven <[email protected]>"); |
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MODULE_LICENSE("GPL"); |
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|
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#define xw32(reg, val) iowrite32(val, ioaddr + (reg)) |
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#define xr32(reg) ioread32(ioaddr + (reg)) |
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#define xr8(reg) ioread8(ioaddr + (reg)) |
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|
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/* IO registers on the card, offsets */ |
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#define CSR0 0x00 |
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#define CSR1 0x08 |
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#define CSR2 0x10 |
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#define CSR3 0x18 |
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#define CSR4 0x20 |
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#define CSR5 0x28 |
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#define CSR6 0x30 |
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#define CSR7 0x38 |
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#define CSR8 0x40 |
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#define CSR9 0x48 |
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#define CSR10 0x50 |
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#define CSR11 0x58 |
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#define CSR12 0x60 |
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#define CSR13 0x68 |
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#define CSR14 0x70 |
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#define CSR15 0x78 |
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#define CSR16 0x80 |
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|
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/* PCI registers */ |
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#define PCI_POWERMGMT 0x40 |
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|
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/* Offsets of the buffers within the descriptor pages, in bytes */ |
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|
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#define NUMDESCRIPTORS 4 |
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|
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static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144}; |
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|
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struct xircom_private { |
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/* Send and receive buffers, kernel-addressable and dma addressable forms */ |
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|
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__le32 *rx_buffer; |
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__le32 *tx_buffer; |
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|
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dma_addr_t rx_dma_handle; |
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dma_addr_t tx_dma_handle; |
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|
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struct sk_buff *tx_skb[4]; |
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|
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void __iomem *ioaddr; |
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int open; |
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|
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/* transmit_used is the rotating counter that indicates which transmit |
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descriptor has to be used next */ |
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int transmit_used; |
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|
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/* Spinlock to serialize register operations. |
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It must be helt while manipulating the following registers: |
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CSR0, CSR6, CSR7, CSR9, CSR10, CSR15 |
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*/ |
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spinlock_t lock; |
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|
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struct pci_dev *pdev; |
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struct net_device *dev; |
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}; |
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|
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/* Function prototypes */ |
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static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id); |
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static void xircom_remove(struct pci_dev *pdev); |
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static irqreturn_t xircom_interrupt(int irq, void *dev_instance); |
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static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, |
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struct net_device *dev); |
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static int xircom_open(struct net_device *dev); |
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static int xircom_close(struct net_device *dev); |
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static void xircom_up(struct xircom_private *card); |
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#ifdef CONFIG_NET_POLL_CONTROLLER |
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static void xircom_poll_controller(struct net_device *dev); |
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#endif |
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|
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static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset); |
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static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset); |
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static void read_mac_address(struct xircom_private *card); |
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static void transceiver_voodoo(struct xircom_private *card); |
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static void initialize_card(struct xircom_private *card); |
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static void trigger_transmit(struct xircom_private *card); |
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static void trigger_receive(struct xircom_private *card); |
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static void setup_descriptors(struct xircom_private *card); |
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static void remove_descriptors(struct xircom_private *card); |
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static int link_status_changed(struct xircom_private *card); |
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static void activate_receiver(struct xircom_private *card); |
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static void deactivate_receiver(struct xircom_private *card); |
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static void activate_transmitter(struct xircom_private *card); |
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static void deactivate_transmitter(struct xircom_private *card); |
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static void enable_transmit_interrupt(struct xircom_private *card); |
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static void enable_receive_interrupt(struct xircom_private *card); |
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static void enable_link_interrupt(struct xircom_private *card); |
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static void disable_all_interrupts(struct xircom_private *card); |
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static int link_status(struct xircom_private *card); |
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static const struct pci_device_id xircom_pci_table[] = { |
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{ PCI_VDEVICE(XIRCOM, 0x0003), }, |
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{0,}, |
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}; |
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MODULE_DEVICE_TABLE(pci, xircom_pci_table); |
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|
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static struct pci_driver xircom_ops = { |
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.name = "xircom_cb", |
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.id_table = xircom_pci_table, |
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.probe = xircom_probe, |
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.remove = xircom_remove, |
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}; |
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|
|
|
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#if defined DEBUG && DEBUG > 1 |
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static void print_binary(unsigned int number) |
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{ |
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int i,i2; |
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char buffer[64]; |
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memset(buffer,0,64); |
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i2=0; |
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for (i=31;i>=0;i--) { |
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if (number & (1<<i)) |
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buffer[i2++]='1'; |
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else |
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buffer[i2++]='0'; |
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if ((i&3)==0) |
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buffer[i2++]=' '; |
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} |
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pr_debug("%s\n",buffer); |
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} |
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#endif |
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|
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static const struct net_device_ops netdev_ops = { |
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.ndo_open = xircom_open, |
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.ndo_stop = xircom_close, |
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.ndo_start_xmit = xircom_start_xmit, |
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.ndo_set_mac_address = eth_mac_addr, |
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.ndo_validate_addr = eth_validate_addr, |
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#ifdef CONFIG_NET_POLL_CONTROLLER |
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.ndo_poll_controller = xircom_poll_controller, |
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#endif |
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}; |
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|
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/* xircom_probe is the code that gets called on device insertion. |
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it sets up the hardware and registers the device to the networklayer. |
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|
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TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the |
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first two packets that get send, and pump hates that. |
|
|
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*/ |
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static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
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{ |
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struct device *d = &pdev->dev; |
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struct net_device *dev = NULL; |
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struct xircom_private *private; |
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unsigned long flags; |
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unsigned short tmp16; |
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int rc; |
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|
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/* First do the PCI initialisation */ |
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|
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rc = pci_enable_device(pdev); |
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if (rc < 0) |
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goto out; |
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|
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/* disable all powermanagement */ |
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pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); |
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|
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pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/ |
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/* clear PCI status, if any */ |
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pci_read_config_word (pdev,PCI_STATUS, &tmp16); |
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pci_write_config_word (pdev, PCI_STATUS,tmp16); |
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|
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rc = pci_request_regions(pdev, "xircom_cb"); |
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if (rc < 0) { |
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pr_err("%s: failed to allocate io-region\n", __func__); |
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goto err_disable; |
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} |
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|
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rc = -ENOMEM; |
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/* |
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Before changing the hardware, allocate the memory. |
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This way, we can fail gracefully if not enough memory |
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is available. |
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*/ |
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dev = alloc_etherdev(sizeof(struct xircom_private)); |
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if (!dev) |
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goto err_release; |
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|
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private = netdev_priv(dev); |
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|
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/* Allocate the send/receive buffers */ |
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private->rx_buffer = dma_alloc_coherent(d, 8192, |
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&private->rx_dma_handle, |
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GFP_KERNEL); |
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if (private->rx_buffer == NULL) |
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goto rx_buf_fail; |
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|
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private->tx_buffer = dma_alloc_coherent(d, 8192, |
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&private->tx_dma_handle, |
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GFP_KERNEL); |
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if (private->tx_buffer == NULL) |
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goto tx_buf_fail; |
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SET_NETDEV_DEV(dev, &pdev->dev); |
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|
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private->dev = dev; |
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private->pdev = pdev; |
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/* IO range. */ |
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private->ioaddr = pci_iomap(pdev, 0, 0); |
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if (!private->ioaddr) |
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goto reg_fail; |
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spin_lock_init(&private->lock); |
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initialize_card(private); |
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read_mac_address(private); |
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setup_descriptors(private); |
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dev->netdev_ops = &netdev_ops; |
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pci_set_drvdata(pdev, dev); |
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rc = register_netdev(dev); |
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if (rc < 0) { |
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pr_err("%s: netdevice registration failed\n", __func__); |
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goto err_unmap; |
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} |
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netdev_info(dev, "Xircom cardbus revision %i at irq %i\n", |
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pdev->revision, pdev->irq); |
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/* start the transmitter to get a heartbeat */ |
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/* TODO: send 2 dummy packets here */ |
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transceiver_voodoo(private); |
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spin_lock_irqsave(&private->lock,flags); |
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activate_transmitter(private); |
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activate_receiver(private); |
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spin_unlock_irqrestore(&private->lock,flags); |
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trigger_receive(private); |
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out: |
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return rc; |
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err_unmap: |
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pci_iounmap(pdev, private->ioaddr); |
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reg_fail: |
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dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle); |
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tx_buf_fail: |
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dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle); |
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rx_buf_fail: |
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free_netdev(dev); |
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err_release: |
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pci_release_regions(pdev); |
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err_disable: |
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pci_disable_device(pdev); |
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goto out; |
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} |
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/* |
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xircom_remove is called on module-unload or on device-eject. |
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it unregisters the irq, io-region and network device. |
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Interrupts and such are already stopped in the "ifconfig ethX down" |
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code. |
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*/ |
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static void xircom_remove(struct pci_dev *pdev) |
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{ |
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struct net_device *dev = pci_get_drvdata(pdev); |
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struct xircom_private *card = netdev_priv(dev); |
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struct device *d = &pdev->dev; |
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unregister_netdev(dev); |
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pci_iounmap(pdev, card->ioaddr); |
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dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle); |
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dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle); |
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free_netdev(dev); |
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pci_release_regions(pdev); |
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pci_disable_device(pdev); |
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} |
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static irqreturn_t xircom_interrupt(int irq, void *dev_instance) |
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{ |
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struct net_device *dev = (struct net_device *) dev_instance; |
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struct xircom_private *card = netdev_priv(dev); |
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void __iomem *ioaddr = card->ioaddr; |
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unsigned int status; |
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int i; |
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spin_lock(&card->lock); |
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status = xr32(CSR5); |
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#if defined DEBUG && DEBUG > 1 |
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print_binary(status); |
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pr_debug("tx status 0x%08x 0x%08x\n", |
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card->tx_buffer[0], card->tx_buffer[4]); |
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pr_debug("rx status 0x%08x 0x%08x\n", |
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card->rx_buffer[0], card->rx_buffer[4]); |
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#endif |
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/* Handle shared irq and hotplug */ |
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if (status == 0 || status == 0xffffffff) { |
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spin_unlock(&card->lock); |
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return IRQ_NONE; |
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} |
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|
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if (link_status_changed(card)) { |
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int newlink; |
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netdev_dbg(dev, "Link status has changed\n"); |
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newlink = link_status(card); |
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netdev_info(dev, "Link is %d mbit\n", newlink); |
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if (newlink) |
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netif_carrier_on(dev); |
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else |
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netif_carrier_off(dev); |
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|
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} |
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|
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/* Clear all remaining interrupts */ |
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status |= 0xffffffff; /* FIXME: make this clear only the |
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real existing bits */ |
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xw32(CSR5, status); |
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for (i=0;i<NUMDESCRIPTORS;i++) |
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investigate_write_descriptor(dev,card,i,bufferoffsets[i]); |
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for (i=0;i<NUMDESCRIPTORS;i++) |
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investigate_read_descriptor(dev,card,i,bufferoffsets[i]); |
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|
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spin_unlock(&card->lock); |
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return IRQ_HANDLED; |
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} |
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|
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static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, |
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struct net_device *dev) |
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{ |
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struct xircom_private *card; |
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unsigned long flags; |
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int nextdescriptor; |
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int desc; |
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|
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card = netdev_priv(dev); |
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spin_lock_irqsave(&card->lock,flags); |
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|
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/* First see if we can free some descriptors */ |
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for (desc=0;desc<NUMDESCRIPTORS;desc++) |
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investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]); |
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|
|
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nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS); |
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desc = card->transmit_used; |
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|
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/* only send the packet if the descriptor is free */ |
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if (card->tx_buffer[4*desc]==0) { |
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/* Copy the packet data; zero the memory first as the card |
|
sometimes sends more than you ask it to. */ |
|
|
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memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536); |
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skb_copy_from_linear_data(skb, |
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&(card->tx_buffer[bufferoffsets[desc] / 4]), |
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skb->len); |
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/* FIXME: The specification tells us that the length we send HAS to be a multiple of |
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4 bytes. */ |
|
|
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card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len); |
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if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */ |
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card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25); |
|
|
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card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000); |
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/* 0xF0... means want interrupts*/ |
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card->tx_skb[desc] = skb; |
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|
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wmb(); |
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/* This gives the descriptor to the card */ |
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card->tx_buffer[4*desc] = cpu_to_le32(0x80000000); |
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trigger_transmit(card); |
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if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) { |
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/* next descriptor is occupied... */ |
|
netif_stop_queue(dev); |
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} |
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card->transmit_used = nextdescriptor; |
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spin_unlock_irqrestore(&card->lock,flags); |
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return NETDEV_TX_OK; |
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} |
|
|
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/* Uh oh... no free descriptor... drop the packet */ |
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netif_stop_queue(dev); |
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spin_unlock_irqrestore(&card->lock,flags); |
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trigger_transmit(card); |
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|
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return NETDEV_TX_BUSY; |
|
} |
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|
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static int xircom_open(struct net_device *dev) |
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{ |
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struct xircom_private *xp = netdev_priv(dev); |
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const int irq = xp->pdev->irq; |
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int retval; |
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|
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netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq); |
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retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev); |
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if (retval) |
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return retval; |
|
|
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xircom_up(xp); |
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xp->open = 1; |
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|
|
return 0; |
|
} |
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|
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static int xircom_close(struct net_device *dev) |
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{ |
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struct xircom_private *card; |
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unsigned long flags; |
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|
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card = netdev_priv(dev); |
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netif_stop_queue(dev); /* we don't want new packets */ |
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|
|
|
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spin_lock_irqsave(&card->lock,flags); |
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|
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disable_all_interrupts(card); |
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#if 0 |
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/* We can enable this again once we send dummy packets on ifconfig ethX up */ |
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deactivate_receiver(card); |
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deactivate_transmitter(card); |
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#endif |
|
remove_descriptors(card); |
|
|
|
spin_unlock_irqrestore(&card->lock,flags); |
|
|
|
card->open = 0; |
|
free_irq(card->pdev->irq, dev); |
|
|
|
return 0; |
|
|
|
} |
|
|
|
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER |
|
static void xircom_poll_controller(struct net_device *dev) |
|
{ |
|
struct xircom_private *xp = netdev_priv(dev); |
|
const int irq = xp->pdev->irq; |
|
|
|
disable_irq(irq); |
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xircom_interrupt(irq, dev); |
|
enable_irq(irq); |
|
} |
|
#endif |
|
|
|
|
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static void initialize_card(struct xircom_private *card) |
|
{ |
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void __iomem *ioaddr = card->ioaddr; |
|
unsigned long flags; |
|
u32 val; |
|
|
|
spin_lock_irqsave(&card->lock, flags); |
|
|
|
/* First: reset the card */ |
|
val = xr32(CSR0); |
|
val |= 0x01; /* Software reset */ |
|
xw32(CSR0, val); |
|
|
|
udelay(100); /* give the card some time to reset */ |
|
|
|
val = xr32(CSR0); |
|
val &= ~0x01; /* disable Software reset */ |
|
xw32(CSR0, val); |
|
|
|
|
|
val = 0; /* Value 0x00 is a safe and conservative value |
|
for the PCI configuration settings */ |
|
xw32(CSR0, val); |
|
|
|
|
|
disable_all_interrupts(card); |
|
deactivate_receiver(card); |
|
deactivate_transmitter(card); |
|
|
|
spin_unlock_irqrestore(&card->lock, flags); |
|
} |
|
|
|
/* |
|
trigger_transmit causes the card to check for frames to be transmitted. |
|
This is accomplished by writing to the CSR1 port. The documentation |
|
claims that the act of writing is sufficient and that the value is |
|
ignored; I chose zero. |
|
*/ |
|
static void trigger_transmit(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
|
|
xw32(CSR1, 0); |
|
} |
|
|
|
/* |
|
trigger_receive causes the card to check for empty frames in the |
|
descriptor list in which packets can be received. |
|
This is accomplished by writing to the CSR2 port. The documentation |
|
claims that the act of writing is sufficient and that the value is |
|
ignored; I chose zero. |
|
*/ |
|
static void trigger_receive(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
|
|
xw32(CSR2, 0); |
|
} |
|
|
|
/* |
|
setup_descriptors initializes the send and receive buffers to be valid |
|
descriptors and programs the addresses into the card. |
|
*/ |
|
static void setup_descriptors(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
u32 address; |
|
int i; |
|
|
|
BUG_ON(card->rx_buffer == NULL); |
|
BUG_ON(card->tx_buffer == NULL); |
|
|
|
/* Receive descriptors */ |
|
memset(card->rx_buffer, 0, 128); /* clear the descriptors */ |
|
for (i=0;i<NUMDESCRIPTORS;i++ ) { |
|
|
|
/* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */ |
|
card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000); |
|
/* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ |
|
card->rx_buffer[i*4 + 1] = cpu_to_le32(1536); |
|
if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ |
|
card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); |
|
|
|
/* Rx Descr2: address of the buffer |
|
we store the buffer at the 2nd half of the page */ |
|
|
|
address = card->rx_dma_handle; |
|
card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
|
/* Rx Desc3: address of 2nd buffer -> 0 */ |
|
card->rx_buffer[i*4 + 3] = 0; |
|
} |
|
|
|
wmb(); |
|
/* Write the receive descriptor ring address to the card */ |
|
address = card->rx_dma_handle; |
|
xw32(CSR3, address); /* Receive descr list address */ |
|
|
|
|
|
/* transmit descriptors */ |
|
memset(card->tx_buffer, 0, 128); /* clear the descriptors */ |
|
|
|
for (i=0;i<NUMDESCRIPTORS;i++ ) { |
|
/* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */ |
|
card->tx_buffer[i*4 + 0] = 0x00000000; |
|
/* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ |
|
card->tx_buffer[i*4 + 1] = cpu_to_le32(1536); |
|
if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ |
|
card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); |
|
|
|
/* Tx Descr2: address of the buffer |
|
we store the buffer at the 2nd half of the page */ |
|
address = card->tx_dma_handle; |
|
card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
|
/* Tx Desc3: address of 2nd buffer -> 0 */ |
|
card->tx_buffer[i*4 + 3] = 0; |
|
} |
|
|
|
wmb(); |
|
/* wite the transmit descriptor ring to the card */ |
|
address = card->tx_dma_handle; |
|
xw32(CSR4, address); /* xmit descr list address */ |
|
} |
|
|
|
/* |
|
remove_descriptors informs the card the descriptors are no longer |
|
valid by setting the address in the card to 0x00. |
|
*/ |
|
static void remove_descriptors(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = 0; |
|
xw32(CSR3, val); /* Receive descriptor address */ |
|
xw32(CSR4, val); /* Send descriptor address */ |
|
} |
|
|
|
/* |
|
link_status_changed returns 1 if the card has indicated that |
|
the link status has changed. The new link status has to be read from CSR12. |
|
|
|
This function also clears the status-bit. |
|
*/ |
|
static int link_status_changed(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = xr32(CSR5); /* Status register */ |
|
if (!(val & (1 << 27))) /* no change */ |
|
return 0; |
|
|
|
/* clear the event by writing a 1 to the bit in the |
|
status register. */ |
|
val = (1 << 27); |
|
xw32(CSR5, val); |
|
|
|
return 1; |
|
} |
|
|
|
|
|
/* |
|
transmit_active returns 1 if the transmitter on the card is |
|
in a non-stopped state. |
|
*/ |
|
static int transmit_active(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
|
|
if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */ |
|
return 0; |
|
|
|
return 1; |
|
} |
|
|
|
/* |
|
receive_active returns 1 if the receiver on the card is |
|
in a non-stopped state. |
|
*/ |
|
static int receive_active(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
|
|
if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */ |
|
return 0; |
|
|
|
return 1; |
|
} |
|
|
|
/* |
|
activate_receiver enables the receiver on the card. |
|
Before being allowed to active the receiver, the receiver |
|
must be completely de-activated. To achieve this, |
|
this code actually disables the receiver first; then it waits for the |
|
receiver to become inactive, then it activates the receiver and then |
|
it waits for the receiver to be active. |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void activate_receiver(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
int counter; |
|
|
|
val = xr32(CSR6); /* Operation mode */ |
|
|
|
/* If the "active" bit is set and the receiver is already |
|
active, no need to do the expensive thing */ |
|
if ((val&2) && (receive_active(card))) |
|
return; |
|
|
|
|
|
val = val & ~2; /* disable the receiver */ |
|
xw32(CSR6, val); |
|
|
|
counter = 10; |
|
while (counter > 0) { |
|
if (!receive_active(card)) |
|
break; |
|
/* wait a while */ |
|
udelay(50); |
|
counter--; |
|
if (counter <= 0) |
|
netdev_err(card->dev, "Receiver failed to deactivate\n"); |
|
} |
|
|
|
/* enable the receiver */ |
|
val = xr32(CSR6); /* Operation mode */ |
|
val = val | 2; /* enable the receiver */ |
|
xw32(CSR6, val); |
|
|
|
/* now wait for the card to activate again */ |
|
counter = 10; |
|
while (counter > 0) { |
|
if (receive_active(card)) |
|
break; |
|
/* wait a while */ |
|
udelay(50); |
|
counter--; |
|
if (counter <= 0) |
|
netdev_err(card->dev, |
|
"Receiver failed to re-activate\n"); |
|
} |
|
} |
|
|
|
/* |
|
deactivate_receiver disables the receiver on the card. |
|
To achieve this this code disables the receiver first; |
|
then it waits for the receiver to become inactive. |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void deactivate_receiver(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
int counter; |
|
|
|
val = xr32(CSR6); /* Operation mode */ |
|
val = val & ~2; /* disable the receiver */ |
|
xw32(CSR6, val); |
|
|
|
counter = 10; |
|
while (counter > 0) { |
|
if (!receive_active(card)) |
|
break; |
|
/* wait a while */ |
|
udelay(50); |
|
counter--; |
|
if (counter <= 0) |
|
netdev_err(card->dev, "Receiver failed to deactivate\n"); |
|
} |
|
} |
|
|
|
|
|
/* |
|
activate_transmitter enables the transmitter on the card. |
|
Before being allowed to active the transmitter, the transmitter |
|
must be completely de-activated. To achieve this, |
|
this code actually disables the transmitter first; then it waits for the |
|
transmitter to become inactive, then it activates the transmitter and then |
|
it waits for the transmitter to be active again. |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void activate_transmitter(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
int counter; |
|
|
|
val = xr32(CSR6); /* Operation mode */ |
|
|
|
/* If the "active" bit is set and the receiver is already |
|
active, no need to do the expensive thing */ |
|
if ((val&(1<<13)) && (transmit_active(card))) |
|
return; |
|
|
|
val = val & ~(1 << 13); /* disable the transmitter */ |
|
xw32(CSR6, val); |
|
|
|
counter = 10; |
|
while (counter > 0) { |
|
if (!transmit_active(card)) |
|
break; |
|
/* wait a while */ |
|
udelay(50); |
|
counter--; |
|
if (counter <= 0) |
|
netdev_err(card->dev, |
|
"Transmitter failed to deactivate\n"); |
|
} |
|
|
|
/* enable the transmitter */ |
|
val = xr32(CSR6); /* Operation mode */ |
|
val = val | (1 << 13); /* enable the transmitter */ |
|
xw32(CSR6, val); |
|
|
|
/* now wait for the card to activate again */ |
|
counter = 10; |
|
while (counter > 0) { |
|
if (transmit_active(card)) |
|
break; |
|
/* wait a while */ |
|
udelay(50); |
|
counter--; |
|
if (counter <= 0) |
|
netdev_err(card->dev, |
|
"Transmitter failed to re-activate\n"); |
|
} |
|
} |
|
|
|
/* |
|
deactivate_transmitter disables the transmitter on the card. |
|
To achieve this this code disables the transmitter first; |
|
then it waits for the transmitter to become inactive. |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void deactivate_transmitter(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
int counter; |
|
|
|
val = xr32(CSR6); /* Operation mode */ |
|
val = val & ~2; /* disable the transmitter */ |
|
xw32(CSR6, val); |
|
|
|
counter = 20; |
|
while (counter > 0) { |
|
if (!transmit_active(card)) |
|
break; |
|
/* wait a while */ |
|
udelay(50); |
|
counter--; |
|
if (counter <= 0) |
|
netdev_err(card->dev, |
|
"Transmitter failed to deactivate\n"); |
|
} |
|
} |
|
|
|
|
|
/* |
|
enable_transmit_interrupt enables the transmit interrupt |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void enable_transmit_interrupt(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = xr32(CSR7); /* Interrupt enable register */ |
|
val |= 1; /* enable the transmit interrupt */ |
|
xw32(CSR7, val); |
|
} |
|
|
|
|
|
/* |
|
enable_receive_interrupt enables the receive interrupt |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void enable_receive_interrupt(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = xr32(CSR7); /* Interrupt enable register */ |
|
val = val | (1 << 6); /* enable the receive interrupt */ |
|
xw32(CSR7, val); |
|
} |
|
|
|
/* |
|
enable_link_interrupt enables the link status change interrupt |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void enable_link_interrupt(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = xr32(CSR7); /* Interrupt enable register */ |
|
val = val | (1 << 27); /* enable the link status chage interrupt */ |
|
xw32(CSR7, val); |
|
} |
|
|
|
|
|
|
|
/* |
|
disable_all_interrupts disables all interrupts |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void disable_all_interrupts(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
|
|
xw32(CSR7, 0); |
|
} |
|
|
|
/* |
|
enable_common_interrupts enables several weird interrupts |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static void enable_common_interrupts(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = xr32(CSR7); /* Interrupt enable register */ |
|
val |= (1<<16); /* Normal Interrupt Summary */ |
|
val |= (1<<15); /* Abnormal Interrupt Summary */ |
|
val |= (1<<13); /* Fatal bus error */ |
|
val |= (1<<8); /* Receive Process Stopped */ |
|
val |= (1<<7); /* Receive Buffer Unavailable */ |
|
val |= (1<<5); /* Transmit Underflow */ |
|
val |= (1<<2); /* Transmit Buffer Unavailable */ |
|
val |= (1<<1); /* Transmit Process Stopped */ |
|
xw32(CSR7, val); |
|
} |
|
|
|
/* |
|
enable_promisc starts promisc mode |
|
|
|
must be called with the lock held and interrupts disabled. |
|
*/ |
|
static int enable_promisc(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned int val; |
|
|
|
val = xr32(CSR6); |
|
val = val | (1 << 6); |
|
xw32(CSR6, val); |
|
|
|
return 1; |
|
} |
|
|
|
|
|
|
|
|
|
/* |
|
link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what. |
|
|
|
Must be called in locked state with interrupts disabled |
|
*/ |
|
static int link_status(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
u8 val; |
|
|
|
val = xr8(CSR12); |
|
|
|
/* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ |
|
if (!(val & (1 << 2))) |
|
return 10; |
|
/* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ |
|
if (!(val & (1 << 1))) |
|
return 100; |
|
|
|
/* If we get here -> no link at all */ |
|
|
|
return 0; |
|
} |
|
|
|
|
|
|
|
|
|
|
|
/* |
|
read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure. |
|
|
|
This function will take the spinlock itself and can, as a result, not be called with the lock helt. |
|
*/ |
|
static void read_mac_address(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned long flags; |
|
u8 link; |
|
int i; |
|
|
|
spin_lock_irqsave(&card->lock, flags); |
|
|
|
xw32(CSR9, 1 << 12); /* enable boot rom access */ |
|
for (i = 0x100; i < 0x1f7; i += link + 2) { |
|
u8 tuple, data_id, data_count; |
|
|
|
xw32(CSR10, i); |
|
tuple = xr32(CSR9); |
|
xw32(CSR10, i + 1); |
|
link = xr32(CSR9); |
|
xw32(CSR10, i + 2); |
|
data_id = xr32(CSR9); |
|
xw32(CSR10, i + 3); |
|
data_count = xr32(CSR9); |
|
if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { |
|
int j; |
|
|
|
for (j = 0; j < 6; j++) { |
|
xw32(CSR10, i + j + 4); |
|
card->dev->dev_addr[j] = xr32(CSR9) & 0xff; |
|
} |
|
break; |
|
} else if (link == 0) { |
|
break; |
|
} |
|
} |
|
spin_unlock_irqrestore(&card->lock, flags); |
|
pr_debug(" %pM\n", card->dev->dev_addr); |
|
} |
|
|
|
|
|
/* |
|
transceiver_voodoo() enables the external UTP plug thingy. |
|
it's called voodoo as I stole this code and cannot cross-reference |
|
it with the specification. |
|
*/ |
|
static void transceiver_voodoo(struct xircom_private *card) |
|
{ |
|
void __iomem *ioaddr = card->ioaddr; |
|
unsigned long flags; |
|
|
|
/* disable all powermanagement */ |
|
pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); |
|
|
|
setup_descriptors(card); |
|
|
|
spin_lock_irqsave(&card->lock, flags); |
|
|
|
xw32(CSR15, 0x0008); |
|
udelay(25); |
|
xw32(CSR15, 0xa8050000); |
|
udelay(25); |
|
xw32(CSR15, 0xa00f0000); |
|
udelay(25); |
|
|
|
spin_unlock_irqrestore(&card->lock, flags); |
|
|
|
netif_start_queue(card->dev); |
|
} |
|
|
|
|
|
static void xircom_up(struct xircom_private *card) |
|
{ |
|
unsigned long flags; |
|
int i; |
|
|
|
/* disable all powermanagement */ |
|
pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); |
|
|
|
setup_descriptors(card); |
|
|
|
spin_lock_irqsave(&card->lock, flags); |
|
|
|
|
|
enable_link_interrupt(card); |
|
enable_transmit_interrupt(card); |
|
enable_receive_interrupt(card); |
|
enable_common_interrupts(card); |
|
enable_promisc(card); |
|
|
|
/* The card can have received packets already, read them away now */ |
|
for (i=0;i<NUMDESCRIPTORS;i++) |
|
investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]); |
|
|
|
|
|
spin_unlock_irqrestore(&card->lock, flags); |
|
trigger_receive(card); |
|
trigger_transmit(card); |
|
netif_start_queue(card->dev); |
|
} |
|
|
|
/* Bufferoffset is in BYTES */ |
|
static void |
|
investigate_read_descriptor(struct net_device *dev, struct xircom_private *card, |
|
int descnr, unsigned int bufferoffset) |
|
{ |
|
int status; |
|
|
|
status = le32_to_cpu(card->rx_buffer[4*descnr]); |
|
|
|
if (status > 0) { /* packet received */ |
|
|
|
/* TODO: discard error packets */ |
|
|
|
short pkt_len = ((status >> 16) & 0x7ff) - 4; |
|
/* minus 4, we don't want the CRC */ |
|
struct sk_buff *skb; |
|
|
|
if (pkt_len > 1518) { |
|
netdev_err(dev, "Packet length %i is bogus\n", pkt_len); |
|
pkt_len = 1518; |
|
} |
|
|
|
skb = netdev_alloc_skb(dev, pkt_len + 2); |
|
if (skb == NULL) { |
|
dev->stats.rx_dropped++; |
|
goto out; |
|
} |
|
skb_reserve(skb, 2); |
|
skb_copy_to_linear_data(skb, |
|
&card->rx_buffer[bufferoffset / 4], |
|
pkt_len); |
|
skb_put(skb, pkt_len); |
|
skb->protocol = eth_type_trans(skb, dev); |
|
netif_rx(skb); |
|
dev->stats.rx_packets++; |
|
dev->stats.rx_bytes += pkt_len; |
|
|
|
out: |
|
/* give the buffer back to the card */ |
|
card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000); |
|
trigger_receive(card); |
|
} |
|
} |
|
|
|
|
|
/* Bufferoffset is in BYTES */ |
|
static void |
|
investigate_write_descriptor(struct net_device *dev, |
|
struct xircom_private *card, |
|
int descnr, unsigned int bufferoffset) |
|
{ |
|
int status; |
|
|
|
status = le32_to_cpu(card->tx_buffer[4*descnr]); |
|
#if 0 |
|
if (status & 0x8000) { /* Major error */ |
|
pr_err("Major transmit error status %x\n", status); |
|
card->tx_buffer[4*descnr] = 0; |
|
netif_wake_queue (dev); |
|
} |
|
#endif |
|
if (status > 0) { /* bit 31 is 0 when done */ |
|
if (card->tx_skb[descnr]!=NULL) { |
|
dev->stats.tx_bytes += card->tx_skb[descnr]->len; |
|
dev_kfree_skb_irq(card->tx_skb[descnr]); |
|
} |
|
card->tx_skb[descnr] = NULL; |
|
/* Bit 8 in the status field is 1 if there was a collision */ |
|
if (status & (1 << 8)) |
|
dev->stats.collisions++; |
|
card->tx_buffer[4*descnr] = 0; /* descriptor is free again */ |
|
netif_wake_queue (dev); |
|
dev->stats.tx_packets++; |
|
} |
|
} |
|
|
|
module_pci_driver(xircom_ops);
|
|
|