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555 lines
14 KiB
555 lines
14 KiB
/* |
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* Copyright (c) 2012-2016 VMware, Inc. All rights reserved. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of EITHER the GNU General Public License |
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* version 2 as published by the Free Software Foundation or the BSD |
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* 2-Clause License. This program is distributed in the hope that it |
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* will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED |
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* WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. |
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* See the GNU General Public License version 2 for more details at |
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program available in the file COPYING in the main |
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* directory of this source tree. |
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* |
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* The BSD 2-Clause License |
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* |
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* Redistribution and use in source and binary forms, with or |
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* without modification, are permitted provided that the following |
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* conditions are met: |
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* |
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* - Redistributions of source code must retain the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer. |
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* |
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* - Redistributions in binary form must reproduce the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer in the documentation and/or other materials |
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* provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED |
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* OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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|
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#ifndef __PVRDMA_H__ |
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#define __PVRDMA_H__ |
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|
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#include <linux/compiler.h> |
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#include <linux/interrupt.h> |
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#include <linux/list.h> |
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#include <linux/mutex.h> |
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#include <linux/pci.h> |
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#include <linux/semaphore.h> |
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#include <linux/workqueue.h> |
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#include <rdma/ib_umem.h> |
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#include <rdma/ib_verbs.h> |
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#include <rdma/vmw_pvrdma-abi.h> |
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#include "pvrdma_ring.h" |
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#include "pvrdma_dev_api.h" |
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#include "pvrdma_verbs.h" |
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|
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/* NOT the same as BIT_MASK(). */ |
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#define PVRDMA_MASK(n) ((n << 1) - 1) |
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|
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/* |
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* VMware PVRDMA PCI device id. |
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*/ |
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#define PCI_DEVICE_ID_VMWARE_PVRDMA 0x0820 |
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#define PVRDMA_NUM_RING_PAGES 4 |
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#define PVRDMA_QP_NUM_HEADER_PAGES 1 |
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struct pvrdma_dev; |
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struct pvrdma_page_dir { |
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dma_addr_t dir_dma; |
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u64 *dir; |
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int ntables; |
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u64 **tables; |
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u64 npages; |
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void **pages; |
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}; |
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struct pvrdma_cq { |
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struct ib_cq ibcq; |
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int offset; |
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spinlock_t cq_lock; /* Poll lock. */ |
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struct pvrdma_uar_map *uar; |
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struct ib_umem *umem; |
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struct pvrdma_ring_state *ring_state; |
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struct pvrdma_page_dir pdir; |
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u32 cq_handle; |
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bool is_kernel; |
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refcount_t refcnt; |
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struct completion free; |
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}; |
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struct pvrdma_id_table { |
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u32 last; |
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u32 top; |
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u32 max; |
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u32 mask; |
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spinlock_t lock; /* Table lock. */ |
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unsigned long *table; |
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}; |
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struct pvrdma_uar_map { |
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unsigned long pfn; |
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void __iomem *map; |
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int index; |
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}; |
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struct pvrdma_uar_table { |
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struct pvrdma_id_table tbl; |
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int size; |
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}; |
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struct pvrdma_ucontext { |
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struct ib_ucontext ibucontext; |
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struct pvrdma_dev *dev; |
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struct pvrdma_uar_map uar; |
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u64 ctx_handle; |
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}; |
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struct pvrdma_pd { |
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struct ib_pd ibpd; |
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u32 pdn; |
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u32 pd_handle; |
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int privileged; |
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}; |
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struct pvrdma_mr { |
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u32 mr_handle; |
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u64 iova; |
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u64 size; |
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}; |
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struct pvrdma_user_mr { |
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struct ib_mr ibmr; |
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struct ib_umem *umem; |
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struct pvrdma_mr mmr; |
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struct pvrdma_page_dir pdir; |
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u64 *pages; |
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u32 npages; |
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u32 max_pages; |
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u32 page_shift; |
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}; |
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struct pvrdma_wq { |
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struct pvrdma_ring *ring; |
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spinlock_t lock; /* Work queue lock. */ |
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int wqe_cnt; |
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int wqe_size; |
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int max_sg; |
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int offset; |
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}; |
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struct pvrdma_ah { |
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struct ib_ah ibah; |
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struct pvrdma_av av; |
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}; |
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struct pvrdma_srq { |
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struct ib_srq ibsrq; |
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int offset; |
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spinlock_t lock; /* SRQ lock. */ |
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int wqe_cnt; |
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int wqe_size; |
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int max_gs; |
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struct ib_umem *umem; |
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struct pvrdma_ring_state *ring; |
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struct pvrdma_page_dir pdir; |
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u32 srq_handle; |
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int npages; |
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refcount_t refcnt; |
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struct completion free; |
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}; |
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struct pvrdma_qp { |
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struct ib_qp ibqp; |
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u32 qp_handle; |
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u32 qkey; |
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struct pvrdma_wq sq; |
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struct pvrdma_wq rq; |
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struct ib_umem *rumem; |
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struct ib_umem *sumem; |
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struct pvrdma_page_dir pdir; |
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struct pvrdma_srq *srq; |
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int npages; |
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int npages_send; |
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int npages_recv; |
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u32 flags; |
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u8 port; |
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u8 state; |
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bool is_kernel; |
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struct mutex mutex; /* QP state mutex. */ |
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refcount_t refcnt; |
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struct completion free; |
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}; |
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struct pvrdma_dev { |
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/* PCI device-related information. */ |
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struct ib_device ib_dev; |
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struct pci_dev *pdev; |
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void __iomem *regs; |
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struct pvrdma_device_shared_region *dsr; /* Shared region pointer */ |
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dma_addr_t dsrbase; /* Shared region base address */ |
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void *cmd_slot; |
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void *resp_slot; |
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unsigned long flags; |
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struct list_head device_link; |
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unsigned int dsr_version; |
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/* Locking and interrupt information. */ |
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spinlock_t cmd_lock; /* Command lock. */ |
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struct semaphore cmd_sema; |
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struct completion cmd_done; |
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unsigned int nr_vectors; |
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/* RDMA-related device information. */ |
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union ib_gid *sgid_tbl; |
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struct pvrdma_ring_state *async_ring_state; |
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struct pvrdma_page_dir async_pdir; |
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struct pvrdma_ring_state *cq_ring_state; |
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struct pvrdma_page_dir cq_pdir; |
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struct pvrdma_cq **cq_tbl; |
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spinlock_t cq_tbl_lock; |
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struct pvrdma_srq **srq_tbl; |
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spinlock_t srq_tbl_lock; |
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struct pvrdma_qp **qp_tbl; |
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spinlock_t qp_tbl_lock; |
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struct pvrdma_uar_table uar_table; |
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struct pvrdma_uar_map driver_uar; |
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__be64 sys_image_guid; |
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spinlock_t desc_lock; /* Device modification lock. */ |
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u32 port_cap_mask; |
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struct mutex port_mutex; /* Port modification mutex. */ |
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bool ib_active; |
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atomic_t num_qps; |
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atomic_t num_cqs; |
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atomic_t num_srqs; |
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atomic_t num_pds; |
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atomic_t num_ahs; |
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/* Network device information. */ |
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struct net_device *netdev; |
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struct notifier_block nb_netdev; |
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}; |
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struct pvrdma_netdevice_work { |
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struct work_struct work; |
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struct net_device *event_netdev; |
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unsigned long event; |
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}; |
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static inline struct pvrdma_dev *to_vdev(struct ib_device *ibdev) |
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{ |
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return container_of(ibdev, struct pvrdma_dev, ib_dev); |
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} |
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static inline struct |
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pvrdma_ucontext *to_vucontext(struct ib_ucontext *ibucontext) |
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{ |
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return container_of(ibucontext, struct pvrdma_ucontext, ibucontext); |
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} |
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static inline struct pvrdma_pd *to_vpd(struct ib_pd *ibpd) |
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{ |
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return container_of(ibpd, struct pvrdma_pd, ibpd); |
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} |
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static inline struct pvrdma_cq *to_vcq(struct ib_cq *ibcq) |
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{ |
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return container_of(ibcq, struct pvrdma_cq, ibcq); |
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} |
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static inline struct pvrdma_srq *to_vsrq(struct ib_srq *ibsrq) |
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{ |
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return container_of(ibsrq, struct pvrdma_srq, ibsrq); |
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} |
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static inline struct pvrdma_user_mr *to_vmr(struct ib_mr *ibmr) |
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{ |
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return container_of(ibmr, struct pvrdma_user_mr, ibmr); |
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} |
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static inline struct pvrdma_qp *to_vqp(struct ib_qp *ibqp) |
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{ |
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return container_of(ibqp, struct pvrdma_qp, ibqp); |
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} |
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static inline struct pvrdma_ah *to_vah(struct ib_ah *ibah) |
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{ |
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return container_of(ibah, struct pvrdma_ah, ibah); |
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} |
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static inline void pvrdma_write_reg(struct pvrdma_dev *dev, u32 reg, u32 val) |
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{ |
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writel(cpu_to_le32(val), dev->regs + reg); |
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} |
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static inline u32 pvrdma_read_reg(struct pvrdma_dev *dev, u32 reg) |
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{ |
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return le32_to_cpu(readl(dev->regs + reg)); |
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} |
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static inline void pvrdma_write_uar_cq(struct pvrdma_dev *dev, u32 val) |
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{ |
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writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_CQ_OFFSET); |
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} |
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static inline void pvrdma_write_uar_qp(struct pvrdma_dev *dev, u32 val) |
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{ |
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writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET); |
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} |
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static inline void *pvrdma_page_dir_get_ptr(struct pvrdma_page_dir *pdir, |
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u64 offset) |
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{ |
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return pdir->pages[offset / PAGE_SIZE] + (offset % PAGE_SIZE); |
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} |
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static inline enum pvrdma_mtu ib_mtu_to_pvrdma(enum ib_mtu mtu) |
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{ |
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return (enum pvrdma_mtu)mtu; |
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} |
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static inline enum ib_mtu pvrdma_mtu_to_ib(enum pvrdma_mtu mtu) |
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{ |
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return (enum ib_mtu)mtu; |
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} |
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static inline enum pvrdma_port_state ib_port_state_to_pvrdma( |
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enum ib_port_state state) |
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{ |
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return (enum pvrdma_port_state)state; |
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} |
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static inline enum ib_port_state pvrdma_port_state_to_ib( |
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enum pvrdma_port_state state) |
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{ |
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return (enum ib_port_state)state; |
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} |
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static inline int pvrdma_port_cap_flags_to_ib(int flags) |
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{ |
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return flags; |
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} |
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static inline enum pvrdma_port_width ib_port_width_to_pvrdma( |
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enum ib_port_width width) |
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{ |
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return (enum pvrdma_port_width)width; |
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} |
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static inline enum ib_port_width pvrdma_port_width_to_ib( |
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enum pvrdma_port_width width) |
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{ |
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return (enum ib_port_width)width; |
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} |
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static inline enum pvrdma_port_speed ib_port_speed_to_pvrdma( |
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enum ib_port_speed speed) |
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{ |
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return (enum pvrdma_port_speed)speed; |
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} |
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static inline enum ib_port_speed pvrdma_port_speed_to_ib( |
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enum pvrdma_port_speed speed) |
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{ |
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return (enum ib_port_speed)speed; |
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} |
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static inline int ib_qp_attr_mask_to_pvrdma(int attr_mask) |
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{ |
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return attr_mask & PVRDMA_MASK(PVRDMA_QP_ATTR_MASK_MAX); |
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} |
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static inline enum pvrdma_mig_state ib_mig_state_to_pvrdma( |
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enum ib_mig_state state) |
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{ |
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return (enum pvrdma_mig_state)state; |
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} |
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static inline enum ib_mig_state pvrdma_mig_state_to_ib( |
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enum pvrdma_mig_state state) |
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{ |
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return (enum ib_mig_state)state; |
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} |
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static inline int ib_access_flags_to_pvrdma(int flags) |
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{ |
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return flags; |
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} |
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static inline int pvrdma_access_flags_to_ib(int flags) |
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{ |
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return flags & PVRDMA_MASK(PVRDMA_ACCESS_FLAGS_MAX); |
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} |
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static inline enum pvrdma_qp_type ib_qp_type_to_pvrdma(enum ib_qp_type type) |
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{ |
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return (enum pvrdma_qp_type)type; |
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} |
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static inline enum pvrdma_qp_state ib_qp_state_to_pvrdma(enum ib_qp_state state) |
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{ |
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return (enum pvrdma_qp_state)state; |
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} |
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static inline enum ib_qp_state pvrdma_qp_state_to_ib(enum pvrdma_qp_state state) |
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{ |
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return (enum ib_qp_state)state; |
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} |
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static inline enum pvrdma_wr_opcode ib_wr_opcode_to_pvrdma(enum ib_wr_opcode op) |
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{ |
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switch (op) { |
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case IB_WR_RDMA_WRITE: |
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return PVRDMA_WR_RDMA_WRITE; |
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case IB_WR_RDMA_WRITE_WITH_IMM: |
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return PVRDMA_WR_RDMA_WRITE_WITH_IMM; |
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case IB_WR_SEND: |
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return PVRDMA_WR_SEND; |
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case IB_WR_SEND_WITH_IMM: |
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return PVRDMA_WR_SEND_WITH_IMM; |
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case IB_WR_RDMA_READ: |
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return PVRDMA_WR_RDMA_READ; |
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case IB_WR_ATOMIC_CMP_AND_SWP: |
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return PVRDMA_WR_ATOMIC_CMP_AND_SWP; |
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case IB_WR_ATOMIC_FETCH_AND_ADD: |
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return PVRDMA_WR_ATOMIC_FETCH_AND_ADD; |
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case IB_WR_LSO: |
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return PVRDMA_WR_LSO; |
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case IB_WR_SEND_WITH_INV: |
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return PVRDMA_WR_SEND_WITH_INV; |
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case IB_WR_RDMA_READ_WITH_INV: |
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return PVRDMA_WR_RDMA_READ_WITH_INV; |
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case IB_WR_LOCAL_INV: |
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return PVRDMA_WR_LOCAL_INV; |
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case IB_WR_REG_MR: |
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return PVRDMA_WR_FAST_REG_MR; |
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case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: |
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return PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP; |
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case IB_WR_MASKED_ATOMIC_FETCH_AND_ADD: |
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return PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD; |
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case IB_WR_REG_MR_INTEGRITY: |
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return PVRDMA_WR_REG_SIG_MR; |
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default: |
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return PVRDMA_WR_ERROR; |
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} |
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} |
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static inline enum ib_wc_status pvrdma_wc_status_to_ib( |
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enum pvrdma_wc_status status) |
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{ |
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return (enum ib_wc_status)status; |
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} |
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static inline int pvrdma_wc_opcode_to_ib(unsigned int opcode) |
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{ |
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switch (opcode) { |
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case PVRDMA_WC_SEND: |
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return IB_WC_SEND; |
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case PVRDMA_WC_RDMA_WRITE: |
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return IB_WC_RDMA_WRITE; |
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case PVRDMA_WC_RDMA_READ: |
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return IB_WC_RDMA_READ; |
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case PVRDMA_WC_COMP_SWAP: |
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return IB_WC_COMP_SWAP; |
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case PVRDMA_WC_FETCH_ADD: |
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return IB_WC_FETCH_ADD; |
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case PVRDMA_WC_LOCAL_INV: |
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return IB_WC_LOCAL_INV; |
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case PVRDMA_WC_FAST_REG_MR: |
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return IB_WC_REG_MR; |
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case PVRDMA_WC_MASKED_COMP_SWAP: |
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return IB_WC_MASKED_COMP_SWAP; |
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case PVRDMA_WC_MASKED_FETCH_ADD: |
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return IB_WC_MASKED_FETCH_ADD; |
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case PVRDMA_WC_RECV: |
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return IB_WC_RECV; |
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case PVRDMA_WC_RECV_RDMA_WITH_IMM: |
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return IB_WC_RECV_RDMA_WITH_IMM; |
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default: |
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return IB_WC_SEND; |
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} |
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} |
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static inline int pvrdma_wc_flags_to_ib(int flags) |
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{ |
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return flags; |
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} |
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static inline int ib_send_flags_to_pvrdma(int flags) |
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{ |
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return flags & PVRDMA_MASK(PVRDMA_SEND_FLAGS_MAX); |
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} |
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static inline int pvrdma_network_type_to_ib(enum pvrdma_network_type type) |
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{ |
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switch (type) { |
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case PVRDMA_NETWORK_ROCE_V1: |
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return RDMA_NETWORK_ROCE_V1; |
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case PVRDMA_NETWORK_IPV4: |
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return RDMA_NETWORK_IPV4; |
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case PVRDMA_NETWORK_IPV6: |
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return RDMA_NETWORK_IPV6; |
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default: |
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return RDMA_NETWORK_IPV6; |
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} |
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} |
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void pvrdma_qp_cap_to_ib(struct ib_qp_cap *dst, |
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const struct pvrdma_qp_cap *src); |
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void ib_qp_cap_to_pvrdma(struct pvrdma_qp_cap *dst, |
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const struct ib_qp_cap *src); |
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void pvrdma_gid_to_ib(union ib_gid *dst, const union pvrdma_gid *src); |
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void ib_gid_to_pvrdma(union pvrdma_gid *dst, const union ib_gid *src); |
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void pvrdma_global_route_to_ib(struct ib_global_route *dst, |
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const struct pvrdma_global_route *src); |
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void ib_global_route_to_pvrdma(struct pvrdma_global_route *dst, |
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const struct ib_global_route *src); |
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void pvrdma_ah_attr_to_rdma(struct rdma_ah_attr *dst, |
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const struct pvrdma_ah_attr *src); |
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void rdma_ah_attr_to_pvrdma(struct pvrdma_ah_attr *dst, |
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const struct rdma_ah_attr *src); |
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u8 ib_gid_type_to_pvrdma(enum ib_gid_type gid_type); |
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int pvrdma_uar_table_init(struct pvrdma_dev *dev); |
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void pvrdma_uar_table_cleanup(struct pvrdma_dev *dev); |
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int pvrdma_uar_alloc(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar); |
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void pvrdma_uar_free(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar); |
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void _pvrdma_flush_cqe(struct pvrdma_qp *qp, struct pvrdma_cq *cq); |
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int pvrdma_page_dir_init(struct pvrdma_dev *dev, struct pvrdma_page_dir *pdir, |
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u64 npages, bool alloc_pages); |
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void pvrdma_page_dir_cleanup(struct pvrdma_dev *dev, |
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struct pvrdma_page_dir *pdir); |
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int pvrdma_page_dir_insert_dma(struct pvrdma_page_dir *pdir, u64 idx, |
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dma_addr_t daddr); |
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int pvrdma_page_dir_insert_umem(struct pvrdma_page_dir *pdir, |
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struct ib_umem *umem, u64 offset); |
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dma_addr_t pvrdma_page_dir_get_dma(struct pvrdma_page_dir *pdir, u64 idx); |
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int pvrdma_page_dir_insert_page_list(struct pvrdma_page_dir *pdir, |
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u64 *page_list, int num_pages); |
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int pvrdma_cmd_post(struct pvrdma_dev *dev, union pvrdma_cmd_req *req, |
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union pvrdma_cmd_resp *rsp, unsigned resp_code); |
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#endif /* __PVRDMA_H__ */
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