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803 lines
21 KiB
803 lines
21 KiB
/* |
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* Copyright (c) 2013 Intel Corporation. All rights reserved. |
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* Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. |
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
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* |
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* This software is available to you under a choice of one of two |
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* licenses. You may choose to be licensed under the terms of the GNU |
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* General Public License (GPL) Version 2, available from the file |
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* COPYING in the main directory of this source tree, or the |
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* OpenIB.org BSD license below: |
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* |
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* Redistribution and use in source and binary forms, with or |
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* without modification, are permitted provided that the following |
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* conditions are met: |
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* |
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* - Redistributions of source code must retain the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer. |
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* |
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* - Redistributions in binary form must reproduce the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer in the documentation and/or other materials |
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* provided with the distribution. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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* SOFTWARE. |
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*/ |
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|
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#include <linux/spinlock.h> |
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#include <linux/pci.h> |
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#include <linux/io.h> |
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#include <linux/delay.h> |
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#include <linux/netdevice.h> |
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#include <linux/vmalloc.h> |
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#include <linux/module.h> |
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#include <linux/prefetch.h> |
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|
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#include "qib.h" |
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|
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/* |
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* The size has to be longer than this string, so we can append |
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* board/chip information to it in the init code. |
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*/ |
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const char ib_qib_version[] = QIB_DRIVER_VERSION "\n"; |
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|
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DEFINE_MUTEX(qib_mutex); /* general driver use */ |
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|
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unsigned qib_ibmtu; |
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module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO); |
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MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096"); |
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|
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unsigned qib_compat_ddr_negotiate = 1; |
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module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint, |
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S_IWUSR | S_IRUGO); |
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MODULE_PARM_DESC(compat_ddr_negotiate, |
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"Attempt pre-IBTA 1.2 DDR speed negotiation"); |
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|
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MODULE_LICENSE("Dual BSD/GPL"); |
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MODULE_AUTHOR("Intel <[email protected]>"); |
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MODULE_DESCRIPTION("Intel IB driver"); |
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|
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/* |
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* QIB_PIO_MAXIBHDR is the max IB header size allowed for in our |
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* PIO send buffers. This is well beyond anything currently |
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* defined in the InfiniBand spec. |
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*/ |
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#define QIB_PIO_MAXIBHDR 128 |
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|
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/* |
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* QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt. |
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*/ |
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#define QIB_MAX_PKT_RECV 64 |
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|
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struct qlogic_ib_stats qib_stats; |
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|
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struct pci_dev *qib_get_pci_dev(struct rvt_dev_info *rdi) |
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{ |
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struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi); |
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struct qib_devdata *dd = container_of(ibdev, |
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struct qib_devdata, verbs_dev); |
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return dd->pcidev; |
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} |
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|
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/* |
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* Return count of units with at least one port ACTIVE. |
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*/ |
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int qib_count_active_units(void) |
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{ |
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struct qib_devdata *dd; |
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struct qib_pportdata *ppd; |
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unsigned long index, flags; |
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int pidx, nunits_active = 0; |
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|
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xa_lock_irqsave(&qib_dev_table, flags); |
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xa_for_each(&qib_dev_table, index, dd) { |
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if (!(dd->flags & QIB_PRESENT) || !dd->kregbase) |
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continue; |
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for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
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ppd = dd->pport + pidx; |
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if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT | |
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QIBL_LINKARMED | QIBL_LINKACTIVE))) { |
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nunits_active++; |
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break; |
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} |
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} |
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} |
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xa_unlock_irqrestore(&qib_dev_table, flags); |
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return nunits_active; |
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} |
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|
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/* |
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* Return count of all units, optionally return in arguments |
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* the number of usable (present) units, and the number of |
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* ports that are up. |
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*/ |
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int qib_count_units(int *npresentp, int *nupp) |
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{ |
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int nunits = 0, npresent = 0, nup = 0; |
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struct qib_devdata *dd; |
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unsigned long index, flags; |
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int pidx; |
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struct qib_pportdata *ppd; |
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|
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xa_lock_irqsave(&qib_dev_table, flags); |
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xa_for_each(&qib_dev_table, index, dd) { |
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nunits++; |
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if ((dd->flags & QIB_PRESENT) && dd->kregbase) |
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npresent++; |
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for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
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ppd = dd->pport + pidx; |
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if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT | |
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QIBL_LINKARMED | QIBL_LINKACTIVE))) |
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nup++; |
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} |
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} |
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xa_unlock_irqrestore(&qib_dev_table, flags); |
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|
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if (npresentp) |
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*npresentp = npresent; |
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if (nupp) |
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*nupp = nup; |
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|
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return nunits; |
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} |
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|
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/** |
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* qib_wait_linkstate - wait for an IB link state change to occur |
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* @ppd: the qlogic_ib device |
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* @state: the state to wait for |
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* @msecs: the number of milliseconds to wait |
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* |
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* wait up to msecs milliseconds for IB link state change to occur for |
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* now, take the easy polling route. Currently used only by |
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* qib_set_linkstate. Returns 0 if state reached, otherwise |
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* -ETIMEDOUT state can have multiple states set, for any of several |
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* transitions. |
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*/ |
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int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs) |
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{ |
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int ret; |
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unsigned long flags; |
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|
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spin_lock_irqsave(&ppd->lflags_lock, flags); |
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if (ppd->state_wanted) { |
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spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
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ret = -EBUSY; |
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goto bail; |
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} |
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ppd->state_wanted = state; |
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spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
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wait_event_interruptible_timeout(ppd->state_wait, |
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(ppd->lflags & state), |
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msecs_to_jiffies(msecs)); |
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spin_lock_irqsave(&ppd->lflags_lock, flags); |
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ppd->state_wanted = 0; |
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spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
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|
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if (!(ppd->lflags & state)) |
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ret = -ETIMEDOUT; |
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else |
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ret = 0; |
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bail: |
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return ret; |
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} |
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int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate) |
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{ |
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u32 lstate; |
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int ret; |
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struct qib_devdata *dd = ppd->dd; |
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unsigned long flags; |
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|
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switch (newstate) { |
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case QIB_IB_LINKDOWN_ONLY: |
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dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, |
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IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP); |
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/* don't wait */ |
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ret = 0; |
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goto bail; |
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|
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case QIB_IB_LINKDOWN: |
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dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, |
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IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL); |
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/* don't wait */ |
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ret = 0; |
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goto bail; |
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|
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case QIB_IB_LINKDOWN_SLEEP: |
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dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, |
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IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP); |
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/* don't wait */ |
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ret = 0; |
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goto bail; |
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|
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case QIB_IB_LINKDOWN_DISABLE: |
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dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, |
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IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE); |
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/* don't wait */ |
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ret = 0; |
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goto bail; |
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|
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case QIB_IB_LINKARM: |
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if (ppd->lflags & QIBL_LINKARMED) { |
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ret = 0; |
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goto bail; |
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} |
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if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) { |
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ret = -EINVAL; |
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goto bail; |
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} |
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/* |
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* Since the port can be ACTIVE when we ask for ARMED, |
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* clear QIBL_LINKV so we can wait for a transition. |
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* If the link isn't ARMED, then something else happened |
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* and there is no point waiting for ARMED. |
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*/ |
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spin_lock_irqsave(&ppd->lflags_lock, flags); |
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ppd->lflags &= ~QIBL_LINKV; |
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spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
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dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, |
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IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP); |
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lstate = QIBL_LINKV; |
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break; |
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case QIB_IB_LINKACTIVE: |
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if (ppd->lflags & QIBL_LINKACTIVE) { |
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ret = 0; |
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goto bail; |
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} |
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if (!(ppd->lflags & QIBL_LINKARMED)) { |
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ret = -EINVAL; |
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goto bail; |
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} |
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dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, |
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IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP); |
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lstate = QIBL_LINKACTIVE; |
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break; |
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default: |
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ret = -EINVAL; |
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goto bail; |
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} |
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ret = qib_wait_linkstate(ppd, lstate, 10); |
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bail: |
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return ret; |
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} |
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/* |
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* Get address of eager buffer from it's index (allocated in chunks, not |
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* contiguous). |
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*/ |
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static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail) |
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{ |
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const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift; |
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const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1); |
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return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift); |
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} |
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/* |
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* Returns 1 if error was a CRC, else 0. |
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* Needed for some chip's synthesized error counters. |
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*/ |
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static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd, |
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u32 ctxt, u32 eflags, u32 l, u32 etail, |
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__le32 *rhf_addr, struct qib_message_header *rhdr) |
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{ |
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u32 ret = 0; |
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|
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if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR)) |
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ret = 1; |
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else if (eflags == QLOGIC_IB_RHF_H_TIDERR) { |
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/* For TIDERR and RC QPs premptively schedule a NAK */ |
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struct ib_header *hdr = (struct ib_header *)rhdr; |
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struct ib_other_headers *ohdr = NULL; |
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struct qib_ibport *ibp = &ppd->ibport_data; |
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struct qib_devdata *dd = ppd->dd; |
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struct rvt_dev_info *rdi = &dd->verbs_dev.rdi; |
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struct rvt_qp *qp = NULL; |
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u32 tlen = qib_hdrget_length_in_bytes(rhf_addr); |
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u16 lid = be16_to_cpu(hdr->lrh[1]); |
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int lnh = be16_to_cpu(hdr->lrh[0]) & 3; |
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u32 qp_num; |
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u32 opcode; |
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u32 psn; |
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int diff; |
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|
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/* Sanity check packet */ |
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if (tlen < 24) |
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goto drop; |
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|
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if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) { |
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lid &= ~((1 << ppd->lmc) - 1); |
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if (unlikely(lid != ppd->lid)) |
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goto drop; |
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} |
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|
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/* Check for GRH */ |
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if (lnh == QIB_LRH_BTH) |
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ohdr = &hdr->u.oth; |
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else if (lnh == QIB_LRH_GRH) { |
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u32 vtf; |
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|
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ohdr = &hdr->u.l.oth; |
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if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR) |
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goto drop; |
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vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow); |
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if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) |
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goto drop; |
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} else |
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goto drop; |
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|
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/* Get opcode and PSN from packet */ |
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opcode = be32_to_cpu(ohdr->bth[0]); |
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opcode >>= 24; |
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psn = be32_to_cpu(ohdr->bth[2]); |
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|
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/* Get the destination QP number. */ |
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qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK; |
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if (qp_num != QIB_MULTICAST_QPN) { |
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int ruc_res; |
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|
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rcu_read_lock(); |
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qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num); |
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if (!qp) { |
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rcu_read_unlock(); |
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goto drop; |
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} |
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|
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/* |
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* Handle only RC QPs - for other QP types drop error |
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* packet. |
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*/ |
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spin_lock(&qp->r_lock); |
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|
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/* Check for valid receive state. */ |
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if (!(ib_rvt_state_ops[qp->state] & |
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RVT_PROCESS_RECV_OK)) { |
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ibp->rvp.n_pkt_drops++; |
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goto unlock; |
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} |
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|
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switch (qp->ibqp.qp_type) { |
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case IB_QPT_RC: |
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ruc_res = |
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qib_ruc_check_hdr( |
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ibp, hdr, |
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lnh == QIB_LRH_GRH, |
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qp, |
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be32_to_cpu(ohdr->bth[0])); |
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if (ruc_res) |
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goto unlock; |
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|
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/* Only deal with RDMA Writes for now */ |
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if (opcode < |
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IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { |
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diff = qib_cmp24(psn, qp->r_psn); |
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if (!qp->r_nak_state && diff >= 0) { |
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ibp->rvp.n_rc_seqnak++; |
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qp->r_nak_state = |
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IB_NAK_PSN_ERROR; |
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/* Use the expected PSN. */ |
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qp->r_ack_psn = qp->r_psn; |
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/* |
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* Wait to send the sequence |
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* NAK until all packets |
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* in the receive queue have |
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* been processed. |
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* Otherwise, we end up |
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* propagating congestion. |
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*/ |
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if (list_empty(&qp->rspwait)) { |
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qp->r_flags |= |
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RVT_R_RSP_NAK; |
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rvt_get_qp(qp); |
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list_add_tail( |
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&qp->rspwait, |
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&rcd->qp_wait_list); |
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} |
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} /* Out of sequence NAK */ |
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} /* QP Request NAKs */ |
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break; |
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case IB_QPT_SMI: |
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case IB_QPT_GSI: |
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case IB_QPT_UD: |
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case IB_QPT_UC: |
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default: |
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/* For now don't handle any other QP types */ |
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break; |
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} |
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|
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unlock: |
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spin_unlock(&qp->r_lock); |
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rcu_read_unlock(); |
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} /* Unicast QP */ |
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} /* Valid packet with TIDErr */ |
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|
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drop: |
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return ret; |
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} |
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|
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/* |
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* qib_kreceive - receive a packet |
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* @rcd: the qlogic_ib context |
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* @llic: gets count of good packets needed to clear lli, |
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* (used with chips that need need to track crcs for lli) |
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* |
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* called from interrupt handler for errors or receive interrupt |
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* Returns number of CRC error packets, needed by some chips for |
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* local link integrity tracking. crcs are adjusted down by following |
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* good packets, if any, and count of good packets is also tracked. |
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*/ |
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u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts) |
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{ |
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struct qib_devdata *dd = rcd->dd; |
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struct qib_pportdata *ppd = rcd->ppd; |
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__le32 *rhf_addr; |
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void *ebuf; |
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const u32 rsize = dd->rcvhdrentsize; /* words */ |
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const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */ |
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u32 etail = -1, l, hdrqtail; |
|
struct qib_message_header *hdr; |
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u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0; |
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int last; |
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u64 lval; |
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struct rvt_qp *qp, *nqp; |
|
|
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l = rcd->head; |
|
rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; |
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if (dd->flags & QIB_NODMA_RTAIL) { |
|
u32 seq = qib_hdrget_seq(rhf_addr); |
|
|
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if (seq != rcd->seq_cnt) |
|
goto bail; |
|
hdrqtail = 0; |
|
} else { |
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hdrqtail = qib_get_rcvhdrtail(rcd); |
|
if (l == hdrqtail) |
|
goto bail; |
|
smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ |
|
} |
|
|
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for (last = 0, i = 1; !last; i += !last) { |
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hdr = dd->f_get_msgheader(dd, rhf_addr); |
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eflags = qib_hdrget_err_flags(rhf_addr); |
|
etype = qib_hdrget_rcv_type(rhf_addr); |
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/* total length */ |
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tlen = qib_hdrget_length_in_bytes(rhf_addr); |
|
ebuf = NULL; |
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if ((dd->flags & QIB_NODMA_RTAIL) ? |
|
qib_hdrget_use_egr_buf(rhf_addr) : |
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(etype != RCVHQ_RCV_TYPE_EXPECTED)) { |
|
etail = qib_hdrget_index(rhf_addr); |
|
updegr = 1; |
|
if (tlen > sizeof(*hdr) || |
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etype >= RCVHQ_RCV_TYPE_NON_KD) { |
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ebuf = qib_get_egrbuf(rcd, etail); |
|
prefetch_range(ebuf, tlen - sizeof(*hdr)); |
|
} |
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} |
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if (!eflags) { |
|
u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2; |
|
|
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if (lrh_len != tlen) { |
|
qib_stats.sps_lenerrs++; |
|
goto move_along; |
|
} |
|
} |
|
if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags && |
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ebuf == NULL && |
|
tlen > (dd->rcvhdrentsize - 2 + 1 - |
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qib_hdrget_offset(rhf_addr)) << 2) { |
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goto move_along; |
|
} |
|
|
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/* |
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* Both tiderr and qibhdrerr are set for all plain IB |
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* packets; only qibhdrerr should be set. |
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*/ |
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if (unlikely(eflags)) |
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crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l, |
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etail, rhf_addr, hdr); |
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else if (etype == RCVHQ_RCV_TYPE_NON_KD) { |
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qib_ib_rcv(rcd, hdr, ebuf, tlen); |
|
if (crcs) |
|
crcs--; |
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else if (llic && *llic) |
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--*llic; |
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} |
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move_along: |
|
l += rsize; |
|
if (l >= maxcnt) |
|
l = 0; |
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if (i == QIB_MAX_PKT_RECV) |
|
last = 1; |
|
|
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rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; |
|
if (dd->flags & QIB_NODMA_RTAIL) { |
|
u32 seq = qib_hdrget_seq(rhf_addr); |
|
|
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if (++rcd->seq_cnt > 13) |
|
rcd->seq_cnt = 1; |
|
if (seq != rcd->seq_cnt) |
|
last = 1; |
|
} else if (l == hdrqtail) |
|
last = 1; |
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/* |
|
* Update head regs etc., every 16 packets, if not last pkt, |
|
* to help prevent rcvhdrq overflows, when many packets |
|
* are processed and queue is nearly full. |
|
* Don't request an interrupt for intermediate updates. |
|
*/ |
|
lval = l; |
|
if (!last && !(i & 0xf)) { |
|
dd->f_update_usrhead(rcd, lval, updegr, etail, i); |
|
updegr = 0; |
|
} |
|
} |
|
|
|
rcd->head = l; |
|
|
|
/* |
|
* Iterate over all QPs waiting to respond. |
|
* The list won't change since the IRQ is only run on one CPU. |
|
*/ |
|
list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) { |
|
list_del_init(&qp->rspwait); |
|
if (qp->r_flags & RVT_R_RSP_NAK) { |
|
qp->r_flags &= ~RVT_R_RSP_NAK; |
|
qib_send_rc_ack(qp); |
|
} |
|
if (qp->r_flags & RVT_R_RSP_SEND) { |
|
unsigned long flags; |
|
|
|
qp->r_flags &= ~RVT_R_RSP_SEND; |
|
spin_lock_irqsave(&qp->s_lock, flags); |
|
if (ib_rvt_state_ops[qp->state] & |
|
RVT_PROCESS_OR_FLUSH_SEND) |
|
qib_schedule_send(qp); |
|
spin_unlock_irqrestore(&qp->s_lock, flags); |
|
} |
|
rvt_put_qp(qp); |
|
} |
|
|
|
bail: |
|
/* Report number of packets consumed */ |
|
if (npkts) |
|
*npkts = i; |
|
|
|
/* |
|
* Always write head at end, and setup rcv interrupt, even |
|
* if no packets were processed. |
|
*/ |
|
lval = (u64)rcd->head | dd->rhdrhead_intr_off; |
|
dd->f_update_usrhead(rcd, lval, updegr, etail, i); |
|
return crcs; |
|
} |
|
|
|
/** |
|
* qib_set_mtu - set the MTU |
|
* @ppd: the perport data |
|
* @arg: the new MTU |
|
* |
|
* We can handle "any" incoming size, the issue here is whether we |
|
* need to restrict our outgoing size. For now, we don't do any |
|
* sanity checking on this, and we don't deal with what happens to |
|
* programs that are already running when the size changes. |
|
* NOTE: changing the MTU will usually cause the IBC to go back to |
|
* link INIT state... |
|
*/ |
|
int qib_set_mtu(struct qib_pportdata *ppd, u16 arg) |
|
{ |
|
u32 piosize; |
|
int ret, chk; |
|
|
|
if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 && |
|
arg != 4096) { |
|
ret = -EINVAL; |
|
goto bail; |
|
} |
|
chk = ib_mtu_enum_to_int(qib_ibmtu); |
|
if (chk > 0 && arg > chk) { |
|
ret = -EINVAL; |
|
goto bail; |
|
} |
|
|
|
piosize = ppd->ibmaxlen; |
|
ppd->ibmtu = arg; |
|
|
|
if (arg >= (piosize - QIB_PIO_MAXIBHDR)) { |
|
/* Only if it's not the initial value (or reset to it) */ |
|
if (piosize != ppd->init_ibmaxlen) { |
|
if (arg > piosize && arg <= ppd->init_ibmaxlen) |
|
piosize = ppd->init_ibmaxlen - 2 * sizeof(u32); |
|
ppd->ibmaxlen = piosize; |
|
} |
|
} else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) { |
|
piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32); |
|
ppd->ibmaxlen = piosize; |
|
} |
|
|
|
ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0); |
|
|
|
ret = 0; |
|
|
|
bail: |
|
return ret; |
|
} |
|
|
|
int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc) |
|
{ |
|
struct qib_devdata *dd = ppd->dd; |
|
|
|
ppd->lid = lid; |
|
ppd->lmc = lmc; |
|
|
|
dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC, |
|
lid | (~((1U << lmc) - 1)) << 16); |
|
|
|
qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n", |
|
dd->unit, ppd->port, lid); |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* Following deal with the "obviously simple" task of overriding the state |
|
* of the LEDS, which normally indicate link physical and logical status. |
|
* The complications arise in dealing with different hardware mappings |
|
* and the board-dependent routine being called from interrupts. |
|
* and then there's the requirement to _flash_ them. |
|
*/ |
|
#define LED_OVER_FREQ_SHIFT 8 |
|
#define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT) |
|
/* Below is "non-zero" to force override, but both actual LEDs are off */ |
|
#define LED_OVER_BOTH_OFF (8) |
|
|
|
static void qib_run_led_override(struct timer_list *t) |
|
{ |
|
struct qib_pportdata *ppd = from_timer(ppd, t, |
|
led_override_timer); |
|
struct qib_devdata *dd = ppd->dd; |
|
int timeoff; |
|
int ph_idx; |
|
|
|
if (!(dd->flags & QIB_INITTED)) |
|
return; |
|
|
|
ph_idx = ppd->led_override_phase++ & 1; |
|
ppd->led_override = ppd->led_override_vals[ph_idx]; |
|
timeoff = ppd->led_override_timeoff; |
|
|
|
dd->f_setextled(ppd, 1); |
|
/* |
|
* don't re-fire the timer if user asked for it to be off; we let |
|
* it fire one more time after they turn it off to simplify |
|
*/ |
|
if (ppd->led_override_vals[0] || ppd->led_override_vals[1]) |
|
mod_timer(&ppd->led_override_timer, jiffies + timeoff); |
|
} |
|
|
|
void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val) |
|
{ |
|
struct qib_devdata *dd = ppd->dd; |
|
int timeoff, freq; |
|
|
|
if (!(dd->flags & QIB_INITTED)) |
|
return; |
|
|
|
/* First check if we are blinking. If not, use 1HZ polling */ |
|
timeoff = HZ; |
|
freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT; |
|
|
|
if (freq) { |
|
/* For blink, set each phase from one nybble of val */ |
|
ppd->led_override_vals[0] = val & 0xF; |
|
ppd->led_override_vals[1] = (val >> 4) & 0xF; |
|
timeoff = (HZ << 4)/freq; |
|
} else { |
|
/* Non-blink set both phases the same. */ |
|
ppd->led_override_vals[0] = val & 0xF; |
|
ppd->led_override_vals[1] = val & 0xF; |
|
} |
|
ppd->led_override_timeoff = timeoff; |
|
|
|
/* |
|
* If the timer has not already been started, do so. Use a "quick" |
|
* timeout so the function will be called soon, to look at our request. |
|
*/ |
|
if (atomic_inc_return(&ppd->led_override_timer_active) == 1) { |
|
/* Need to start timer */ |
|
timer_setup(&ppd->led_override_timer, qib_run_led_override, 0); |
|
ppd->led_override_timer.expires = jiffies + 1; |
|
add_timer(&ppd->led_override_timer); |
|
} else { |
|
if (ppd->led_override_vals[0] || ppd->led_override_vals[1]) |
|
mod_timer(&ppd->led_override_timer, jiffies + 1); |
|
atomic_dec(&ppd->led_override_timer_active); |
|
} |
|
} |
|
|
|
/** |
|
* qib_reset_device - reset the chip if possible |
|
* @unit: the device to reset |
|
* |
|
* Whether or not reset is successful, we attempt to re-initialize the chip |
|
* (that is, much like a driver unload/reload). We clear the INITTED flag |
|
* so that the various entry points will fail until we reinitialize. For |
|
* now, we only allow this if no user contexts are open that use chip resources |
|
*/ |
|
int qib_reset_device(int unit) |
|
{ |
|
int ret, i; |
|
struct qib_devdata *dd = qib_lookup(unit); |
|
struct qib_pportdata *ppd; |
|
unsigned long flags; |
|
int pidx; |
|
|
|
if (!dd) { |
|
ret = -ENODEV; |
|
goto bail; |
|
} |
|
|
|
qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit); |
|
|
|
if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) { |
|
qib_devinfo(dd->pcidev, |
|
"Invalid unit number %u or not initialized or not present\n", |
|
unit); |
|
ret = -ENXIO; |
|
goto bail; |
|
} |
|
|
|
spin_lock_irqsave(&dd->uctxt_lock, flags); |
|
if (dd->rcd) |
|
for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) { |
|
if (!dd->rcd[i] || !dd->rcd[i]->cnt) |
|
continue; |
|
spin_unlock_irqrestore(&dd->uctxt_lock, flags); |
|
ret = -EBUSY; |
|
goto bail; |
|
} |
|
spin_unlock_irqrestore(&dd->uctxt_lock, flags); |
|
|
|
for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
|
ppd = dd->pport + pidx; |
|
if (atomic_read(&ppd->led_override_timer_active)) { |
|
/* Need to stop LED timer, _then_ shut off LEDs */ |
|
del_timer_sync(&ppd->led_override_timer); |
|
atomic_set(&ppd->led_override_timer_active, 0); |
|
} |
|
|
|
/* Shut off LEDs after we are sure timer is not running */ |
|
ppd->led_override = LED_OVER_BOTH_OFF; |
|
dd->f_setextled(ppd, 0); |
|
if (dd->flags & QIB_HAS_SEND_DMA) |
|
qib_teardown_sdma(ppd); |
|
} |
|
|
|
ret = dd->f_reset(dd); |
|
if (ret == 1) |
|
ret = qib_init(dd, 1); |
|
else |
|
ret = -EAGAIN; |
|
if (ret) |
|
qib_dev_err(dd, |
|
"Reinitialize unit %u after reset failed with %d\n", |
|
unit, ret); |
|
else |
|
qib_devinfo(dd->pcidev, |
|
"Reinitialized unit %u after resetting\n", |
|
unit); |
|
|
|
bail: |
|
return ret; |
|
}
|
|
|