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259 lines
7.9 KiB
259 lines
7.9 KiB
#ifndef _HFI1_USER_SDMA_H |
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#define _HFI1_USER_SDMA_H |
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/* |
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* Copyright(c) 2020 - Cornelis Networks, Inc. |
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* Copyright(c) 2015 - 2018 Intel Corporation. |
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* |
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* This file is provided under a dual BSD/GPLv2 license. When using or |
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* redistributing this file, you may do so under either license. |
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* |
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* GPL LICENSE SUMMARY |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of version 2 of the GNU General Public License as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details. |
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* |
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* BSD LICENSE |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* - Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* - Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* - Neither the name of Intel Corporation nor the names of its |
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* contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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*/ |
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#include <linux/device.h> |
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#include <linux/wait.h> |
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#include "common.h" |
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#include "iowait.h" |
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#include "user_exp_rcv.h" |
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#include "mmu_rb.h" |
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/* The maximum number of Data io vectors per message/request */ |
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#define MAX_VECTORS_PER_REQ 8 |
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/* |
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* Maximum number of packet to send from each message/request |
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* before moving to the next one. |
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*/ |
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#define MAX_PKTS_PER_QUEUE 16 |
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#define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT)) |
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#define req_opcode(x) \ |
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(((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) |
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#define req_version(x) \ |
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(((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) |
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#define req_iovcnt(x) \ |
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(((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK) |
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/* Number of BTH.PSN bits used for sequence number in expected rcvs */ |
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#define BTH_SEQ_MASK 0x7ffull |
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#define AHG_KDETH_INTR_SHIFT 12 |
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#define AHG_KDETH_SH_SHIFT 13 |
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#define AHG_KDETH_ARRAY_SIZE 9 |
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#define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4) |
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#define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff) |
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/** |
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* Build an SDMA AHG header update descriptor and save it to an array. |
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* @arr - Array to save the descriptor to. |
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* @idx - Index of the array at which the descriptor will be saved. |
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* @array_size - Size of the array arr. |
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* @dw - Update index into the header in DWs. |
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* @bit - Start bit. |
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* @width - Field width. |
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* @value - 16 bits of immediate data to write into the field. |
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* Returns -ERANGE if idx is invalid. If successful, returns the next index |
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* (idx + 1) of the array to be used for the next descriptor. |
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*/ |
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static inline int ahg_header_set(u32 *arr, int idx, size_t array_size, |
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u8 dw, u8 bit, u8 width, u16 value) |
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{ |
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if ((size_t)idx >= array_size) |
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return -ERANGE; |
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arr[idx++] = sdma_build_ahg_descriptor(value, dw, bit, width); |
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return idx; |
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} |
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/* Tx request flag bits */ |
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#define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */ |
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#define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */ |
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enum pkt_q_sdma_state { |
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SDMA_PKT_Q_ACTIVE, |
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SDMA_PKT_Q_DEFERRED, |
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}; |
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#define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */ |
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#define SDMA_DBG(req, fmt, ...) \ |
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hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \ |
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(req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \ |
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##__VA_ARGS__) |
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struct hfi1_user_sdma_pkt_q { |
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u16 ctxt; |
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u16 subctxt; |
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u16 n_max_reqs; |
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atomic_t n_reqs; |
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u16 reqidx; |
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struct hfi1_devdata *dd; |
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struct kmem_cache *txreq_cache; |
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struct user_sdma_request *reqs; |
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unsigned long *req_in_use; |
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struct iowait busy; |
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enum pkt_q_sdma_state state; |
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wait_queue_head_t wait; |
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unsigned long unpinned; |
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struct mmu_rb_handler *handler; |
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atomic_t n_locked; |
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}; |
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struct hfi1_user_sdma_comp_q { |
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u16 nentries; |
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struct hfi1_sdma_comp_entry *comps; |
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}; |
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struct sdma_mmu_node { |
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struct mmu_rb_node rb; |
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struct hfi1_user_sdma_pkt_q *pq; |
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atomic_t refcount; |
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struct page **pages; |
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unsigned int npages; |
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}; |
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struct user_sdma_iovec { |
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struct list_head list; |
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struct iovec iov; |
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/* number of pages in this vector */ |
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unsigned int npages; |
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/* array of pinned pages for this vector */ |
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struct page **pages; |
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/* |
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* offset into the virtual address space of the vector at |
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* which we last left off. |
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*/ |
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u64 offset; |
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struct sdma_mmu_node *node; |
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}; |
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/* evict operation argument */ |
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struct evict_data { |
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u32 cleared; /* count evicted so far */ |
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u32 target; /* target count to evict */ |
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}; |
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struct user_sdma_request { |
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/* This is the original header from user space */ |
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struct hfi1_pkt_header hdr; |
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/* Read mostly fields */ |
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struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp; |
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struct hfi1_user_sdma_comp_q *cq; |
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/* |
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* Pointer to the SDMA engine for this request. |
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* Since different request could be on different VLs, |
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* each request will need it's own engine pointer. |
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*/ |
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struct sdma_engine *sde; |
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struct sdma_req_info info; |
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/* TID array values copied from the tid_iov vector */ |
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u32 *tids; |
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/* total length of the data in the request */ |
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u32 data_len; |
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/* number of elements copied to the tids array */ |
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u16 n_tids; |
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/* |
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* We copy the iovs for this request (based on |
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* info.iovcnt). These are only the data vectors |
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*/ |
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u8 data_iovs; |
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s8 ahg_idx; |
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/* Writeable fields shared with interrupt */ |
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u16 seqcomp ____cacheline_aligned_in_smp; |
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u16 seqsubmitted; |
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/* Send side fields */ |
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struct list_head txps ____cacheline_aligned_in_smp; |
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u16 seqnum; |
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/* |
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* KDETH.OFFSET (TID) field |
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* The offset can cover multiple packets, depending on the |
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* size of the TID entry. |
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*/ |
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u32 tidoffset; |
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/* |
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* KDETH.Offset (Eager) field |
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* We need to remember the initial value so the headers |
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* can be updated properly. |
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*/ |
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u32 koffset; |
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u32 sent; |
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/* TID index copied from the tid_iov vector */ |
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u16 tididx; |
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/* progress index moving along the iovs array */ |
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u8 iov_idx; |
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u8 has_error; |
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struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ]; |
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} ____cacheline_aligned_in_smp; |
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/* |
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* A single txreq could span up to 3 physical pages when the MTU |
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* is sufficiently large (> 4K). Each of the IOV pointers also |
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* needs it's own set of flags so the vector has been handled |
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* independently of each other. |
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*/ |
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struct user_sdma_txreq { |
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/* Packet header for the txreq */ |
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struct hfi1_pkt_header hdr; |
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struct sdma_txreq txreq; |
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struct list_head list; |
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struct user_sdma_request *req; |
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u16 flags; |
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u16 seqnum; |
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}; |
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int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, |
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struct hfi1_filedata *fd); |
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int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd, |
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struct hfi1_ctxtdata *uctxt); |
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int hfi1_user_sdma_process_request(struct hfi1_filedata *fd, |
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struct iovec *iovec, unsigned long dim, |
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unsigned long *count); |
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static inline struct mm_struct *mm_from_sdma_node(struct sdma_mmu_node *node) |
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{ |
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return node->rb.handler->mn.mm; |
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} |
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#endif /* _HFI1_USER_SDMA_H */
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