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434 lines
12 KiB
434 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Freescale General-purpose Timers Module |
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* |
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* Copyright (c) Freescale Semiconductor, Inc. 2006. |
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* Shlomi Gridish <[email protected]> |
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* Jerry Huang <[email protected]> |
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* Copyright (c) MontaVista Software, Inc. 2008. |
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* Anton Vorontsov <[email protected]> |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/err.h> |
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#include <linux/errno.h> |
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#include <linux/list.h> |
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#include <linux/io.h> |
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#include <linux/of.h> |
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#include <linux/of_address.h> |
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#include <linux/of_irq.h> |
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#include <linux/spinlock.h> |
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#include <linux/bitops.h> |
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#include <linux/slab.h> |
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#include <linux/export.h> |
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#include <asm/fsl_gtm.h> |
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#define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) |
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#define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0) |
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#define GTMDR_ICLK_MASK (3 << 1) |
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#define GTMDR_ICLK_ICAS (0 << 1) |
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#define GTMDR_ICLK_ICLK (1 << 1) |
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#define GTMDR_ICLK_SLGO (2 << 1) |
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#define GTMDR_FRR (1 << 3) |
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#define GTMDR_ORI (1 << 4) |
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#define GTMDR_SPS(x) ((x) << 8) |
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struct gtm_timers_regs { |
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u8 gtcfr1; /* Timer 1, Timer 2 global config register */ |
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u8 res0[0x3]; |
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u8 gtcfr2; /* Timer 3, timer 4 global config register */ |
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u8 res1[0xB]; |
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__be16 gtmdr1; /* Timer 1 mode register */ |
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__be16 gtmdr2; /* Timer 2 mode register */ |
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__be16 gtrfr1; /* Timer 1 reference register */ |
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__be16 gtrfr2; /* Timer 2 reference register */ |
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__be16 gtcpr1; /* Timer 1 capture register */ |
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__be16 gtcpr2; /* Timer 2 capture register */ |
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__be16 gtcnr1; /* Timer 1 counter */ |
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__be16 gtcnr2; /* Timer 2 counter */ |
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__be16 gtmdr3; /* Timer 3 mode register */ |
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__be16 gtmdr4; /* Timer 4 mode register */ |
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__be16 gtrfr3; /* Timer 3 reference register */ |
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__be16 gtrfr4; /* Timer 4 reference register */ |
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__be16 gtcpr3; /* Timer 3 capture register */ |
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__be16 gtcpr4; /* Timer 4 capture register */ |
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__be16 gtcnr3; /* Timer 3 counter */ |
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__be16 gtcnr4; /* Timer 4 counter */ |
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__be16 gtevr1; /* Timer 1 event register */ |
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__be16 gtevr2; /* Timer 2 event register */ |
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__be16 gtevr3; /* Timer 3 event register */ |
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__be16 gtevr4; /* Timer 4 event register */ |
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__be16 gtpsr1; /* Timer 1 prescale register */ |
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__be16 gtpsr2; /* Timer 2 prescale register */ |
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__be16 gtpsr3; /* Timer 3 prescale register */ |
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__be16 gtpsr4; /* Timer 4 prescale register */ |
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u8 res2[0x40]; |
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} __attribute__ ((packed)); |
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struct gtm { |
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unsigned int clock; |
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struct gtm_timers_regs __iomem *regs; |
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struct gtm_timer timers[4]; |
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spinlock_t lock; |
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struct list_head list_node; |
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}; |
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static LIST_HEAD(gtms); |
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/** |
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* gtm_get_timer - request GTM timer to use it with the rest of GTM API |
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* Context: non-IRQ |
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* |
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* This function reserves GTM timer for later use. It returns gtm_timer |
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* structure to use with the rest of GTM API, you should use timer->irq |
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* to manage timer interrupt. |
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*/ |
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struct gtm_timer *gtm_get_timer16(void) |
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{ |
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struct gtm *gtm = NULL; |
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int i; |
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list_for_each_entry(gtm, >ms, list_node) { |
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spin_lock_irq(>m->lock); |
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for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { |
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if (!gtm->timers[i].requested) { |
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gtm->timers[i].requested = true; |
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spin_unlock_irq(>m->lock); |
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return >m->timers[i]; |
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} |
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} |
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spin_unlock_irq(>m->lock); |
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} |
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if (gtm) |
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return ERR_PTR(-EBUSY); |
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return ERR_PTR(-ENODEV); |
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} |
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EXPORT_SYMBOL(gtm_get_timer16); |
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/** |
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* gtm_get_specific_timer - request specific GTM timer |
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* @gtm: specific GTM, pass here GTM's device_node->data |
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* @timer: specific timer number, Timer1 is 0. |
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* Context: non-IRQ |
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* |
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* This function reserves GTM timer for later use. It returns gtm_timer |
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* structure to use with the rest of GTM API, you should use timer->irq |
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* to manage timer interrupt. |
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*/ |
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struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm, |
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unsigned int timer) |
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{ |
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struct gtm_timer *ret = ERR_PTR(-EBUSY); |
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if (timer > 3) |
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return ERR_PTR(-EINVAL); |
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spin_lock_irq(>m->lock); |
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if (gtm->timers[timer].requested) |
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goto out; |
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ret = >m->timers[timer]; |
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ret->requested = true; |
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out: |
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spin_unlock_irq(>m->lock); |
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return ret; |
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} |
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EXPORT_SYMBOL(gtm_get_specific_timer16); |
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/** |
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* gtm_put_timer16 - release 16 bits GTM timer |
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* @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer |
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* Context: any |
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* |
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* This function releases GTM timer so others may request it. |
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*/ |
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void gtm_put_timer16(struct gtm_timer *tmr) |
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{ |
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gtm_stop_timer16(tmr); |
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spin_lock_irq(&tmr->gtm->lock); |
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tmr->requested = false; |
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spin_unlock_irq(&tmr->gtm->lock); |
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} |
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EXPORT_SYMBOL(gtm_put_timer16); |
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/* |
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* This is back-end for the exported functions, it's used to reset single |
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* timer in reference mode. |
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*/ |
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static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency, |
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int reference_value, bool free_run) |
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{ |
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struct gtm *gtm = tmr->gtm; |
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int num = tmr - >m->timers[0]; |
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unsigned int prescaler; |
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u8 iclk = GTMDR_ICLK_ICLK; |
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u8 psr; |
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u8 sps; |
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unsigned long flags; |
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int max_prescaler = 256 * 256 * 16; |
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/* CPM2 doesn't have primary prescaler */ |
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if (!tmr->gtpsr) |
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max_prescaler /= 256; |
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prescaler = gtm->clock / frequency; |
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/* |
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* We have two 8 bit prescalers -- primary and secondary (psr, sps), |
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* plus "slow go" mode (clk / 16). So, total prescale value is |
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* 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr. |
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*/ |
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if (prescaler > max_prescaler) |
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return -EINVAL; |
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if (prescaler > max_prescaler / 16) { |
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iclk = GTMDR_ICLK_SLGO; |
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prescaler /= 16; |
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} |
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if (prescaler <= 256) { |
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psr = 0; |
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sps = prescaler - 1; |
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} else { |
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psr = 256 - 1; |
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sps = prescaler / 256 - 1; |
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} |
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spin_lock_irqsave(>m->lock, flags); |
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/* |
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* Properly reset timers: stop, reset, set up prescalers, reference |
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* value and clear event register. |
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*/ |
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clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)), |
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GTCFR_STP(num) | GTCFR_RST(num)); |
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setbits8(tmr->gtcfr, GTCFR_STP(num)); |
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if (tmr->gtpsr) |
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out_be16(tmr->gtpsr, psr); |
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clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) | |
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GTMDR_ORI | (free_run ? GTMDR_FRR : 0)); |
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out_be16(tmr->gtcnr, 0); |
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out_be16(tmr->gtrfr, reference_value); |
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out_be16(tmr->gtevr, 0xFFFF); |
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/* Let it be. */ |
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clrbits8(tmr->gtcfr, GTCFR_STP(num)); |
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spin_unlock_irqrestore(>m->lock, flags); |
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return 0; |
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} |
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/** |
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* gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision |
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* @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer |
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* @usec: timer interval in microseconds |
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* @reload: if set, the timer will reset upon expiry rather than |
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* continue running free. |
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* Context: any |
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* |
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* This function (re)sets the GTM timer so that it counts up to the requested |
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* interval value, and fires the interrupt when the value is reached. This |
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* function will reduce the precision of the timer as needed in order for the |
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* requested timeout to fit in a 16-bit register. |
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*/ |
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int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload) |
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{ |
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/* quite obvious, frequency which is enough for µSec precision */ |
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int freq = 1000000; |
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unsigned int bit; |
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bit = fls_long(usec); |
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if (bit > 15) { |
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freq >>= bit - 15; |
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usec >>= bit - 15; |
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} |
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if (!freq) |
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return -EINVAL; |
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return gtm_set_ref_timer16(tmr, freq, usec, reload); |
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} |
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EXPORT_SYMBOL(gtm_set_timer16); |
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/** |
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* gtm_set_exact_utimer16 - (re)set 16 bits timer |
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* @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer |
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* @usec: timer interval in microseconds |
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* @reload: if set, the timer will reset upon expiry rather than |
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* continue running free. |
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* Context: any |
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* |
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* This function (re)sets GTM timer so that it counts up to the requested |
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* interval value, and fires the interrupt when the value is reached. If reload |
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* flag was set, timer will also reset itself upon reference value, otherwise |
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* it continues to increment. |
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* |
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* The _exact_ bit in the function name states that this function will not |
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* crop precision of the "usec" argument, thus usec is limited to 16 bits |
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* (single timer width). |
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*/ |
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int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload) |
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{ |
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/* quite obvious, frequency which is enough for µSec precision */ |
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const int freq = 1000000; |
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/* |
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* We can lower the frequency (and probably power consumption) by |
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* dividing both frequency and usec by 2 until there is no remainder. |
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* But we won't bother with this unless savings are measured, so just |
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* run the timer as is. |
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*/ |
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return gtm_set_ref_timer16(tmr, freq, usec, reload); |
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} |
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EXPORT_SYMBOL(gtm_set_exact_timer16); |
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/** |
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* gtm_stop_timer16 - stop single timer |
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* @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer |
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* Context: any |
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* |
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* This function simply stops the GTM timer. |
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*/ |
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void gtm_stop_timer16(struct gtm_timer *tmr) |
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{ |
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struct gtm *gtm = tmr->gtm; |
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int num = tmr - >m->timers[0]; |
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unsigned long flags; |
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spin_lock_irqsave(>m->lock, flags); |
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setbits8(tmr->gtcfr, GTCFR_STP(num)); |
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out_be16(tmr->gtevr, 0xFFFF); |
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spin_unlock_irqrestore(>m->lock, flags); |
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} |
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EXPORT_SYMBOL(gtm_stop_timer16); |
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/** |
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* gtm_ack_timer16 - acknowledge timer event (free-run timers only) |
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* @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer |
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* @events: events mask to ack |
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* Context: any |
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* |
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* Thus function used to acknowledge timer interrupt event, use it inside the |
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* interrupt handler. |
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*/ |
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void gtm_ack_timer16(struct gtm_timer *tmr, u16 events) |
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{ |
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out_be16(tmr->gtevr, events); |
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} |
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EXPORT_SYMBOL(gtm_ack_timer16); |
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static void __init gtm_set_shortcuts(struct device_node *np, |
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struct gtm_timer *timers, |
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struct gtm_timers_regs __iomem *regs) |
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{ |
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/* |
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* Yeah, I don't like this either, but timers' registers a bit messed, |
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* so we have to provide shortcuts to write timer independent code. |
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* Alternative option is to create gt*() accessors, but that will be |
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* even uglier and cryptic. |
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*/ |
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timers[0].gtcfr = ®s->gtcfr1; |
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timers[0].gtmdr = ®s->gtmdr1; |
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timers[0].gtcnr = ®s->gtcnr1; |
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timers[0].gtrfr = ®s->gtrfr1; |
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timers[0].gtevr = ®s->gtevr1; |
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timers[1].gtcfr = ®s->gtcfr1; |
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timers[1].gtmdr = ®s->gtmdr2; |
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timers[1].gtcnr = ®s->gtcnr2; |
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timers[1].gtrfr = ®s->gtrfr2; |
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timers[1].gtevr = ®s->gtevr2; |
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timers[2].gtcfr = ®s->gtcfr2; |
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timers[2].gtmdr = ®s->gtmdr3; |
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timers[2].gtcnr = ®s->gtcnr3; |
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timers[2].gtrfr = ®s->gtrfr3; |
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timers[2].gtevr = ®s->gtevr3; |
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timers[3].gtcfr = ®s->gtcfr2; |
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timers[3].gtmdr = ®s->gtmdr4; |
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timers[3].gtcnr = ®s->gtcnr4; |
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timers[3].gtrfr = ®s->gtrfr4; |
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timers[3].gtevr = ®s->gtevr4; |
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/* CPM2 doesn't have primary prescaler */ |
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if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) { |
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timers[0].gtpsr = ®s->gtpsr1; |
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timers[1].gtpsr = ®s->gtpsr2; |
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timers[2].gtpsr = ®s->gtpsr3; |
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timers[3].gtpsr = ®s->gtpsr4; |
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} |
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} |
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static int __init fsl_gtm_init(void) |
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{ |
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struct device_node *np; |
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for_each_compatible_node(np, NULL, "fsl,gtm") { |
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int i; |
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struct gtm *gtm; |
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const u32 *clock; |
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int size; |
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gtm = kzalloc(sizeof(*gtm), GFP_KERNEL); |
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if (!gtm) { |
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pr_err("%pOF: unable to allocate memory\n", |
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np); |
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continue; |
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} |
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spin_lock_init(>m->lock); |
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clock = of_get_property(np, "clock-frequency", &size); |
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if (!clock || size != sizeof(*clock)) { |
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pr_err("%pOF: no clock-frequency\n", np); |
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goto err; |
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} |
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gtm->clock = *clock; |
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for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { |
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unsigned int irq; |
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irq = irq_of_parse_and_map(np, i); |
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if (!irq) { |
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pr_err("%pOF: not enough interrupts specified\n", |
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np); |
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goto err; |
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} |
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gtm->timers[i].irq = irq; |
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gtm->timers[i].gtm = gtm; |
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} |
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gtm->regs = of_iomap(np, 0); |
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if (!gtm->regs) { |
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pr_err("%pOF: unable to iomap registers\n", |
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np); |
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goto err; |
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} |
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gtm_set_shortcuts(np, gtm->timers, gtm->regs); |
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list_add(>m->list_node, >ms); |
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/* We don't want to lose the node and its ->data */ |
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np->data = gtm; |
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of_node_get(np); |
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continue; |
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err: |
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kfree(gtm); |
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} |
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return 0; |
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} |
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arch_initcall(fsl_gtm_init);
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