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363 lines
8.9 KiB
363 lines
8.9 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2015 Linaro |
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* |
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* Author: Jun Nie <[email protected]> |
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*/ |
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#include <linux/clk.h> |
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#include <linux/device.h> |
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#include <linux/dmaengine.h> |
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#include <linux/init.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of_address.h> |
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#include <sound/asoundef.h> |
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#include <sound/core.h> |
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#include <sound/dmaengine_pcm.h> |
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#include <sound/initval.h> |
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#include <sound/pcm.h> |
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#include <sound/pcm_params.h> |
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#include <sound/soc.h> |
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#include <sound/soc-dai.h> |
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#define ZX_CTRL 0x04 |
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#define ZX_FIFOCTRL 0x08 |
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#define ZX_INT_STATUS 0x10 |
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#define ZX_INT_MASK 0x14 |
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#define ZX_DATA 0x18 |
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#define ZX_VALID_BIT 0x1c |
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#define ZX_CH_STA_1 0x20 |
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#define ZX_CH_STA_2 0x24 |
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#define ZX_CH_STA_3 0x28 |
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#define ZX_CH_STA_4 0x2c |
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#define ZX_CH_STA_5 0x30 |
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#define ZX_CH_STA_6 0x34 |
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#define ZX_CTRL_MODA_16 (0 << 6) |
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#define ZX_CTRL_MODA_18 BIT(6) |
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#define ZX_CTRL_MODA_20 (2 << 6) |
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#define ZX_CTRL_MODA_24 (3 << 6) |
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#define ZX_CTRL_MODA_MASK (3 << 6) |
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#define ZX_CTRL_ENB BIT(4) |
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#define ZX_CTRL_DNB (0 << 4) |
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#define ZX_CTRL_ENB_MASK BIT(4) |
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#define ZX_CTRL_TX_OPEN BIT(0) |
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#define ZX_CTRL_TX_CLOSE (0 << 0) |
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#define ZX_CTRL_TX_MASK BIT(0) |
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#define ZX_CTRL_OPEN (ZX_CTRL_TX_OPEN | ZX_CTRL_ENB) |
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#define ZX_CTRL_CLOSE (ZX_CTRL_TX_CLOSE | ZX_CTRL_DNB) |
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#define ZX_CTRL_DOUBLE_TRACK (0 << 8) |
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#define ZX_CTRL_LEFT_TRACK BIT(8) |
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#define ZX_CTRL_RIGHT_TRACK (2 << 8) |
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#define ZX_CTRL_TRACK_MASK (3 << 8) |
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#define ZX_FIFOCTRL_TXTH_MASK (0x1f << 8) |
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#define ZX_FIFOCTRL_TXTH(x) (x << 8) |
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#define ZX_FIFOCTRL_TX_DMA_EN BIT(2) |
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#define ZX_FIFOCTRL_TX_DMA_DIS (0 << 2) |
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#define ZX_FIFOCTRL_TX_DMA_EN_MASK BIT(2) |
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#define ZX_FIFOCTRL_TX_FIFO_RST BIT(0) |
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#define ZX_FIFOCTRL_TX_FIFO_RST_MASK BIT(0) |
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#define ZX_VALID_DOUBLE_TRACK (0 << 0) |
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#define ZX_VALID_LEFT_TRACK BIT(1) |
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#define ZX_VALID_RIGHT_TRACK (2 << 0) |
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#define ZX_VALID_TRACK_MASK (3 << 0) |
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#define ZX_SPDIF_CLK_RAT (2 * 32) |
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struct zx_spdif_info { |
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struct snd_dmaengine_dai_dma_data dma_data; |
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struct clk *dai_clk; |
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void __iomem *reg_base; |
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resource_size_t mapbase; |
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}; |
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static int zx_spdif_dai_probe(struct snd_soc_dai *dai) |
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{ |
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struct zx_spdif_info *zx_spdif = dev_get_drvdata(dai->dev); |
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snd_soc_dai_set_drvdata(dai, zx_spdif); |
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zx_spdif->dma_data.addr = zx_spdif->mapbase + ZX_DATA; |
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zx_spdif->dma_data.maxburst = 8; |
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snd_soc_dai_init_dma_data(dai, &zx_spdif->dma_data, NULL); |
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return 0; |
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} |
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static int zx_spdif_chanstats(void __iomem *base, unsigned int rate) |
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{ |
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u32 cstas1; |
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switch (rate) { |
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case 22050: |
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cstas1 = IEC958_AES3_CON_FS_22050; |
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break; |
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case 24000: |
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cstas1 = IEC958_AES3_CON_FS_24000; |
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break; |
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case 32000: |
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cstas1 = IEC958_AES3_CON_FS_32000; |
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break; |
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case 44100: |
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cstas1 = IEC958_AES3_CON_FS_44100; |
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break; |
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case 48000: |
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cstas1 = IEC958_AES3_CON_FS_48000; |
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break; |
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case 88200: |
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cstas1 = IEC958_AES3_CON_FS_88200; |
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break; |
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case 96000: |
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cstas1 = IEC958_AES3_CON_FS_96000; |
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break; |
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case 176400: |
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cstas1 = IEC958_AES3_CON_FS_176400; |
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break; |
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case 192000: |
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cstas1 = IEC958_AES3_CON_FS_192000; |
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break; |
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default: |
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return -EINVAL; |
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} |
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cstas1 = cstas1 << 24; |
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cstas1 |= IEC958_AES0_CON_NOT_COPYRIGHT; |
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writel_relaxed(cstas1, base + ZX_CH_STA_1); |
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return 0; |
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} |
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static int zx_spdif_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *params, |
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struct snd_soc_dai *socdai) |
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{ |
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struct zx_spdif_info *zx_spdif = dev_get_drvdata(socdai->dev); |
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struct zx_spdif_info *spdif = snd_soc_dai_get_drvdata(socdai); |
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struct snd_dmaengine_dai_dma_data *dma_data = |
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snd_soc_dai_get_dma_data(socdai, substream); |
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u32 val, ch_num, rate; |
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int ret; |
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dma_data->addr_width = params_width(params) >> 3; |
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val = readl_relaxed(zx_spdif->reg_base + ZX_CTRL); |
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val &= ~ZX_CTRL_MODA_MASK; |
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switch (params_format(params)) { |
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case SNDRV_PCM_FORMAT_S16_LE: |
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val |= ZX_CTRL_MODA_16; |
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break; |
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case SNDRV_PCM_FORMAT_S18_3LE: |
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val |= ZX_CTRL_MODA_18; |
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break; |
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case SNDRV_PCM_FORMAT_S20_3LE: |
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val |= ZX_CTRL_MODA_20; |
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break; |
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case SNDRV_PCM_FORMAT_S24_LE: |
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val |= ZX_CTRL_MODA_24; |
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break; |
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default: |
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dev_err(socdai->dev, "Format not support!\n"); |
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return -EINVAL; |
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} |
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ch_num = params_channels(params); |
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if (ch_num == 2) |
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val |= ZX_CTRL_DOUBLE_TRACK; |
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else |
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val |= ZX_CTRL_LEFT_TRACK; |
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writel_relaxed(val, zx_spdif->reg_base + ZX_CTRL); |
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val = readl_relaxed(zx_spdif->reg_base + ZX_VALID_BIT); |
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val &= ~ZX_VALID_TRACK_MASK; |
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if (ch_num == 2) |
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val |= ZX_VALID_DOUBLE_TRACK; |
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else |
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val |= ZX_VALID_RIGHT_TRACK; |
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writel_relaxed(val, zx_spdif->reg_base + ZX_VALID_BIT); |
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rate = params_rate(params); |
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ret = zx_spdif_chanstats(zx_spdif->reg_base, rate); |
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if (ret) |
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return ret; |
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return clk_set_rate(spdif->dai_clk, rate * ch_num * ZX_SPDIF_CLK_RAT); |
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} |
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static void zx_spdif_cfg_tx(void __iomem *base, int on) |
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{ |
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u32 val; |
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val = readl_relaxed(base + ZX_CTRL); |
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val &= ~(ZX_CTRL_ENB_MASK | ZX_CTRL_TX_MASK); |
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val |= on ? ZX_CTRL_OPEN : ZX_CTRL_CLOSE; |
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writel_relaxed(val, base + ZX_CTRL); |
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val = readl_relaxed(base + ZX_FIFOCTRL); |
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val &= ~ZX_FIFOCTRL_TX_DMA_EN_MASK; |
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if (on) |
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val |= ZX_FIFOCTRL_TX_DMA_EN; |
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writel_relaxed(val, base + ZX_FIFOCTRL); |
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} |
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static int zx_spdif_trigger(struct snd_pcm_substream *substream, int cmd, |
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struct snd_soc_dai *dai) |
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{ |
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u32 val; |
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struct zx_spdif_info *zx_spdif = dev_get_drvdata(dai->dev); |
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int ret = 0; |
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switch (cmd) { |
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case SNDRV_PCM_TRIGGER_START: |
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val = readl_relaxed(zx_spdif->reg_base + ZX_FIFOCTRL); |
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val |= ZX_FIFOCTRL_TX_FIFO_RST; |
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writel_relaxed(val, zx_spdif->reg_base + ZX_FIFOCTRL); |
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fallthrough; |
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case SNDRV_PCM_TRIGGER_RESUME: |
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
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zx_spdif_cfg_tx(zx_spdif->reg_base, true); |
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break; |
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case SNDRV_PCM_TRIGGER_STOP: |
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case SNDRV_PCM_TRIGGER_SUSPEND: |
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
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zx_spdif_cfg_tx(zx_spdif->reg_base, false); |
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break; |
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default: |
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ret = -EINVAL; |
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break; |
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} |
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return ret; |
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} |
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static int zx_spdif_startup(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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struct zx_spdif_info *zx_spdif = dev_get_drvdata(dai->dev); |
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return clk_prepare_enable(zx_spdif->dai_clk); |
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} |
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static void zx_spdif_shutdown(struct snd_pcm_substream *substream, |
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struct snd_soc_dai *dai) |
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{ |
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struct zx_spdif_info *zx_spdif = dev_get_drvdata(dai->dev); |
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clk_disable_unprepare(zx_spdif->dai_clk); |
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} |
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#define ZX_RATES \ |
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(SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ |
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |\ |
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SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) |
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#define ZX_FORMAT \ |
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(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S18_3LE \ |
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| SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE) |
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static const struct snd_soc_dai_ops zx_spdif_dai_ops = { |
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.trigger = zx_spdif_trigger, |
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.startup = zx_spdif_startup, |
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.shutdown = zx_spdif_shutdown, |
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.hw_params = zx_spdif_hw_params, |
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}; |
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static struct snd_soc_dai_driver zx_spdif_dai = { |
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.name = "spdif", |
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.id = 0, |
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.probe = zx_spdif_dai_probe, |
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.playback = { |
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.channels_min = 1, |
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.channels_max = 2, |
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.rates = ZX_RATES, |
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.formats = ZX_FORMAT, |
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}, |
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.ops = &zx_spdif_dai_ops, |
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}; |
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static const struct snd_soc_component_driver zx_spdif_component = { |
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.name = "spdif", |
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}; |
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static void zx_spdif_dev_init(void __iomem *base) |
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{ |
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u32 val; |
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writel_relaxed(0, base + ZX_CTRL); |
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writel_relaxed(0, base + ZX_INT_MASK); |
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writel_relaxed(0xf, base + ZX_INT_STATUS); |
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writel_relaxed(0x1, base + ZX_FIFOCTRL); |
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val = readl_relaxed(base + ZX_FIFOCTRL); |
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val &= ~(ZX_FIFOCTRL_TXTH_MASK | ZX_FIFOCTRL_TX_FIFO_RST_MASK); |
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val |= ZX_FIFOCTRL_TXTH(8); |
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writel_relaxed(val, base + ZX_FIFOCTRL); |
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} |
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static int zx_spdif_probe(struct platform_device *pdev) |
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{ |
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struct resource *res; |
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struct zx_spdif_info *zx_spdif; |
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int ret; |
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zx_spdif = devm_kzalloc(&pdev->dev, sizeof(*zx_spdif), GFP_KERNEL); |
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if (!zx_spdif) |
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return -ENOMEM; |
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zx_spdif->dai_clk = devm_clk_get(&pdev->dev, "tx"); |
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if (IS_ERR(zx_spdif->dai_clk)) { |
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dev_err(&pdev->dev, "Fail to get clk\n"); |
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return PTR_ERR(zx_spdif->dai_clk); |
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} |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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zx_spdif->mapbase = res->start; |
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zx_spdif->reg_base = devm_ioremap_resource(&pdev->dev, res); |
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if (IS_ERR(zx_spdif->reg_base)) { |
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return PTR_ERR(zx_spdif->reg_base); |
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} |
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zx_spdif_dev_init(zx_spdif->reg_base); |
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platform_set_drvdata(pdev, zx_spdif); |
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ret = devm_snd_soc_register_component(&pdev->dev, &zx_spdif_component, |
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&zx_spdif_dai, 1); |
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if (ret) { |
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dev_err(&pdev->dev, "Register DAI failed: %d\n", ret); |
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return ret; |
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} |
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ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); |
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if (ret) |
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dev_err(&pdev->dev, "Register platform PCM failed: %d\n", ret); |
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return ret; |
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} |
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static const struct of_device_id zx_spdif_dt_ids[] = { |
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{ .compatible = "zte,zx296702-spdif", }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, zx_spdif_dt_ids); |
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static struct platform_driver spdif_driver = { |
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.probe = zx_spdif_probe, |
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.driver = { |
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.name = "zx-spdif", |
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.of_match_table = zx_spdif_dt_ids, |
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}, |
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}; |
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module_platform_driver(spdif_driver); |
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MODULE_AUTHOR("Jun Nie <[email protected]>"); |
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MODULE_DESCRIPTION("ZTE SPDIF SoC DAI"); |
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MODULE_LICENSE("GPL");
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