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119 lines
4.2 KiB
119 lines
4.2 KiB
.. _amu_index: |
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Activity Monitors Unit (AMU) extension in AArch64 Linux |
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======================================================= |
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Author: Ionela Voinescu <[email protected]> |
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Date: 2019-09-10 |
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This document briefly describes the provision of Activity Monitors Unit |
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support in AArch64 Linux. |
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Architecture overview |
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--------------------- |
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The activity monitors extension is an optional extension introduced by the |
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ARMv8.4 CPU architecture. |
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The activity monitors unit, implemented in each CPU, provides performance |
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counters intended for system management use. The AMU extension provides a |
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system register interface to the counter registers and also supports an |
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optional external memory-mapped interface. |
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Version 1 of the Activity Monitors architecture implements a counter group |
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of four fixed and architecturally defined 64-bit event counters. |
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- CPU cycle counter: increments at the frequency of the CPU. |
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- Constant counter: increments at the fixed frequency of the system |
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clock. |
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- Instructions retired: increments with every architecturally executed |
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instruction. |
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- Memory stall cycles: counts instruction dispatch stall cycles caused by |
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misses in the last level cache within the clock domain. |
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When in WFI or WFE these counters do not increment. |
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The Activity Monitors architecture provides space for up to 16 architected |
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event counters. Future versions of the architecture may use this space to |
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implement additional architected event counters. |
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Additionally, version 1 implements a counter group of up to 16 auxiliary |
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64-bit event counters. |
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On cold reset all counters reset to 0. |
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Basic support |
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------------- |
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The kernel can safely run a mix of CPUs with and without support for the |
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activity monitors extension. Therefore, when CONFIG_ARM64_AMU_EXTN is |
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selected we unconditionally enable the capability to allow any late CPU |
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(secondary or hotplugged) to detect and use the feature. |
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When the feature is detected on a CPU, we flag the availability of the |
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feature but this does not guarantee the correct functionality of the |
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counters, only the presence of the extension. |
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Firmware (code running at higher exception levels, e.g. arm-tf) support is |
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needed to: |
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- Enable access for lower exception levels (EL2 and EL1) to the AMU |
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registers. |
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- Enable the counters. If not enabled these will read as 0. |
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- Save/restore the counters before/after the CPU is being put/brought up |
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from the 'off' power state. |
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When using kernels that have this feature enabled but boot with broken |
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firmware the user may experience panics or lockups when accessing the |
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counter registers. Even if these symptoms are not observed, the values |
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returned by the register reads might not correctly reflect reality. Most |
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commonly, the counters will read as 0, indicating that they are not |
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enabled. |
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If proper support is not provided in firmware it's best to disable |
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CONFIG_ARM64_AMU_EXTN. To be noted that for security reasons, this does not |
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bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to |
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EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers |
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are not trapped in EL2/EL3. |
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The fixed counters of AMUv1 are accessible though the following system |
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register definitions: |
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- SYS_AMEVCNTR0_CORE_EL0 |
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- SYS_AMEVCNTR0_CONST_EL0 |
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- SYS_AMEVCNTR0_INST_RET_EL0 |
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- SYS_AMEVCNTR0_MEM_STALL_EL0 |
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Auxiliary platform specific counters can be accessed using |
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SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15. |
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Details can be found in: arch/arm64/include/asm/sysreg.h. |
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Userspace access |
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---------------- |
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Currently, access from userspace to the AMU registers is disabled due to: |
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- Security reasons: they might expose information about code executed in |
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secure mode. |
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- Purpose: AMU counters are intended for system management use. |
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Also, the presence of the feature is not visible to userspace. |
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Virtualization |
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-------------- |
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Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM |
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guest side is disabled due to: |
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- Security reasons: they might expose information about code executed |
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by other guests or the host. |
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Any attempt to access the AMU registers will result in an UNDEFINED |
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exception being injected into the guest.
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