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176 lines
4.9 KiB
176 lines
4.9 KiB
/* |
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* clk_gpio_init-stm32.c - Clock and GPIO initialization for STM32. |
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* |
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* Copyright (C) 2015, 2018 Flying Stone Technology |
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* Author: NIIBE Yutaka <[email protected]> |
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* |
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* This file is a part of Chopstx, a thread library for embedded. |
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* |
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* Chopstx is free software: you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* Chopstx is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program. If not, see <http://www.gnu.org/licenses/>. |
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* |
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* As additional permission under GNU GPL version 3 section 7, you may |
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* distribute non-source form of the Program without the copy of the |
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* GNU GPL normally required by section 4, provided you inform the |
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* receipents of GNU GPL by a written offer. |
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* |
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*/ |
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#if defined(MCU_STM32F0) |
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#include <mcu/stm32.h> |
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#else |
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#include <mcu/stm32f103.h> |
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#endif |
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#if defined(MCU_STM32F0) |
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#define STM32_PPRE1 STM32_PPRE1_DIV1 |
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#define STM32_PLLSRC STM32_PLLSRC_HSI |
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#define STM32_FLASHBITS 0x00000011 |
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#define STM32_PLLCLKIN (STM32_HSICLK / 2) |
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#else |
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#define STM32_PPRE1 STM32_PPRE1_DIV2 |
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#define STM32_PLLSRC STM32_PLLSRC_HSE |
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#define STM32_FLASHBITS 0x00000012 |
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#define STM32_PLLCLKIN (STM32_HSECLK / 1) |
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#endif |
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#define STM32_SW STM32_SW_PLL |
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#define STM32_HPRE STM32_HPRE_DIV1 |
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#define STM32_PPRE2 STM32_PPRE2_DIV1 |
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#ifndef STM32_ADCPRE |
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#define STM32_ADCPRE STM32_ADCPRE_DIV6 |
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#endif |
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#define STM32_MCOSEL STM32_MCO_NOCLOCK |
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#ifndef STM32_USBPRE |
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#define STM32_USBPRE STM32_USBPRE_DIV1P5 |
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#endif |
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#define STM32_PLLMUL ((STM32_PLLMUL_VALUE - 2) << 18) |
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#define STM32_PLLCLKOUT (STM32_PLLCLKIN * STM32_PLLMUL_VALUE) |
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#define STM32_SYSCLK STM32_PLLCLKOUT |
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#define STM32_HCLK (STM32_SYSCLK / 1) |
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static void __attribute__((used)) |
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clock_init (void) |
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{ |
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/* HSI setup */ |
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RCC->CR |= RCC_CR_HSION; |
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while (!(RCC->CR & RCC_CR_HSIRDY)) |
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; |
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/* Reset HSEON, HSEBYP, CSSON, and PLLON, not touching RCC_CR_HSITRIM */ |
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RCC->CR &= (RCC_CR_HSITRIM | RCC_CR_HSION); |
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RCC->CFGR = 0; |
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) |
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; |
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#if !defined(MCU_STM32F0) |
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/* HSE setup */ |
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RCC->CR |= RCC_CR_HSEON; |
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while (!(RCC->CR & RCC_CR_HSERDY)) |
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; |
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#endif |
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/* PLL setup */ |
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RCC->CFGR |= STM32_PLLMUL | STM32_PLLXTPRE | STM32_PLLSRC; |
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RCC->CR |= RCC_CR_PLLON; |
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while (!(RCC->CR & RCC_CR_PLLRDY)) |
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; |
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/* Clock settings */ |
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RCC->CFGR = STM32_MCOSEL | STM32_USBPRE | STM32_PLLMUL | STM32_PLLXTPRE |
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| STM32_PLLSRC | STM32_ADCPRE | STM32_PPRE2 | STM32_PPRE1 | STM32_HPRE; |
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/* |
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* We don't touch RCC->CR2, RCC->CFGR2, RCC->CFGR3, and RCC->CIR. |
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*/ |
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/* Flash setup */ |
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FLASH->ACR = STM32_FLASHBITS; |
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/* Switching on the configured clock source. */ |
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RCC->CFGR |= STM32_SW; |
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while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2)) |
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; |
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#if defined(MCU_STM32F0) |
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; |
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RCC->APB2RSTR = RCC_APB2RSTR_SYSCFGRST; |
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RCC->APB2RSTR = 0; |
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# if defined(STM32F0_USE_VECTOR_ON_RAM) |
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/* Use vectors on RAM */ |
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SYSCFG->CFGR1 = (SYSCFG->CFGR1 & ~SYSCFG_CFGR1_MEM_MODE) | 3; |
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# endif |
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#endif |
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} |
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static struct GPIO *const GPIO_LED = (struct GPIO *)GPIO_LED_BASE; |
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#ifdef GPIO_USB_BASE |
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static struct GPIO *const GPIO_USB = (struct GPIO *)GPIO_USB_BASE; |
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#endif |
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#ifdef GPIO_OTHER_BASE |
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static struct GPIO *const GPIO_OTHER = (struct GPIO *)GPIO_OTHER_BASE; |
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#endif |
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static void __attribute__((used)) |
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gpio_init (void) |
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{ |
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/* Enable GPIO clock. */ |
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#if defined(MCU_STM32F0) |
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RCC->AHBENR |= RCC_ENR_IOP_EN; |
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RCC->AHBRSTR = RCC_RSTR_IOP_RST; |
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RCC->AHBRSTR = 0; |
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#else |
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RCC->APB2ENR |= RCC_ENR_IOP_EN; |
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RCC->APB2RSTR = RCC_RSTR_IOP_RST; |
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RCC->APB2RSTR = 0; |
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#endif |
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#if defined(MCU_STM32F0) |
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GPIO_LED->OSPEEDR = VAL_GPIO_LED_OSPEEDR; |
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GPIO_LED->OTYPER = VAL_GPIO_LED_OTYPER; |
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GPIO_LED->MODER = VAL_GPIO_LED_MODER; |
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GPIO_LED->PUPDR = VAL_GPIO_LED_PUPDR; |
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#ifdef GPIO_OTHER_BASE |
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GPIO_OTHER->OSPEEDR = VAL_GPIO_OTHER_OSPEEDR; |
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GPIO_OTHER->OTYPER = VAL_GPIO_OTHER_OTYPER; |
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GPIO_OTHER->MODER = VAL_GPIO_OTHER_MODER; |
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GPIO_OTHER->PUPDR = VAL_GPIO_OTHER_PUPDR; |
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#endif |
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#else |
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#ifdef AFIO_MAPR_SOMETHING |
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AFIO->MAPR |= AFIO_MAPR_SOMETHING; |
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#endif |
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/* LED is mandatory. We configure it always. */ |
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GPIO_LED->ODR = VAL_GPIO_LED_ODR; |
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GPIO_LED->CRH = VAL_GPIO_LED_CRH; |
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GPIO_LED->CRL = VAL_GPIO_LED_CRL; |
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/* If there is USB enabler pin and it's independent, we configure it. */ |
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#if defined(GPIO_USB_BASE) && GPIO_USB_BASE != GPIO_LED_BASE |
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GPIO_USB->ODR = VAL_GPIO_USB_ODR; |
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GPIO_USB->CRH = VAL_GPIO_USB_CRH; |
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GPIO_USB->CRL = VAL_GPIO_USB_CRL; |
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#endif |
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#ifdef GPIO_OTHER_BASE |
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GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR; |
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GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH; |
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GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL; |
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#endif |
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#endif |
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}
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