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485 lines
11 KiB
485 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Ethernet driver for the WIZnet W5100/W5200/W5500 chip. |
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* |
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* Copyright (C) 2016 Akinobu Mita <[email protected]> |
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* |
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* Datasheet: |
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* http://www.wiznet.co.kr/wp-content/uploads/wiznethome/Chip/W5100/Document/W5100_Datasheet_v1.2.6.pdf |
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* http://wiznethome.cafe24.com/wp-content/uploads/wiznethome/Chip/W5200/Documents/W5200_DS_V140E.pdf |
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* http://wizwiki.net/wiki/lib/exe/fetch.php?media=products:w5500:w5500_ds_v106e_141230.pdf |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/delay.h> |
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#include <linux/netdevice.h> |
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#include <linux/of_net.h> |
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#include <linux/of_device.h> |
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#include <linux/spi/spi.h> |
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#include "w5100.h" |
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#define W5100_SPI_WRITE_OPCODE 0xf0 |
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#define W5100_SPI_READ_OPCODE 0x0f |
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static int w5100_spi_read(struct net_device *ndev, u32 addr) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[3] = { W5100_SPI_READ_OPCODE, addr >> 8, addr & 0xff }; |
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u8 data; |
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int ret; |
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1); |
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return ret ? ret : data; |
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} |
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static int w5100_spi_write(struct net_device *ndev, u32 addr, u8 data) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[4] = { W5100_SPI_WRITE_OPCODE, addr >> 8, addr & 0xff, data}; |
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); |
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} |
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static int w5100_spi_read16(struct net_device *ndev, u32 addr) |
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{ |
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u16 data; |
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int ret; |
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ret = w5100_spi_read(ndev, addr); |
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if (ret < 0) |
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return ret; |
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data = ret << 8; |
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ret = w5100_spi_read(ndev, addr + 1); |
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return ret < 0 ? ret : data | ret; |
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} |
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static int w5100_spi_write16(struct net_device *ndev, u32 addr, u16 data) |
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{ |
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int ret; |
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ret = w5100_spi_write(ndev, addr, data >> 8); |
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if (ret) |
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return ret; |
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return w5100_spi_write(ndev, addr + 1, data & 0xff); |
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} |
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static int w5100_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf, |
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int len) |
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{ |
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int i; |
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for (i = 0; i < len; i++) { |
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int ret = w5100_spi_read(ndev, addr + i); |
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if (ret < 0) |
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return ret; |
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buf[i] = ret; |
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} |
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return 0; |
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} |
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static int w5100_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf, |
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int len) |
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{ |
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int i; |
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for (i = 0; i < len; i++) { |
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int ret = w5100_spi_write(ndev, addr + i, buf[i]); |
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if (ret) |
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return ret; |
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} |
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return 0; |
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} |
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static const struct w5100_ops w5100_spi_ops = { |
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.may_sleep = true, |
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.chip_id = W5100, |
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.read = w5100_spi_read, |
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.write = w5100_spi_write, |
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.read16 = w5100_spi_read16, |
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.write16 = w5100_spi_write16, |
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.readbulk = w5100_spi_readbulk, |
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.writebulk = w5100_spi_writebulk, |
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}; |
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#define W5200_SPI_WRITE_OPCODE 0x80 |
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struct w5200_spi_priv { |
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/* Serialize access to cmd_buf */ |
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struct mutex cmd_lock; |
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/* DMA (thus cache coherency maintenance) requires the |
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* transfer buffers to live in their own cache lines. |
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*/ |
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u8 cmd_buf[4] ____cacheline_aligned; |
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}; |
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static struct w5200_spi_priv *w5200_spi_priv(struct net_device *ndev) |
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{ |
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return w5100_ops_priv(ndev); |
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} |
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static int w5200_spi_init(struct net_device *ndev) |
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{ |
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struct w5200_spi_priv *spi_priv = w5200_spi_priv(ndev); |
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mutex_init(&spi_priv->cmd_lock); |
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return 0; |
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} |
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static int w5200_spi_read(struct net_device *ndev, u32 addr) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[4] = { addr >> 8, addr & 0xff, 0, 1 }; |
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u8 data; |
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int ret; |
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1); |
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return ret ? ret : data; |
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} |
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static int w5200_spi_write(struct net_device *ndev, u32 addr, u8 data) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[5] = { addr >> 8, addr & 0xff, W5200_SPI_WRITE_OPCODE, 1, data }; |
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); |
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} |
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static int w5200_spi_read16(struct net_device *ndev, u32 addr) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[4] = { addr >> 8, addr & 0xff, 0, 2 }; |
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__be16 data; |
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int ret; |
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, sizeof(data)); |
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return ret ? ret : be16_to_cpu(data); |
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} |
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static int w5200_spi_write16(struct net_device *ndev, u32 addr, u16 data) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[6] = { |
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addr >> 8, addr & 0xff, |
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W5200_SPI_WRITE_OPCODE, 2, |
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data >> 8, data & 0xff |
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}; |
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); |
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} |
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static int w5200_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf, |
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int len) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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struct w5200_spi_priv *spi_priv = w5200_spi_priv(ndev); |
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struct spi_transfer xfer[] = { |
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{ |
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.tx_buf = spi_priv->cmd_buf, |
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.len = sizeof(spi_priv->cmd_buf), |
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}, |
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{ |
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.rx_buf = buf, |
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.len = len, |
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}, |
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}; |
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int ret; |
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mutex_lock(&spi_priv->cmd_lock); |
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spi_priv->cmd_buf[0] = addr >> 8; |
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spi_priv->cmd_buf[1] = addr; |
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spi_priv->cmd_buf[2] = len >> 8; |
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spi_priv->cmd_buf[3] = len; |
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer)); |
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mutex_unlock(&spi_priv->cmd_lock); |
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return ret; |
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} |
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static int w5200_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf, |
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int len) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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struct w5200_spi_priv *spi_priv = w5200_spi_priv(ndev); |
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struct spi_transfer xfer[] = { |
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{ |
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.tx_buf = spi_priv->cmd_buf, |
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.len = sizeof(spi_priv->cmd_buf), |
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}, |
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{ |
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.tx_buf = buf, |
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.len = len, |
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}, |
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}; |
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int ret; |
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mutex_lock(&spi_priv->cmd_lock); |
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spi_priv->cmd_buf[0] = addr >> 8; |
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spi_priv->cmd_buf[1] = addr; |
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spi_priv->cmd_buf[2] = W5200_SPI_WRITE_OPCODE | (len >> 8); |
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spi_priv->cmd_buf[3] = len; |
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer)); |
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mutex_unlock(&spi_priv->cmd_lock); |
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return ret; |
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} |
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static const struct w5100_ops w5200_ops = { |
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.may_sleep = true, |
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.chip_id = W5200, |
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.read = w5200_spi_read, |
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.write = w5200_spi_write, |
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.read16 = w5200_spi_read16, |
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.write16 = w5200_spi_write16, |
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.readbulk = w5200_spi_readbulk, |
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.writebulk = w5200_spi_writebulk, |
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.init = w5200_spi_init, |
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}; |
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#define W5500_SPI_BLOCK_SELECT(addr) (((addr) >> 16) & 0x1f) |
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#define W5500_SPI_READ_CONTROL(addr) (W5500_SPI_BLOCK_SELECT(addr) << 3) |
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#define W5500_SPI_WRITE_CONTROL(addr) \ |
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((W5500_SPI_BLOCK_SELECT(addr) << 3) | BIT(2)) |
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struct w5500_spi_priv { |
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/* Serialize access to cmd_buf */ |
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struct mutex cmd_lock; |
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/* DMA (thus cache coherency maintenance) requires the |
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* transfer buffers to live in their own cache lines. |
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*/ |
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u8 cmd_buf[3] ____cacheline_aligned; |
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}; |
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static struct w5500_spi_priv *w5500_spi_priv(struct net_device *ndev) |
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{ |
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return w5100_ops_priv(ndev); |
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} |
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static int w5500_spi_init(struct net_device *ndev) |
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{ |
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struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev); |
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mutex_init(&spi_priv->cmd_lock); |
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return 0; |
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} |
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static int w5500_spi_read(struct net_device *ndev, u32 addr) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[3] = { |
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addr >> 8, |
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addr, |
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W5500_SPI_READ_CONTROL(addr) |
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}; |
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u8 data; |
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int ret; |
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1); |
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return ret ? ret : data; |
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} |
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static int w5500_spi_write(struct net_device *ndev, u32 addr, u8 data) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[4] = { |
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addr >> 8, |
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addr, |
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W5500_SPI_WRITE_CONTROL(addr), |
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data |
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}; |
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); |
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} |
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static int w5500_spi_read16(struct net_device *ndev, u32 addr) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[3] = { |
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addr >> 8, |
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addr, |
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W5500_SPI_READ_CONTROL(addr) |
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}; |
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__be16 data; |
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int ret; |
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, sizeof(data)); |
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return ret ? ret : be16_to_cpu(data); |
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} |
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static int w5500_spi_write16(struct net_device *ndev, u32 addr, u16 data) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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u8 cmd[5] = { |
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addr >> 8, |
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addr, |
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W5500_SPI_WRITE_CONTROL(addr), |
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data >> 8, |
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data |
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}; |
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); |
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} |
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static int w5500_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf, |
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int len) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev); |
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struct spi_transfer xfer[] = { |
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{ |
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.tx_buf = spi_priv->cmd_buf, |
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.len = sizeof(spi_priv->cmd_buf), |
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}, |
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{ |
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.rx_buf = buf, |
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.len = len, |
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}, |
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}; |
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int ret; |
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mutex_lock(&spi_priv->cmd_lock); |
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spi_priv->cmd_buf[0] = addr >> 8; |
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spi_priv->cmd_buf[1] = addr; |
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spi_priv->cmd_buf[2] = W5500_SPI_READ_CONTROL(addr); |
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer)); |
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mutex_unlock(&spi_priv->cmd_lock); |
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return ret; |
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} |
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static int w5500_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf, |
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int len) |
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{ |
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struct spi_device *spi = to_spi_device(ndev->dev.parent); |
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struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev); |
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struct spi_transfer xfer[] = { |
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{ |
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.tx_buf = spi_priv->cmd_buf, |
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.len = sizeof(spi_priv->cmd_buf), |
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}, |
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{ |
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.tx_buf = buf, |
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.len = len, |
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}, |
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}; |
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int ret; |
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mutex_lock(&spi_priv->cmd_lock); |
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spi_priv->cmd_buf[0] = addr >> 8; |
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spi_priv->cmd_buf[1] = addr; |
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spi_priv->cmd_buf[2] = W5500_SPI_WRITE_CONTROL(addr); |
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ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer)); |
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mutex_unlock(&spi_priv->cmd_lock); |
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return ret; |
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} |
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static const struct w5100_ops w5500_ops = { |
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.may_sleep = true, |
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.chip_id = W5500, |
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.read = w5500_spi_read, |
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.write = w5500_spi_write, |
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.read16 = w5500_spi_read16, |
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.write16 = w5500_spi_write16, |
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.readbulk = w5500_spi_readbulk, |
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.writebulk = w5500_spi_writebulk, |
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.init = w5500_spi_init, |
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}; |
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static const struct of_device_id w5100_of_match[] = { |
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{ .compatible = "wiznet,w5100", .data = (const void*)W5100, }, |
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{ .compatible = "wiznet,w5200", .data = (const void*)W5200, }, |
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{ .compatible = "wiznet,w5500", .data = (const void*)W5500, }, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, w5100_of_match); |
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static int w5100_spi_probe(struct spi_device *spi) |
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{ |
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const struct of_device_id *of_id; |
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const struct w5100_ops *ops; |
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kernel_ulong_t driver_data; |
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int priv_size; |
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const void *mac = of_get_mac_address(spi->dev.of_node); |
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if (spi->dev.of_node) { |
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of_id = of_match_device(w5100_of_match, &spi->dev); |
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if (!of_id) |
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return -ENODEV; |
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driver_data = (kernel_ulong_t)of_id->data; |
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} else { |
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driver_data = spi_get_device_id(spi)->driver_data; |
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} |
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switch (driver_data) { |
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case W5100: |
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ops = &w5100_spi_ops; |
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priv_size = 0; |
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break; |
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case W5200: |
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ops = &w5200_ops; |
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priv_size = sizeof(struct w5200_spi_priv); |
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break; |
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case W5500: |
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ops = &w5500_ops; |
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priv_size = sizeof(struct w5500_spi_priv); |
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break; |
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default: |
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return -EINVAL; |
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} |
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return w5100_probe(&spi->dev, ops, priv_size, mac, spi->irq, -EINVAL); |
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} |
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static int w5100_spi_remove(struct spi_device *spi) |
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{ |
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return w5100_remove(&spi->dev); |
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} |
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static const struct spi_device_id w5100_spi_ids[] = { |
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{ "w5100", W5100 }, |
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{ "w5200", W5200 }, |
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{ "w5500", W5500 }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(spi, w5100_spi_ids); |
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static struct spi_driver w5100_spi_driver = { |
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.driver = { |
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.name = "w5100", |
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.pm = &w5100_pm_ops, |
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.of_match_table = w5100_of_match, |
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}, |
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.probe = w5100_spi_probe, |
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.remove = w5100_spi_remove, |
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.id_table = w5100_spi_ids, |
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}; |
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module_spi_driver(w5100_spi_driver); |
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MODULE_DESCRIPTION("WIZnet W5100/W5200/W5500 Ethernet driver for SPI mode"); |
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MODULE_AUTHOR("Akinobu Mita <[email protected]>"); |
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MODULE_LICENSE("GPL");
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