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85 lines
2.7 KiB
85 lines
2.7 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2005, Intec Automation Inc. |
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* Copyright (C) 2014, Freescale Semiconductor, Inc. |
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*/ |
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#include <linux/mtd/spi-nor.h> |
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#include "core.h" |
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/* |
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* The Atmel AT25FS010/AT25FS040 parts have some weird configuration for the |
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* block protection bits. We don't support them. But legacy behavior in linux |
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* is to unlock the whole flash array on startup. Therefore, we have to support |
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* exactly this operation. |
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*/ |
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static int atmel_at25fs_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) |
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{ |
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return -EOPNOTSUPP; |
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} |
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static int atmel_at25fs_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) |
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{ |
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int ret; |
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/* We only support unlocking the whole flash array */ |
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if (ofs || len != nor->params->size) |
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return -EINVAL; |
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/* Write 0x00 to the status register to disable write protection */ |
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ret = spi_nor_write_sr_and_check(nor, 0); |
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if (ret) |
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dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n"); |
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return ret; |
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} |
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static int atmel_at25fs_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) |
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{ |
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return -EOPNOTSUPP; |
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} |
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static const struct spi_nor_locking_ops atmel_at25fs_locking_ops = { |
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.lock = atmel_at25fs_lock, |
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.unlock = atmel_at25fs_unlock, |
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.is_locked = atmel_at25fs_is_locked, |
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}; |
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static void atmel_at25fs_default_init(struct spi_nor *nor) |
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{ |
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nor->params->locking_ops = &atmel_at25fs_locking_ops; |
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} |
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static const struct spi_nor_fixups atmel_at25fs_fixups = { |
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.default_init = atmel_at25fs_default_init, |
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}; |
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static const struct flash_info atmel_parts[] = { |
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/* Atmel -- some are (confusingly) marketed as "DataFlash" */ |
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{ "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K | SPI_NOR_HAS_LOCK) |
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.fixups = &atmel_at25fs_fixups }, |
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{ "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_HAS_LOCK) |
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.fixups = &atmel_at25fs_fixups }, |
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{ "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64, |
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SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, |
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{ "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, |
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{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_LOCK) }, |
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{ "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16, SECT_4K) }, |
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}; |
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const struct spi_nor_manufacturer spi_nor_atmel = { |
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.name = "atmel", |
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.parts = atmel_parts, |
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.nparts = ARRAY_SIZE(atmel_parts), |
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};
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