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280 lines
7.0 KiB
280 lines
7.0 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
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*/ |
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/* |
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* Driver for interrupt combiners in the Top-level Control and Status |
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* Registers (TCSR) hardware block in Qualcomm Technologies chips. |
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* An interrupt combiner in this block combines a set of interrupts by |
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* OR'ing the individual interrupt signals into a summary interrupt |
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* signal routed to a parent interrupt controller, and provides read- |
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* only, 32-bit registers to query the status of individual interrupts. |
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* The status bit for IRQ n is bit (n % 32) within register (n / 32) |
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* of the given combiner. Thus, each combiner can be described as a set |
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* of register offsets and the number of IRQs managed. |
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*/ |
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#define pr_fmt(fmt) "QCOM80B1:" fmt |
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#include <linux/acpi.h> |
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#include <linux/irqchip/chained_irq.h> |
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#include <linux/irqdomain.h> |
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#include <linux/platform_device.h> |
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#define REG_SIZE 32 |
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struct combiner_reg { |
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void __iomem *addr; |
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unsigned long enabled; |
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}; |
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struct combiner { |
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struct irq_domain *domain; |
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int parent_irq; |
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u32 nirqs; |
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u32 nregs; |
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struct combiner_reg regs[]; |
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}; |
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static inline int irq_nr(u32 reg, u32 bit) |
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{ |
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return reg * REG_SIZE + bit; |
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} |
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/* |
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* Handler for the cascaded IRQ. |
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*/ |
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static void combiner_handle_irq(struct irq_desc *desc) |
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{ |
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struct combiner *combiner = irq_desc_get_handler_data(desc); |
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struct irq_chip *chip = irq_desc_get_chip(desc); |
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u32 reg; |
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chained_irq_enter(chip, desc); |
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for (reg = 0; reg < combiner->nregs; reg++) { |
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int virq; |
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int hwirq; |
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u32 bit; |
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u32 status; |
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bit = readl_relaxed(combiner->regs[reg].addr); |
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status = bit & combiner->regs[reg].enabled; |
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if (bit && !status) |
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pr_warn_ratelimited("Unexpected IRQ on CPU%d: (%08x %08lx %p)\n", |
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smp_processor_id(), bit, |
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combiner->regs[reg].enabled, |
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combiner->regs[reg].addr); |
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while (status) { |
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bit = __ffs(status); |
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status &= ~(1 << bit); |
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hwirq = irq_nr(reg, bit); |
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virq = irq_find_mapping(combiner->domain, hwirq); |
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if (virq > 0) |
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generic_handle_irq(virq); |
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} |
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} |
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chained_irq_exit(chip, desc); |
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} |
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static void combiner_irq_chip_mask_irq(struct irq_data *data) |
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{ |
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struct combiner *combiner = irq_data_get_irq_chip_data(data); |
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struct combiner_reg *reg = combiner->regs + data->hwirq / REG_SIZE; |
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clear_bit(data->hwirq % REG_SIZE, ®->enabled); |
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} |
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static void combiner_irq_chip_unmask_irq(struct irq_data *data) |
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{ |
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struct combiner *combiner = irq_data_get_irq_chip_data(data); |
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struct combiner_reg *reg = combiner->regs + data->hwirq / REG_SIZE; |
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set_bit(data->hwirq % REG_SIZE, ®->enabled); |
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} |
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static struct irq_chip irq_chip = { |
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.irq_mask = combiner_irq_chip_mask_irq, |
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.irq_unmask = combiner_irq_chip_unmask_irq, |
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.name = "qcom-irq-combiner" |
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}; |
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static int combiner_irq_map(struct irq_domain *domain, unsigned int irq, |
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irq_hw_number_t hwirq) |
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{ |
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irq_set_chip_and_handler(irq, &irq_chip, handle_level_irq); |
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irq_set_chip_data(irq, domain->host_data); |
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irq_set_noprobe(irq); |
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return 0; |
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} |
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static void combiner_irq_unmap(struct irq_domain *domain, unsigned int irq) |
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{ |
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irq_domain_reset_irq_data(irq_get_irq_data(irq)); |
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} |
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static int combiner_irq_translate(struct irq_domain *d, struct irq_fwspec *fws, |
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unsigned long *hwirq, unsigned int *type) |
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{ |
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struct combiner *combiner = d->host_data; |
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if (is_acpi_node(fws->fwnode)) { |
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if (WARN_ON((fws->param_count != 2) || |
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(fws->param[0] >= combiner->nirqs) || |
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(fws->param[1] & IORESOURCE_IRQ_LOWEDGE) || |
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(fws->param[1] & IORESOURCE_IRQ_HIGHEDGE))) |
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return -EINVAL; |
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*hwirq = fws->param[0]; |
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*type = fws->param[1]; |
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return 0; |
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} |
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return -EINVAL; |
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} |
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static const struct irq_domain_ops domain_ops = { |
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.map = combiner_irq_map, |
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.unmap = combiner_irq_unmap, |
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.translate = combiner_irq_translate |
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}; |
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static acpi_status count_registers_cb(struct acpi_resource *ares, void *context) |
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{ |
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int *count = context; |
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if (ares->type == ACPI_RESOURCE_TYPE_GENERIC_REGISTER) |
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++(*count); |
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return AE_OK; |
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} |
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static int count_registers(struct platform_device *pdev) |
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{ |
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acpi_handle ahandle = ACPI_HANDLE(&pdev->dev); |
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acpi_status status; |
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int count = 0; |
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if (!acpi_has_method(ahandle, METHOD_NAME__CRS)) |
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return -EINVAL; |
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status = acpi_walk_resources(ahandle, METHOD_NAME__CRS, |
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count_registers_cb, &count); |
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if (ACPI_FAILURE(status)) |
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return -EINVAL; |
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return count; |
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} |
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struct get_registers_context { |
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struct device *dev; |
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struct combiner *combiner; |
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int err; |
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}; |
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static acpi_status get_registers_cb(struct acpi_resource *ares, void *context) |
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{ |
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struct get_registers_context *ctx = context; |
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struct acpi_resource_generic_register *reg; |
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phys_addr_t paddr; |
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void __iomem *vaddr; |
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if (ares->type != ACPI_RESOURCE_TYPE_GENERIC_REGISTER) |
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return AE_OK; |
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reg = &ares->data.generic_reg; |
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paddr = reg->address; |
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if ((reg->space_id != ACPI_SPACE_MEM) || |
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(reg->bit_offset != 0) || |
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(reg->bit_width > REG_SIZE)) { |
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dev_err(ctx->dev, "Bad register resource @%pa\n", &paddr); |
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ctx->err = -EINVAL; |
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return AE_ERROR; |
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} |
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vaddr = devm_ioremap(ctx->dev, reg->address, REG_SIZE); |
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if (!vaddr) { |
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dev_err(ctx->dev, "Can't map register @%pa\n", &paddr); |
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ctx->err = -ENOMEM; |
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return AE_ERROR; |
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} |
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ctx->combiner->regs[ctx->combiner->nregs].addr = vaddr; |
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ctx->combiner->nirqs += reg->bit_width; |
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ctx->combiner->nregs++; |
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return AE_OK; |
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} |
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static int get_registers(struct platform_device *pdev, struct combiner *comb) |
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{ |
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acpi_handle ahandle = ACPI_HANDLE(&pdev->dev); |
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acpi_status status; |
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struct get_registers_context ctx; |
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if (!acpi_has_method(ahandle, METHOD_NAME__CRS)) |
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return -EINVAL; |
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ctx.dev = &pdev->dev; |
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ctx.combiner = comb; |
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ctx.err = 0; |
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status = acpi_walk_resources(ahandle, METHOD_NAME__CRS, |
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get_registers_cb, &ctx); |
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if (ACPI_FAILURE(status)) |
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return ctx.err; |
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return 0; |
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} |
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static int __init combiner_probe(struct platform_device *pdev) |
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{ |
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struct combiner *combiner; |
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int nregs; |
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int err; |
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nregs = count_registers(pdev); |
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if (nregs <= 0) { |
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dev_err(&pdev->dev, "Error reading register resources\n"); |
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return -EINVAL; |
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} |
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combiner = devm_kzalloc(&pdev->dev, struct_size(combiner, regs, nregs), |
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GFP_KERNEL); |
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if (!combiner) |
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return -ENOMEM; |
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err = get_registers(pdev, combiner); |
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if (err < 0) |
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return err; |
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combiner->parent_irq = platform_get_irq(pdev, 0); |
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if (combiner->parent_irq <= 0) |
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return -EPROBE_DEFER; |
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combiner->domain = irq_domain_create_linear(pdev->dev.fwnode, combiner->nirqs, |
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&domain_ops, combiner); |
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if (!combiner->domain) |
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/* Errors printed by irq_domain_create_linear */ |
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return -ENODEV; |
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irq_set_chained_handler_and_data(combiner->parent_irq, |
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combiner_handle_irq, combiner); |
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dev_info(&pdev->dev, "Initialized with [p=%d,n=%d,r=%p]\n", |
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combiner->parent_irq, combiner->nirqs, combiner->regs[0].addr); |
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return 0; |
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} |
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static const struct acpi_device_id qcom_irq_combiner_ids[] = { |
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{ "QCOM80B1", }, |
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{ } |
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}; |
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static struct platform_driver qcom_irq_combiner_probe = { |
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.driver = { |
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.name = "qcom-irq-combiner", |
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.acpi_match_table = ACPI_PTR(qcom_irq_combiner_ids), |
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}, |
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.probe = combiner_probe, |
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}; |
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builtin_platform_driver(qcom_irq_combiner_probe);
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