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38 lines
1.1 KiB
38 lines
1.1 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation |
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* Rewrite, cleanup: |
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* Copyright (C) 2004 Olof Johansson <[email protected]>, IBM Corporation |
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*/ |
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#ifndef _ASM_POWERPC_TCE_H |
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#define _ASM_POWERPC_TCE_H |
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#ifdef __KERNEL__ |
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#include <asm/iommu.h> |
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/* |
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* Tces come in two formats, one for the virtual bus and a different |
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* format for PCI. PCI TCEs can have hardware or software maintianed |
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* coherency. |
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*/ |
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#define TCE_VB 0 |
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#define TCE_PCI 1 |
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/* TCE page size is 4096 bytes (1 << 12) */ |
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#define TCE_SHIFT 12 |
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#define TCE_PAGE_SIZE (1 << TCE_SHIFT) |
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#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */ |
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#define TCE_RPN_MASK 0xfffffffffful /* 40-bit RPN (4K pages) */ |
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#define TCE_RPN_SHIFT 12 |
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#define TCE_VALID 0x800 /* TCE valid */ |
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#define TCE_ALLIO 0x400 /* TCE valid for all lpars */ |
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#define TCE_PCI_WRITE 0x2 /* write from PCI allowed */ |
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#define TCE_PCI_READ 0x1 /* read from PCI allowed */ |
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#define TCE_VB_WRITE 0x1 /* write from VB allowed */ |
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#endif /* __KERNEL__ */ |
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#endif /* _ASM_POWERPC_TCE_H */
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