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295 lines
8.6 KiB
295 lines
8.6 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* This control block defines the PACA which defines the processor |
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* specific data for each logical processor on the system. |
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* There are some pointers defined that are utilized by PLIC. |
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* |
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* C 2001 PPC 64 Team, IBM Corp |
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*/ |
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#ifndef _ASM_POWERPC_PACA_H |
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#define _ASM_POWERPC_PACA_H |
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#ifdef __KERNEL__ |
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#ifdef CONFIG_PPC64 |
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#include <linux/string.h> |
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#include <asm/types.h> |
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#include <asm/lppaca.h> |
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#include <asm/mmu.h> |
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#include <asm/page.h> |
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#ifdef CONFIG_PPC_BOOK3E |
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#include <asm/exception-64e.h> |
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#else |
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#include <asm/exception-64s.h> |
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#endif |
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#ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
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#include <asm/kvm_book3s_asm.h> |
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#endif |
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#include <asm/accounting.h> |
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#include <asm/hmi.h> |
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#include <asm/cpuidle.h> |
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#include <asm/atomic.h> |
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#include <asm-generic/mmiowb_types.h> |
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register struct paca_struct *local_paca asm("r13"); |
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#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP) |
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extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ |
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/* |
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* Add standard checks that preemption cannot occur when using get_paca(): |
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* otherwise the paca_struct it points to may be the wrong one just after. |
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*/ |
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#define get_paca() ((void) debug_smp_processor_id(), local_paca) |
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#else |
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#define get_paca() local_paca |
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#endif |
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#ifdef CONFIG_PPC_PSERIES |
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#define get_lppaca() (get_paca()->lppaca_ptr) |
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#endif |
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#define get_slb_shadow() (get_paca()->slb_shadow_ptr) |
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struct task_struct; |
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struct rtas_args; |
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/* |
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* Defines the layout of the paca. |
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* |
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* This structure is not directly accessed by firmware or the service |
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* processor. |
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*/ |
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struct paca_struct { |
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#ifdef CONFIG_PPC_PSERIES |
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/* |
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* Because hw_cpu_id, unlike other paca fields, is accessed |
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* routinely from other CPUs (from the IRQ code), we stick to |
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* read-only (after boot) fields in the first cacheline to |
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* avoid cacheline bouncing. |
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*/ |
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struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ |
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#endif /* CONFIG_PPC_PSERIES */ |
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/* |
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* MAGIC: the spinlock functions in arch/powerpc/lib/locks.c |
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* load lock_token and paca_index with a single lwz |
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* instruction. They must travel together and be properly |
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* aligned. |
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*/ |
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#ifdef __BIG_ENDIAN__ |
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u16 lock_token; /* Constant 0x8000, used in locks */ |
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u16 paca_index; /* Logical processor number */ |
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#else |
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u16 paca_index; /* Logical processor number */ |
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u16 lock_token; /* Constant 0x8000, used in locks */ |
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#endif |
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u64 kernel_toc; /* Kernel TOC address */ |
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u64 kernelbase; /* Base address of kernel */ |
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u64 kernel_msr; /* MSR while running in kernel */ |
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void *emergency_sp; /* pointer to emergency stack */ |
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u64 data_offset; /* per cpu data offset */ |
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s16 hw_cpu_id; /* Physical processor number */ |
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u8 cpu_start; /* At startup, processor spins until */ |
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/* this becomes non-zero. */ |
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u8 kexec_state; /* set when kexec down has irqs off */ |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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struct slb_shadow *slb_shadow_ptr; |
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struct dtl_entry *dispatch_log; |
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struct dtl_entry *dispatch_log_end; |
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#endif |
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u64 dscr_default; /* per-CPU default DSCR */ |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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/* |
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* Now, starting in cacheline 2, the exception save areas |
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*/ |
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/* used for most interrupts/exceptions */ |
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u64 exgen[EX_SIZE] __attribute__((aligned(0x80))); |
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u64 exslb[EX_SIZE]; /* used for SLB/segment table misses |
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* on the linear mapping */ |
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/* SLB related definitions */ |
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u16 vmalloc_sllp; |
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u8 slb_cache_ptr; |
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u8 stab_rr; /* stab/slb round-robin counter */ |
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#ifdef CONFIG_DEBUG_VM |
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u8 in_kernel_slb_handler; |
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#endif |
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u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */ |
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u32 slb_kern_bitmap; |
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u32 slb_cache[SLB_CACHE_ENTRIES]; |
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#endif /* CONFIG_PPC_BOOK3S_64 */ |
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#ifdef CONFIG_PPC_BOOK3E |
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u64 exgen[8] __aligned(0x40); |
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/* Keep pgd in the same cacheline as the start of extlb */ |
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pgd_t *pgd __aligned(0x40); /* Current PGD */ |
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pgd_t *kernel_pgd; /* Kernel PGD */ |
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/* Shared by all threads of a core -- points to tcd of first thread */ |
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struct tlb_core_data *tcd_ptr; |
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/* |
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* We can have up to 3 levels of reentrancy in the TLB miss handler, |
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* in each of four exception levels (normal, crit, mcheck, debug). |
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*/ |
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u64 extlb[12][EX_TLB_SIZE / sizeof(u64)]; |
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u64 exmc[8]; /* used for machine checks */ |
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u64 excrit[8]; /* used for crit interrupts */ |
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u64 exdbg[8]; /* used for debug interrupts */ |
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/* Kernel stack pointers for use by special exceptions */ |
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void *mc_kstack; |
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void *crit_kstack; |
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void *dbg_kstack; |
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struct tlb_core_data tcd; |
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#endif /* CONFIG_PPC_BOOK3E */ |
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#ifdef CONFIG_PPC_BOOK3S |
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mm_context_id_t mm_ctx_id; |
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#ifdef CONFIG_PPC_MM_SLICES |
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unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE]; |
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unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE]; |
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unsigned long mm_ctx_slb_addr_limit; |
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#else |
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u16 mm_ctx_user_psize; |
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u16 mm_ctx_sllp; |
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#endif |
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#endif |
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/* |
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* then miscellaneous read-write fields |
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*/ |
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struct task_struct *__current; /* Pointer to current */ |
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u64 kstack; /* Saved Kernel stack addr */ |
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u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */ |
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u64 saved_msr; /* MSR saved here by enter_rtas */ |
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#ifdef CONFIG_PPC_BOOK3E |
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u16 trap_save; /* Used when bad stack is encountered */ |
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#endif |
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u8 irq_soft_mask; /* mask for irq soft masking */ |
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u8 irq_happened; /* irq happened while soft-disabled */ |
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u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */ |
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
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u8 pmcregs_in_use; /* pseries puts this in lppaca */ |
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#endif |
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u64 sprg_vdso; /* Saved user-visible sprg */ |
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
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u64 tm_scratch; /* TM scratch area for reclaim */ |
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#endif |
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#ifdef CONFIG_PPC_POWERNV |
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/* PowerNV idle fields */ |
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/* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */ |
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unsigned long idle_state; |
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union { |
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/* P7/P8 specific fields */ |
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struct { |
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/* PNV_THREAD_RUNNING/NAP/SLEEP */ |
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u8 thread_idle_state; |
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/* Mask to denote subcore sibling threads */ |
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u8 subcore_sibling_mask; |
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}; |
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/* P9 specific fields */ |
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struct { |
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
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/* The PSSCR value that the kernel requested before going to stop */ |
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u64 requested_psscr; |
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/* Flag to request this thread not to stop */ |
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atomic_t dont_stop; |
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#endif |
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}; |
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}; |
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#endif |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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/* Non-maskable exceptions that are not performance critical */ |
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u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */ |
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u64 exmc[EX_SIZE]; /* used for machine checks */ |
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#endif |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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/* Exclusive stacks for system reset and machine check exception. */ |
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void *nmi_emergency_sp; |
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void *mc_emergency_sp; |
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u16 in_nmi; /* In nmi handler */ |
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/* |
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* Flag to check whether we are in machine check early handler |
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* and already using emergency stack. |
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*/ |
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u16 in_mce; |
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u8 hmi_event_available; /* HMI event is available */ |
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u8 hmi_p9_special_emu; /* HMI P9 special emulation */ |
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u32 hmi_irqs; /* HMI irq stat */ |
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#endif |
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u8 ftrace_enabled; /* Hard disable ftrace */ |
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/* Stuff for accurate time accounting */ |
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struct cpu_accounting_data accounting; |
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u64 dtl_ridx; /* read index in dispatch log */ |
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struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */ |
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#ifdef CONFIG_KVM_BOOK3S_HANDLER |
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE |
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/* We use this to store guest state in */ |
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struct kvmppc_book3s_shadow_vcpu shadow_vcpu; |
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#endif |
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struct kvmppc_host_state kvm_hstate; |
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
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/* |
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* Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for |
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* more details |
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*/ |
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struct sibling_subcore_state *sibling_subcore_state; |
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#endif |
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#endif |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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/* |
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* rfi fallback flush must be in its own cacheline to prevent |
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* other paca data leaking into the L1d |
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*/ |
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u64 exrfi[EX_SIZE] __aligned(0x80); |
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void *rfi_flush_fallback_area; |
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u64 l1d_flush_size; |
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#endif |
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#ifdef CONFIG_PPC_PSERIES |
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struct rtas_args *rtas_args_reentrant; |
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u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */ |
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#endif /* CONFIG_PPC_PSERIES */ |
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#ifdef CONFIG_PPC_BOOK3S_64 |
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/* Capture SLB related old contents in MCE handler. */ |
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struct slb_entry *mce_faulty_slbs; |
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u16 slb_save_cache_ptr; |
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#endif /* CONFIG_PPC_BOOK3S_64 */ |
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#ifdef CONFIG_STACKPROTECTOR |
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unsigned long canary; |
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#endif |
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#ifdef CONFIG_MMIOWB |
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struct mmiowb_state mmiowb_state; |
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#endif |
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} ____cacheline_aligned; |
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extern void copy_mm_to_paca(struct mm_struct *mm); |
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extern struct paca_struct **paca_ptrs; |
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extern void initialise_paca(struct paca_struct *new_paca, int cpu); |
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extern void setup_paca(struct paca_struct *new_paca); |
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extern void allocate_paca_ptrs(void); |
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extern void allocate_paca(int cpu); |
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extern void free_unused_pacas(void); |
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#else /* CONFIG_PPC64 */ |
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static inline void allocate_paca_ptrs(void) { }; |
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static inline void allocate_paca(int cpu) { }; |
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static inline void free_unused_pacas(void) { }; |
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#endif /* CONFIG_PPC64 */ |
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#endif /* __KERNEL__ */ |
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#endif /* _ASM_POWERPC_PACA_H */
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