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68 lines
1.9 KiB
68 lines
1.9 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright 2010-2011 Freescale Semiconductor, Inc. |
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*/ |
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#ifndef ASM_KVM_BOOKE_HV_ASM_H |
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#define ASM_KVM_BOOKE_HV_ASM_H |
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#include <asm/feature-fixups.h> |
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#ifdef __ASSEMBLY__ |
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/* |
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* All exceptions from guest state must go through KVM |
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* (except for those which are delivered directly to the guest) -- |
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* there are no exceptions for which we fall through directly to |
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* the normal host handler. |
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* |
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* 32-bit host |
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* Expected inputs (normal exceptions): |
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* SCRATCH0 = saved r10 |
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* r10 = thread struct |
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* r11 = appropriate SRR1 variant (currently used as scratch) |
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* r13 = saved CR |
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* *(r10 + THREAD_NORMSAVE(0)) = saved r11 |
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* *(r10 + THREAD_NORMSAVE(2)) = saved r13 |
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* |
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* Expected inputs (crit/mcheck/debug exceptions): |
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* appropriate SCRATCH = saved r8 |
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* r8 = exception level stack frame |
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* r9 = *(r8 + _CCR) = saved CR |
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* r11 = appropriate SRR1 variant (currently used as scratch) |
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* *(r8 + GPR9) = saved r9 |
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* *(r8 + GPR10) = saved r10 (r10 not yet clobbered) |
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* *(r8 + GPR11) = saved r11 |
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* |
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* 64-bit host |
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* Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types): |
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* r10 = saved CR |
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* r13 = PACA_POINTER |
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* *(r13 + PACA_EX##type + EX_R10) = saved r10 |
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* *(r13 + PACA_EX##type + EX_R11) = saved r11 |
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* SPRN_SPRG_##type##_SCRATCH = saved r13 |
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* |
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* Expected inputs (TLB exception type): |
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* r10 = saved CR |
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* r12 = extlb pointer |
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* r13 = PACA_POINTER |
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* *(r12 + EX_TLB_R10) = saved r10 |
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* *(r12 + EX_TLB_R11) = saved r11 |
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* *(r12 + EX_TLB_R13) = saved r13 |
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* SPRN_SPRG_GEN_SCRATCH = saved r12 |
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* |
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* Only the bolted version of TLB miss exception handlers is supported now. |
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*/ |
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.macro DO_KVM intno srr1 |
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#ifdef CONFIG_KVM_BOOKE_HV |
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BEGIN_FTR_SECTION |
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mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */ |
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bf 3, 1975f |
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b kvmppc_handler_\intno\()_\srr1 |
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1975: |
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END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) |
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#endif |
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.endm |
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#endif /*__ASSEMBLY__ */ |
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#endif /* ASM_KVM_BOOKE_HV_ASM_H */
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