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39 lines
1.1 KiB
39 lines
1.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* Copyright (c) 2018 Intel Corporation */ |
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#ifndef _IGC_MAC_H_ |
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#define _IGC_MAC_H_ |
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#include "igc_hw.h" |
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#include "igc_phy.h" |
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#include "igc_defines.h" |
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/* forward declaration */ |
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s32 igc_disable_pcie_master(struct igc_hw *hw); |
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s32 igc_check_for_copper_link(struct igc_hw *hw); |
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s32 igc_config_fc_after_link_up(struct igc_hw *hw); |
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s32 igc_force_mac_fc(struct igc_hw *hw); |
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void igc_init_rx_addrs(struct igc_hw *hw, u16 rar_count); |
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s32 igc_setup_link(struct igc_hw *hw); |
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void igc_clear_hw_cntrs_base(struct igc_hw *hw); |
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s32 igc_get_auto_rd_done(struct igc_hw *hw); |
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void igc_put_hw_semaphore(struct igc_hw *hw); |
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void igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index); |
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void igc_config_collision_dist(struct igc_hw *hw); |
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s32 igc_get_speed_and_duplex_copper(struct igc_hw *hw, u16 *speed, |
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u16 *duplex); |
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bool igc_enable_mng_pass_thru(struct igc_hw *hw); |
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void igc_update_mc_addr_list(struct igc_hw *hw, |
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u8 *mc_addr_list, u32 mc_addr_count); |
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enum igc_mng_mode { |
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igc_mng_mode_none = 0, |
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igc_mng_mode_asf, |
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igc_mng_mode_pt, |
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igc_mng_mode_ipmi, |
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igc_mng_mode_host_if_only |
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}; |
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#endif
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