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166 lines
5.6 KiB
166 lines
5.6 KiB
/* |
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* Copyright(c) 2016 - 2018 Intel Corporation. |
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* |
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* This file is provided under a dual BSD/GPLv2 license. When using or |
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* redistributing this file, you may do so under either license. |
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* |
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* GPL LICENSE SUMMARY |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of version 2 of the GNU General Public License as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details. |
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* |
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* BSD LICENSE |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* - Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* - Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* - Neither the name of Intel Corporation nor the names of its |
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* contributors may be used to endorse or promote products derived |
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* from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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*/ |
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#if !defined(__RVT_TRACE_CQ_H) || defined(TRACE_HEADER_MULTI_READ) |
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#define __RVT_TRACE_CQ_H |
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#include <linux/tracepoint.h> |
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#include <linux/trace_seq.h> |
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#include <rdma/ib_verbs.h> |
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#include <rdma/rdmavt_cq.h> |
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#undef TRACE_SYSTEM |
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#define TRACE_SYSTEM rvt_cq |
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#define wc_opcode_name(opcode) { IB_WC_##opcode, #opcode } |
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#define show_wc_opcode(opcode) \ |
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__print_symbolic(opcode, \ |
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wc_opcode_name(SEND), \ |
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wc_opcode_name(RDMA_WRITE), \ |
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wc_opcode_name(RDMA_READ), \ |
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wc_opcode_name(COMP_SWAP), \ |
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wc_opcode_name(FETCH_ADD), \ |
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wc_opcode_name(LSO), \ |
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wc_opcode_name(LOCAL_INV), \ |
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wc_opcode_name(REG_MR), \ |
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wc_opcode_name(MASKED_COMP_SWAP), \ |
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wc_opcode_name(RECV), \ |
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wc_opcode_name(RECV_RDMA_WITH_IMM)) |
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#define CQ_ATTR_PRINT \ |
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"[%s] user cq %s cqe %u comp_vector %d comp_vector_cpu %d flags %x" |
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DECLARE_EVENT_CLASS(rvt_cq_template, |
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TP_PROTO(struct rvt_cq *cq, |
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const struct ib_cq_init_attr *attr), |
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TP_ARGS(cq, attr), |
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TP_STRUCT__entry(RDI_DEV_ENTRY(cq->rdi) |
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__field(struct rvt_mmap_info *, ip) |
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__field(unsigned int, cqe) |
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__field(int, comp_vector) |
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__field(int, comp_vector_cpu) |
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__field(u32, flags) |
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), |
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TP_fast_assign(RDI_DEV_ASSIGN(cq->rdi) |
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__entry->ip = cq->ip; |
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__entry->cqe = attr->cqe; |
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__entry->comp_vector = attr->comp_vector; |
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__entry->comp_vector_cpu = |
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cq->comp_vector_cpu; |
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__entry->flags = attr->flags; |
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), |
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TP_printk(CQ_ATTR_PRINT, __get_str(dev), |
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__entry->ip ? "true" : "false", __entry->cqe, |
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__entry->comp_vector, __entry->comp_vector_cpu, |
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__entry->flags |
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) |
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); |
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DEFINE_EVENT(rvt_cq_template, rvt_create_cq, |
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TP_PROTO(struct rvt_cq *cq, const struct ib_cq_init_attr *attr), |
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TP_ARGS(cq, attr)); |
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#define CQ_PRN \ |
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"[%s] idx %u wr_id %llx status %u opcode %u,%s length %u qpn %x flags %x imm %x" |
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DECLARE_EVENT_CLASS( |
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rvt_cq_entry_template, |
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TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx), |
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TP_ARGS(cq, wc, idx), |
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TP_STRUCT__entry( |
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RDI_DEV_ENTRY(cq->rdi) |
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__field(u64, wr_id) |
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__field(u32, status) |
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__field(u32, opcode) |
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__field(u32, qpn) |
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__field(u32, length) |
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__field(u32, idx) |
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__field(u32, flags) |
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__field(u32, imm) |
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), |
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TP_fast_assign( |
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RDI_DEV_ASSIGN(cq->rdi) |
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__entry->wr_id = wc->wr_id; |
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__entry->status = wc->status; |
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__entry->opcode = wc->opcode; |
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__entry->length = wc->byte_len; |
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__entry->qpn = wc->qp->qp_num; |
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__entry->idx = idx; |
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__entry->flags = wc->wc_flags; |
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__entry->imm = be32_to_cpu(wc->ex.imm_data); |
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), |
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TP_printk( |
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CQ_PRN, |
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__get_str(dev), |
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__entry->idx, |
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__entry->wr_id, |
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__entry->status, |
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__entry->opcode, show_wc_opcode(__entry->opcode), |
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__entry->length, |
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__entry->qpn, |
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__entry->flags, |
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__entry->imm |
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) |
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); |
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DEFINE_EVENT( |
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rvt_cq_entry_template, rvt_cq_enter, |
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TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx), |
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TP_ARGS(cq, wc, idx)); |
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DEFINE_EVENT( |
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rvt_cq_entry_template, rvt_cq_poll, |
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TP_PROTO(struct rvt_cq *cq, struct ib_wc *wc, u32 idx), |
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TP_ARGS(cq, wc, idx)); |
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#endif /* __RVT_TRACE_CQ_H */ |
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#undef TRACE_INCLUDE_PATH |
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#undef TRACE_INCLUDE_FILE |
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#define TRACE_INCLUDE_PATH . |
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#define TRACE_INCLUDE_FILE trace_cq |
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#include <trace/define_trace.h>
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