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797 lines
18 KiB
797 lines
18 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Low-level SPU handling |
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* |
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005 |
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* |
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* Author: Arnd Bergmann <[email protected]> |
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*/ |
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|
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#undef DEBUG |
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|
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#include <linux/interrupt.h> |
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#include <linux/list.h> |
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#include <linux/init.h> |
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#include <linux/ptrace.h> |
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#include <linux/slab.h> |
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#include <linux/wait.h> |
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#include <linux/mm.h> |
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#include <linux/io.h> |
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#include <linux/mutex.h> |
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#include <linux/linux_logo.h> |
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#include <linux/syscore_ops.h> |
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#include <asm/spu.h> |
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#include <asm/spu_priv1.h> |
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#include <asm/spu_csa.h> |
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#include <asm/xmon.h> |
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#include <asm/prom.h> |
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#include <asm/kexec.h> |
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const struct spu_management_ops *spu_management_ops; |
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EXPORT_SYMBOL_GPL(spu_management_ops); |
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const struct spu_priv1_ops *spu_priv1_ops; |
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EXPORT_SYMBOL_GPL(spu_priv1_ops); |
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struct cbe_spu_info cbe_spu_info[MAX_NUMNODES]; |
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EXPORT_SYMBOL_GPL(cbe_spu_info); |
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/* |
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* The spufs fault-handling code needs to call force_sig_fault to raise signals |
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* on DMA errors. Export it here to avoid general kernel-wide access to this |
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* function |
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*/ |
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EXPORT_SYMBOL_GPL(force_sig_fault); |
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/* |
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* Protects cbe_spu_info and spu->number. |
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*/ |
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static DEFINE_SPINLOCK(spu_lock); |
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|
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/* |
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* List of all spus in the system. |
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* |
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* This list is iterated by callers from irq context and callers that |
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* want to sleep. Thus modifications need to be done with both |
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* spu_full_list_lock and spu_full_list_mutex held, while iterating |
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* through it requires either of these locks. |
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* |
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* In addition spu_full_list_lock protects all assignments to |
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* spu->mm. |
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*/ |
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static LIST_HEAD(spu_full_list); |
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static DEFINE_SPINLOCK(spu_full_list_lock); |
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static DEFINE_MUTEX(spu_full_list_mutex); |
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void spu_invalidate_slbs(struct spu *spu) |
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{ |
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struct spu_priv2 __iomem *priv2 = spu->priv2; |
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unsigned long flags; |
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spin_lock_irqsave(&spu->register_lock, flags); |
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if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK) |
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out_be64(&priv2->slb_invalidate_all_W, 0UL); |
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spin_unlock_irqrestore(&spu->register_lock, flags); |
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} |
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EXPORT_SYMBOL_GPL(spu_invalidate_slbs); |
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/* This is called by the MM core when a segment size is changed, to |
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* request a flush of all the SPEs using a given mm |
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*/ |
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void spu_flush_all_slbs(struct mm_struct *mm) |
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{ |
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struct spu *spu; |
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unsigned long flags; |
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spin_lock_irqsave(&spu_full_list_lock, flags); |
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list_for_each_entry(spu, &spu_full_list, full_list) { |
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if (spu->mm == mm) |
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spu_invalidate_slbs(spu); |
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} |
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spin_unlock_irqrestore(&spu_full_list_lock, flags); |
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} |
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/* The hack below stinks... try to do something better one of |
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* these days... Does it even work properly with NR_CPUS == 1 ? |
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*/ |
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static inline void mm_needs_global_tlbie(struct mm_struct *mm) |
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{ |
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int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; |
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/* Global TLBIE broadcast required with SPEs. */ |
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bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr); |
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} |
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void spu_associate_mm(struct spu *spu, struct mm_struct *mm) |
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{ |
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unsigned long flags; |
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spin_lock_irqsave(&spu_full_list_lock, flags); |
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spu->mm = mm; |
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spin_unlock_irqrestore(&spu_full_list_lock, flags); |
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if (mm) |
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mm_needs_global_tlbie(mm); |
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} |
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EXPORT_SYMBOL_GPL(spu_associate_mm); |
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int spu_64k_pages_available(void) |
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{ |
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return mmu_psize_defs[MMU_PAGE_64K].shift != 0; |
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} |
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EXPORT_SYMBOL_GPL(spu_64k_pages_available); |
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static void spu_restart_dma(struct spu *spu) |
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{ |
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struct spu_priv2 __iomem *priv2 = spu->priv2; |
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if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) |
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out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); |
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else { |
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set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags); |
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mb(); |
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} |
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} |
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static inline void spu_load_slb(struct spu *spu, int slbe, struct copro_slb *slb) |
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{ |
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struct spu_priv2 __iomem *priv2 = spu->priv2; |
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pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n", |
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__func__, slbe, slb->vsid, slb->esid); |
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out_be64(&priv2->slb_index_W, slbe); |
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/* set invalid before writing vsid */ |
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out_be64(&priv2->slb_esid_RW, 0); |
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/* now it's safe to write the vsid */ |
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out_be64(&priv2->slb_vsid_RW, slb->vsid); |
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/* setting the new esid makes the entry valid again */ |
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out_be64(&priv2->slb_esid_RW, slb->esid); |
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} |
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static int __spu_trap_data_seg(struct spu *spu, unsigned long ea) |
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{ |
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struct copro_slb slb; |
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int ret; |
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ret = copro_calculate_slb(spu->mm, ea, &slb); |
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if (ret) |
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return ret; |
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spu_load_slb(spu, spu->slb_replace, &slb); |
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spu->slb_replace++; |
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if (spu->slb_replace >= 8) |
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spu->slb_replace = 0; |
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spu_restart_dma(spu); |
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spu->stats.slb_flt++; |
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return 0; |
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} |
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extern int hash_page(unsigned long ea, unsigned long access, |
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unsigned long trap, unsigned long dsisr); //XXX |
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static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr) |
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{ |
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int ret; |
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pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea); |
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/* |
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* Handle kernel space hash faults immediately. User hash |
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* faults need to be deferred to process context. |
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*/ |
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if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) && |
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(get_region_id(ea) != USER_REGION_ID)) { |
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spin_unlock(&spu->register_lock); |
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ret = hash_page(ea, |
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_PAGE_PRESENT | _PAGE_READ | _PAGE_PRIVILEGED, |
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0x300, dsisr); |
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spin_lock(&spu->register_lock); |
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if (!ret) { |
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spu_restart_dma(spu); |
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return 0; |
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} |
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} |
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spu->class_1_dar = ea; |
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spu->class_1_dsisr = dsisr; |
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spu->stop_callback(spu, 1); |
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spu->class_1_dar = 0; |
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spu->class_1_dsisr = 0; |
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return 0; |
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} |
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static void __spu_kernel_slb(void *addr, struct copro_slb *slb) |
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{ |
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unsigned long ea = (unsigned long)addr; |
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u64 llp; |
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if (get_region_id(ea) == LINEAR_MAP_REGION_ID) |
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llp = mmu_psize_defs[mmu_linear_psize].sllp; |
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else |
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llp = mmu_psize_defs[mmu_virtual_psize].sllp; |
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slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) | |
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SLB_VSID_KERNEL | llp; |
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slb->esid = (ea & ESID_MASK) | SLB_ESID_V; |
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} |
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/** |
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* Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the |
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* address @new_addr is present. |
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*/ |
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static inline int __slb_present(struct copro_slb *slbs, int nr_slbs, |
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void *new_addr) |
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{ |
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unsigned long ea = (unsigned long)new_addr; |
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int i; |
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for (i = 0; i < nr_slbs; i++) |
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if (!((slbs[i].esid ^ ea) & ESID_MASK)) |
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return 1; |
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return 0; |
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} |
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/** |
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* Setup the SPU kernel SLBs, in preparation for a context save/restore. We |
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* need to map both the context save area, and the save/restore code. |
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* |
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* Because the lscsa and code may cross segment boundaries, we check to see |
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* if mappings are required for the start and end of each range. We currently |
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* assume that the mappings are smaller that one segment - if not, something |
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* is seriously wrong. |
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*/ |
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void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, |
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void *code, int code_size) |
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{ |
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struct copro_slb slbs[4]; |
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int i, nr_slbs = 0; |
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/* start and end addresses of both mappings */ |
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void *addrs[] = { |
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lscsa, (void *)lscsa + sizeof(*lscsa) - 1, |
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code, code + code_size - 1 |
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}; |
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/* check the set of addresses, and create a new entry in the slbs array |
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* if there isn't already a SLB for that address */ |
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for (i = 0; i < ARRAY_SIZE(addrs); i++) { |
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if (__slb_present(slbs, nr_slbs, addrs[i])) |
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continue; |
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__spu_kernel_slb(addrs[i], &slbs[nr_slbs]); |
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nr_slbs++; |
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} |
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spin_lock_irq(&spu->register_lock); |
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/* Add the set of SLBs */ |
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for (i = 0; i < nr_slbs; i++) |
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spu_load_slb(spu, i, &slbs[i]); |
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spin_unlock_irq(&spu->register_lock); |
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} |
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EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs); |
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static irqreturn_t |
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spu_irq_class_0(int irq, void *data) |
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{ |
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struct spu *spu; |
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unsigned long stat, mask; |
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spu = data; |
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spin_lock(&spu->register_lock); |
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mask = spu_int_mask_get(spu, 0); |
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stat = spu_int_stat_get(spu, 0) & mask; |
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spu->class_0_pending |= stat; |
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spu->class_0_dar = spu_mfc_dar_get(spu); |
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spu->stop_callback(spu, 0); |
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spu->class_0_pending = 0; |
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spu->class_0_dar = 0; |
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spu_int_stat_clear(spu, 0, stat); |
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spin_unlock(&spu->register_lock); |
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return IRQ_HANDLED; |
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} |
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static irqreturn_t |
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spu_irq_class_1(int irq, void *data) |
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{ |
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struct spu *spu; |
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unsigned long stat, mask, dar, dsisr; |
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spu = data; |
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/* atomically read & clear class1 status. */ |
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spin_lock(&spu->register_lock); |
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mask = spu_int_mask_get(spu, 1); |
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stat = spu_int_stat_get(spu, 1) & mask; |
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dar = spu_mfc_dar_get(spu); |
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dsisr = spu_mfc_dsisr_get(spu); |
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if (stat & CLASS1_STORAGE_FAULT_INTR) |
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spu_mfc_dsisr_set(spu, 0ul); |
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spu_int_stat_clear(spu, 1, stat); |
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pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat, |
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dar, dsisr); |
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if (stat & CLASS1_SEGMENT_FAULT_INTR) |
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__spu_trap_data_seg(spu, dar); |
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if (stat & CLASS1_STORAGE_FAULT_INTR) |
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__spu_trap_data_map(spu, dar, dsisr); |
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if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR) |
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; |
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if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR) |
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; |
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spu->class_1_dsisr = 0; |
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spu->class_1_dar = 0; |
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spin_unlock(&spu->register_lock); |
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return stat ? IRQ_HANDLED : IRQ_NONE; |
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} |
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static irqreturn_t |
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spu_irq_class_2(int irq, void *data) |
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{ |
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struct spu *spu; |
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unsigned long stat; |
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unsigned long mask; |
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const int mailbox_intrs = |
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CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR; |
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spu = data; |
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spin_lock(&spu->register_lock); |
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stat = spu_int_stat_get(spu, 2); |
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mask = spu_int_mask_get(spu, 2); |
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/* ignore interrupts we're not waiting for */ |
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stat &= mask; |
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/* mailbox interrupts are level triggered. mask them now before |
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* acknowledging */ |
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if (stat & mailbox_intrs) |
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spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs)); |
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/* acknowledge all interrupts before the callbacks */ |
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spu_int_stat_clear(spu, 2, stat); |
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pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask); |
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if (stat & CLASS2_MAILBOX_INTR) |
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spu->ibox_callback(spu); |
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if (stat & CLASS2_SPU_STOP_INTR) |
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spu->stop_callback(spu, 2); |
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if (stat & CLASS2_SPU_HALT_INTR) |
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spu->stop_callback(spu, 2); |
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if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR) |
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spu->mfc_callback(spu); |
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if (stat & CLASS2_MAILBOX_THRESHOLD_INTR) |
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spu->wbox_callback(spu); |
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spu->stats.class2_intr++; |
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spin_unlock(&spu->register_lock); |
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return stat ? IRQ_HANDLED : IRQ_NONE; |
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} |
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static int spu_request_irqs(struct spu *spu) |
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{ |
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int ret = 0; |
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if (spu->irqs[0]) { |
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snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", |
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spu->number); |
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ret = request_irq(spu->irqs[0], spu_irq_class_0, |
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0, spu->irq_c0, spu); |
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if (ret) |
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goto bail0; |
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} |
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if (spu->irqs[1]) { |
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snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", |
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spu->number); |
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ret = request_irq(spu->irqs[1], spu_irq_class_1, |
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0, spu->irq_c1, spu); |
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if (ret) |
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goto bail1; |
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} |
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if (spu->irqs[2]) { |
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snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", |
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spu->number); |
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ret = request_irq(spu->irqs[2], spu_irq_class_2, |
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0, spu->irq_c2, spu); |
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if (ret) |
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goto bail2; |
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} |
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return 0; |
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bail2: |
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if (spu->irqs[1]) |
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free_irq(spu->irqs[1], spu); |
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bail1: |
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if (spu->irqs[0]) |
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free_irq(spu->irqs[0], spu); |
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bail0: |
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return ret; |
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} |
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static void spu_free_irqs(struct spu *spu) |
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{ |
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if (spu->irqs[0]) |
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free_irq(spu->irqs[0], spu); |
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if (spu->irqs[1]) |
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free_irq(spu->irqs[1], spu); |
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if (spu->irqs[2]) |
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free_irq(spu->irqs[2], spu); |
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} |
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void spu_init_channels(struct spu *spu) |
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{ |
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static const struct { |
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unsigned channel; |
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unsigned count; |
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} zero_list[] = { |
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{ 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, }, |
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{ 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, }, |
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}, count_list[] = { |
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{ 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, }, |
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{ 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, }, |
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{ 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, }, |
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}; |
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struct spu_priv2 __iomem *priv2; |
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int i; |
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priv2 = spu->priv2; |
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/* initialize all channel data to zero */ |
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for (i = 0; i < ARRAY_SIZE(zero_list); i++) { |
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int count; |
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out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel); |
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for (count = 0; count < zero_list[i].count; count++) |
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out_be64(&priv2->spu_chnldata_RW, 0); |
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} |
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/* initialize channel counts to meaningful values */ |
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for (i = 0; i < ARRAY_SIZE(count_list); i++) { |
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out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel); |
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out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count); |
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} |
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} |
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EXPORT_SYMBOL_GPL(spu_init_channels); |
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static struct bus_type spu_subsys = { |
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.name = "spu", |
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.dev_name = "spu", |
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}; |
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int spu_add_dev_attr(struct device_attribute *attr) |
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{ |
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struct spu *spu; |
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mutex_lock(&spu_full_list_mutex); |
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list_for_each_entry(spu, &spu_full_list, full_list) |
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device_create_file(&spu->dev, attr); |
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mutex_unlock(&spu_full_list_mutex); |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(spu_add_dev_attr); |
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int spu_add_dev_attr_group(struct attribute_group *attrs) |
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{ |
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struct spu *spu; |
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int rc = 0; |
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mutex_lock(&spu_full_list_mutex); |
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list_for_each_entry(spu, &spu_full_list, full_list) { |
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rc = sysfs_create_group(&spu->dev.kobj, attrs); |
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/* we're in trouble here, but try unwinding anyway */ |
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if (rc) { |
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printk(KERN_ERR "%s: can't create sysfs group '%s'\n", |
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__func__, attrs->name); |
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list_for_each_entry_continue_reverse(spu, |
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&spu_full_list, full_list) |
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sysfs_remove_group(&spu->dev.kobj, attrs); |
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break; |
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} |
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} |
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mutex_unlock(&spu_full_list_mutex); |
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return rc; |
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} |
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EXPORT_SYMBOL_GPL(spu_add_dev_attr_group); |
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void spu_remove_dev_attr(struct device_attribute *attr) |
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{ |
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struct spu *spu; |
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mutex_lock(&spu_full_list_mutex); |
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list_for_each_entry(spu, &spu_full_list, full_list) |
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device_remove_file(&spu->dev, attr); |
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mutex_unlock(&spu_full_list_mutex); |
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} |
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EXPORT_SYMBOL_GPL(spu_remove_dev_attr); |
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|
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void spu_remove_dev_attr_group(struct attribute_group *attrs) |
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{ |
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struct spu *spu; |
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|
|
mutex_lock(&spu_full_list_mutex); |
|
list_for_each_entry(spu, &spu_full_list, full_list) |
|
sysfs_remove_group(&spu->dev.kobj, attrs); |
|
mutex_unlock(&spu_full_list_mutex); |
|
} |
|
EXPORT_SYMBOL_GPL(spu_remove_dev_attr_group); |
|
|
|
static int spu_create_dev(struct spu *spu) |
|
{ |
|
int ret; |
|
|
|
spu->dev.id = spu->number; |
|
spu->dev.bus = &spu_subsys; |
|
ret = device_register(&spu->dev); |
|
if (ret) { |
|
printk(KERN_ERR "Can't register SPU %d with sysfs\n", |
|
spu->number); |
|
return ret; |
|
} |
|
|
|
sysfs_add_device_to_node(&spu->dev, spu->node); |
|
|
|
return 0; |
|
} |
|
|
|
static int __init create_spu(void *data) |
|
{ |
|
struct spu *spu; |
|
int ret; |
|
static int number; |
|
unsigned long flags; |
|
|
|
ret = -ENOMEM; |
|
spu = kzalloc(sizeof (*spu), GFP_KERNEL); |
|
if (!spu) |
|
goto out; |
|
|
|
spu->alloc_state = SPU_FREE; |
|
|
|
spin_lock_init(&spu->register_lock); |
|
spin_lock(&spu_lock); |
|
spu->number = number++; |
|
spin_unlock(&spu_lock); |
|
|
|
ret = spu_create_spu(spu, data); |
|
|
|
if (ret) |
|
goto out_free; |
|
|
|
spu_mfc_sdr_setup(spu); |
|
spu_mfc_sr1_set(spu, 0x33); |
|
ret = spu_request_irqs(spu); |
|
if (ret) |
|
goto out_destroy; |
|
|
|
ret = spu_create_dev(spu); |
|
if (ret) |
|
goto out_free_irqs; |
|
|
|
mutex_lock(&cbe_spu_info[spu->node].list_mutex); |
|
list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus); |
|
cbe_spu_info[spu->node].n_spus++; |
|
mutex_unlock(&cbe_spu_info[spu->node].list_mutex); |
|
|
|
mutex_lock(&spu_full_list_mutex); |
|
spin_lock_irqsave(&spu_full_list_lock, flags); |
|
list_add(&spu->full_list, &spu_full_list); |
|
spin_unlock_irqrestore(&spu_full_list_lock, flags); |
|
mutex_unlock(&spu_full_list_mutex); |
|
|
|
spu->stats.util_state = SPU_UTIL_IDLE_LOADED; |
|
spu->stats.tstamp = ktime_get_ns(); |
|
|
|
INIT_LIST_HEAD(&spu->aff_list); |
|
|
|
goto out; |
|
|
|
out_free_irqs: |
|
spu_free_irqs(spu); |
|
out_destroy: |
|
spu_destroy_spu(spu); |
|
out_free: |
|
kfree(spu); |
|
out: |
|
return ret; |
|
} |
|
|
|
static const char *spu_state_names[] = { |
|
"user", "system", "iowait", "idle" |
|
}; |
|
|
|
static unsigned long long spu_acct_time(struct spu *spu, |
|
enum spu_utilization_state state) |
|
{ |
|
unsigned long long time = spu->stats.times[state]; |
|
|
|
/* |
|
* If the spu is idle or the context is stopped, utilization |
|
* statistics are not updated. Apply the time delta from the |
|
* last recorded state of the spu. |
|
*/ |
|
if (spu->stats.util_state == state) |
|
time += ktime_get_ns() - spu->stats.tstamp; |
|
|
|
return time / NSEC_PER_MSEC; |
|
} |
|
|
|
|
|
static ssize_t spu_stat_show(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
struct spu *spu = container_of(dev, struct spu, dev); |
|
|
|
return sprintf(buf, "%s %llu %llu %llu %llu " |
|
"%llu %llu %llu %llu %llu %llu %llu %llu\n", |
|
spu_state_names[spu->stats.util_state], |
|
spu_acct_time(spu, SPU_UTIL_USER), |
|
spu_acct_time(spu, SPU_UTIL_SYSTEM), |
|
spu_acct_time(spu, SPU_UTIL_IOWAIT), |
|
spu_acct_time(spu, SPU_UTIL_IDLE_LOADED), |
|
spu->stats.vol_ctx_switch, |
|
spu->stats.invol_ctx_switch, |
|
spu->stats.slb_flt, |
|
spu->stats.hash_flt, |
|
spu->stats.min_flt, |
|
spu->stats.maj_flt, |
|
spu->stats.class2_intr, |
|
spu->stats.libassist); |
|
} |
|
|
|
static DEVICE_ATTR(stat, 0444, spu_stat_show, NULL); |
|
|
|
#ifdef CONFIG_KEXEC_CORE |
|
|
|
struct crash_spu_info { |
|
struct spu *spu; |
|
u32 saved_spu_runcntl_RW; |
|
u32 saved_spu_status_R; |
|
u32 saved_spu_npc_RW; |
|
u64 saved_mfc_sr1_RW; |
|
u64 saved_mfc_dar; |
|
u64 saved_mfc_dsisr; |
|
}; |
|
|
|
#define CRASH_NUM_SPUS 16 /* Enough for current hardware */ |
|
static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS]; |
|
|
|
static void crash_kexec_stop_spus(void) |
|
{ |
|
struct spu *spu; |
|
int i; |
|
u64 tmp; |
|
|
|
for (i = 0; i < CRASH_NUM_SPUS; i++) { |
|
if (!crash_spu_info[i].spu) |
|
continue; |
|
|
|
spu = crash_spu_info[i].spu; |
|
|
|
crash_spu_info[i].saved_spu_runcntl_RW = |
|
in_be32(&spu->problem->spu_runcntl_RW); |
|
crash_spu_info[i].saved_spu_status_R = |
|
in_be32(&spu->problem->spu_status_R); |
|
crash_spu_info[i].saved_spu_npc_RW = |
|
in_be32(&spu->problem->spu_npc_RW); |
|
|
|
crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu); |
|
crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu); |
|
tmp = spu_mfc_sr1_get(spu); |
|
crash_spu_info[i].saved_mfc_sr1_RW = tmp; |
|
|
|
tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; |
|
spu_mfc_sr1_set(spu, tmp); |
|
|
|
__delay(200); |
|
} |
|
} |
|
|
|
static void crash_register_spus(struct list_head *list) |
|
{ |
|
struct spu *spu; |
|
int ret; |
|
|
|
list_for_each_entry(spu, list, full_list) { |
|
if (WARN_ON(spu->number >= CRASH_NUM_SPUS)) |
|
continue; |
|
|
|
crash_spu_info[spu->number].spu = spu; |
|
} |
|
|
|
ret = crash_shutdown_register(&crash_kexec_stop_spus); |
|
if (ret) |
|
printk(KERN_ERR "Could not register SPU crash handler"); |
|
} |
|
|
|
#else |
|
static inline void crash_register_spus(struct list_head *list) |
|
{ |
|
} |
|
#endif |
|
|
|
static void spu_shutdown(void) |
|
{ |
|
struct spu *spu; |
|
|
|
mutex_lock(&spu_full_list_mutex); |
|
list_for_each_entry(spu, &spu_full_list, full_list) { |
|
spu_free_irqs(spu); |
|
spu_destroy_spu(spu); |
|
} |
|
mutex_unlock(&spu_full_list_mutex); |
|
} |
|
|
|
static struct syscore_ops spu_syscore_ops = { |
|
.shutdown = spu_shutdown, |
|
}; |
|
|
|
static int __init init_spu_base(void) |
|
{ |
|
int i, ret = 0; |
|
|
|
for (i = 0; i < MAX_NUMNODES; i++) { |
|
mutex_init(&cbe_spu_info[i].list_mutex); |
|
INIT_LIST_HEAD(&cbe_spu_info[i].spus); |
|
} |
|
|
|
if (!spu_management_ops) |
|
goto out; |
|
|
|
/* create system subsystem for spus */ |
|
ret = subsys_system_register(&spu_subsys, NULL); |
|
if (ret) |
|
goto out; |
|
|
|
ret = spu_enumerate_spus(create_spu); |
|
|
|
if (ret < 0) { |
|
printk(KERN_WARNING "%s: Error initializing spus\n", |
|
__func__); |
|
goto out_unregister_subsys; |
|
} |
|
|
|
if (ret > 0) |
|
fb_append_extra_logo(&logo_spe_clut224, ret); |
|
|
|
mutex_lock(&spu_full_list_mutex); |
|
xmon_register_spus(&spu_full_list); |
|
crash_register_spus(&spu_full_list); |
|
mutex_unlock(&spu_full_list_mutex); |
|
spu_add_dev_attr(&dev_attr_stat); |
|
register_syscore_ops(&spu_syscore_ops); |
|
|
|
spu_init_affinity(); |
|
|
|
return 0; |
|
|
|
out_unregister_subsys: |
|
bus_unregister(&spu_subsys); |
|
out: |
|
return ret; |
|
} |
|
device_initcall(init_spu_base);
|
|
|