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259 lines
7.3 KiB
259 lines
7.3 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (C) 2014-2017 Linaro Ltd. <[email protected]> |
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*/ |
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#include <linux/elf.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/sort.h> |
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#include <linux/moduleloader.h> |
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#include <asm/cache.h> |
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#include <asm/opcodes.h> |
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#define PLT_ENT_STRIDE L1_CACHE_BYTES |
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#define PLT_ENT_COUNT (PLT_ENT_STRIDE / sizeof(u32)) |
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#define PLT_ENT_SIZE (sizeof(struct plt_entries) / PLT_ENT_COUNT) |
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#ifdef CONFIG_THUMB2_KERNEL |
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#define PLT_ENT_LDR __opcode_to_mem_thumb32(0xf8dff000 | \ |
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(PLT_ENT_STRIDE - 4)) |
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#else |
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#define PLT_ENT_LDR __opcode_to_mem_arm(0xe59ff000 | \ |
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(PLT_ENT_STRIDE - 8)) |
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#endif |
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struct plt_entries { |
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u32 ldr[PLT_ENT_COUNT]; |
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u32 lit[PLT_ENT_COUNT]; |
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}; |
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static bool in_init(const struct module *mod, unsigned long loc) |
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{ |
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return loc - (u32)mod->init_layout.base < mod->init_layout.size; |
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} |
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u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val) |
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{ |
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struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core : |
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&mod->arch.init; |
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struct plt_entries *plt = (struct plt_entries *)pltsec->plt->sh_addr; |
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int idx = 0; |
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/* |
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* Look for an existing entry pointing to 'val'. Given that the |
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* relocations are sorted, this will be the last entry we allocated. |
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* (if one exists). |
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*/ |
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if (pltsec->plt_count > 0) { |
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plt += (pltsec->plt_count - 1) / PLT_ENT_COUNT; |
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idx = (pltsec->plt_count - 1) % PLT_ENT_COUNT; |
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if (plt->lit[idx] == val) |
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return (u32)&plt->ldr[idx]; |
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idx = (idx + 1) % PLT_ENT_COUNT; |
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if (!idx) |
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plt++; |
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} |
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pltsec->plt_count++; |
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BUG_ON(pltsec->plt_count * PLT_ENT_SIZE > pltsec->plt->sh_size); |
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if (!idx) |
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/* Populate a new set of entries */ |
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*plt = (struct plt_entries){ |
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{ [0 ... PLT_ENT_COUNT - 1] = PLT_ENT_LDR, }, |
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{ val, } |
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}; |
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else |
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plt->lit[idx] = val; |
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return (u32)&plt->ldr[idx]; |
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} |
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#define cmp_3way(a,b) ((a) < (b) ? -1 : (a) > (b)) |
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static int cmp_rel(const void *a, const void *b) |
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{ |
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const Elf32_Rel *x = a, *y = b; |
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int i; |
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/* sort by type and symbol index */ |
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i = cmp_3way(ELF32_R_TYPE(x->r_info), ELF32_R_TYPE(y->r_info)); |
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if (i == 0) |
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i = cmp_3way(ELF32_R_SYM(x->r_info), ELF32_R_SYM(y->r_info)); |
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return i; |
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} |
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static bool is_zero_addend_relocation(Elf32_Addr base, const Elf32_Rel *rel) |
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{ |
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u32 *tval = (u32 *)(base + rel->r_offset); |
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/* |
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* Do a bitwise compare on the raw addend rather than fully decoding |
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* the offset and doing an arithmetic comparison. |
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* Note that a zero-addend jump/call relocation is encoded taking the |
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* PC bias into account, i.e., -8 for ARM and -4 for Thumb2. |
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*/ |
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switch (ELF32_R_TYPE(rel->r_info)) { |
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u16 upper, lower; |
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case R_ARM_THM_CALL: |
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case R_ARM_THM_JUMP24: |
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upper = __mem_to_opcode_thumb16(((u16 *)tval)[0]); |
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lower = __mem_to_opcode_thumb16(((u16 *)tval)[1]); |
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return (upper & 0x7ff) == 0x7ff && (lower & 0x2fff) == 0x2ffe; |
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case R_ARM_CALL: |
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case R_ARM_PC24: |
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case R_ARM_JUMP24: |
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return (__mem_to_opcode_arm(*tval) & 0xffffff) == 0xfffffe; |
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} |
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BUG(); |
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} |
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static bool duplicate_rel(Elf32_Addr base, const Elf32_Rel *rel, int num) |
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{ |
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const Elf32_Rel *prev; |
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/* |
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* Entries are sorted by type and symbol index. That means that, |
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* if a duplicate entry exists, it must be in the preceding |
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* slot. |
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*/ |
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if (!num) |
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return false; |
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prev = rel + num - 1; |
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return cmp_rel(rel + num, prev) == 0 && |
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is_zero_addend_relocation(base, prev); |
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} |
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/* Count how many PLT entries we may need */ |
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static unsigned int count_plts(const Elf32_Sym *syms, Elf32_Addr base, |
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const Elf32_Rel *rel, int num, Elf32_Word dstidx) |
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{ |
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unsigned int ret = 0; |
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const Elf32_Sym *s; |
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int i; |
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for (i = 0; i < num; i++) { |
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switch (ELF32_R_TYPE(rel[i].r_info)) { |
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case R_ARM_CALL: |
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case R_ARM_PC24: |
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case R_ARM_JUMP24: |
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case R_ARM_THM_CALL: |
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case R_ARM_THM_JUMP24: |
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/* |
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* We only have to consider branch targets that resolve |
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* to symbols that are defined in a different section. |
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* This is not simply a heuristic, it is a fundamental |
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* limitation, since there is no guaranteed way to emit |
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* PLT entries sufficiently close to the branch if the |
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* section size exceeds the range of a branch |
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* instruction. So ignore relocations against defined |
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* symbols if they live in the same section as the |
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* relocation target. |
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*/ |
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s = syms + ELF32_R_SYM(rel[i].r_info); |
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if (s->st_shndx == dstidx) |
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break; |
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/* |
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* Jump relocations with non-zero addends against |
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* undefined symbols are supported by the ELF spec, but |
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* do not occur in practice (e.g., 'jump n bytes past |
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* the entry point of undefined function symbol f'). |
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* So we need to support them, but there is no need to |
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* take them into consideration when trying to optimize |
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* this code. So let's only check for duplicates when |
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* the addend is zero. (Note that calls into the core |
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* module via init PLT entries could involve section |
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* relative symbol references with non-zero addends, for |
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* which we may end up emitting duplicates, but the init |
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* PLT is released along with the rest of the .init |
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* region as soon as module loading completes.) |
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*/ |
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if (!is_zero_addend_relocation(base, rel + i) || |
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!duplicate_rel(base, rel, i)) |
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ret++; |
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} |
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} |
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return ret; |
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} |
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int module_frob_arch_sections(Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, |
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char *secstrings, struct module *mod) |
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{ |
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unsigned long core_plts = 0; |
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unsigned long init_plts = 0; |
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Elf32_Shdr *s, *sechdrs_end = sechdrs + ehdr->e_shnum; |
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Elf32_Sym *syms = NULL; |
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/* |
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* To store the PLTs, we expand the .text section for core module code |
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* and for initialization code. |
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*/ |
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for (s = sechdrs; s < sechdrs_end; ++s) { |
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if (strcmp(".plt", secstrings + s->sh_name) == 0) |
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mod->arch.core.plt = s; |
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else if (strcmp(".init.plt", secstrings + s->sh_name) == 0) |
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mod->arch.init.plt = s; |
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else if (s->sh_type == SHT_SYMTAB) |
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syms = (Elf32_Sym *)s->sh_addr; |
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} |
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if (!mod->arch.core.plt || !mod->arch.init.plt) { |
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pr_err("%s: module PLT section(s) missing\n", mod->name); |
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return -ENOEXEC; |
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} |
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if (!syms) { |
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pr_err("%s: module symtab section missing\n", mod->name); |
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return -ENOEXEC; |
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} |
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for (s = sechdrs + 1; s < sechdrs_end; ++s) { |
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Elf32_Rel *rels = (void *)ehdr + s->sh_offset; |
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int numrels = s->sh_size / sizeof(Elf32_Rel); |
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Elf32_Shdr *dstsec = sechdrs + s->sh_info; |
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if (s->sh_type != SHT_REL) |
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continue; |
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/* ignore relocations that operate on non-exec sections */ |
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if (!(dstsec->sh_flags & SHF_EXECINSTR)) |
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continue; |
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/* sort by type and symbol index */ |
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sort(rels, numrels, sizeof(Elf32_Rel), cmp_rel, NULL); |
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if (strncmp(secstrings + dstsec->sh_name, ".init", 5) != 0) |
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core_plts += count_plts(syms, dstsec->sh_addr, rels, |
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numrels, s->sh_info); |
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else |
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init_plts += count_plts(syms, dstsec->sh_addr, rels, |
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numrels, s->sh_info); |
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} |
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mod->arch.core.plt->sh_type = SHT_NOBITS; |
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mod->arch.core.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; |
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mod->arch.core.plt->sh_addralign = L1_CACHE_BYTES; |
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mod->arch.core.plt->sh_size = round_up(core_plts * PLT_ENT_SIZE, |
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sizeof(struct plt_entries)); |
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mod->arch.core.plt_count = 0; |
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mod->arch.init.plt->sh_type = SHT_NOBITS; |
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mod->arch.init.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; |
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mod->arch.init.plt->sh_addralign = L1_CACHE_BYTES; |
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mod->arch.init.plt->sh_size = round_up(init_plts * PLT_ENT_SIZE, |
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sizeof(struct plt_entries)); |
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mod->arch.init.plt_count = 0; |
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pr_debug("%s: plt=%x, init.plt=%x\n", __func__, |
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mod->arch.core.plt->sh_size, mod->arch.init.plt->sh_size); |
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return 0; |
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}
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