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236 lines
5.4 KiB
236 lines
5.4 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* linux/arch/arm/kernel/head-common.S |
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* |
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* Copyright (C) 1994-2002 Russell King |
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* Copyright (c) 2003 ARM Limited |
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* All Rights Reserved |
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*/ |
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#include <asm/assembler.h> |
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#define ATAG_CORE 0x54410001 |
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#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) |
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#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2) |
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#ifdef CONFIG_CPU_BIG_ENDIAN |
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#define OF_DT_MAGIC 0xd00dfeed |
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#else |
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#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */ |
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#endif |
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/* |
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* Exception handling. Something went wrong and we can't proceed. We |
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* ought to tell the user, but since we don't have any guarantee that |
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* we're even running on the right architecture, we do virtually nothing. |
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* |
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* If CONFIG_DEBUG_LL is set we try to print out something about the error |
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* and hope for the best (useful if bootloader fails to pass a proper |
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* machine ID for example). |
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*/ |
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__HEAD |
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/* Determine validity of the r2 atags pointer. The heuristic requires |
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* that the pointer be aligned, in the first 16k of physical RAM and |
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* that the ATAG_CORE marker is first and present. If CONFIG_OF_FLATTREE |
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* is selected, then it will also accept a dtb pointer. Future revisions |
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* of this function may be more lenient with the physical address and |
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* may also be able to move the ATAGS block if necessary. |
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* |
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* Returns: |
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* r2 either valid atags pointer, valid dtb pointer, or zero |
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* r5, r6 corrupted |
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*/ |
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__vet_atags: |
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tst r2, #0x3 @ aligned? |
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bne 1f |
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ldr r5, [r2, #0] |
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#ifdef CONFIG_OF_FLATTREE |
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ldr r6, =OF_DT_MAGIC @ is it a DTB? |
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cmp r5, r6 |
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beq 2f |
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#endif |
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cmp r5, #ATAG_CORE_SIZE @ is first tag ATAG_CORE? |
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cmpne r5, #ATAG_CORE_SIZE_EMPTY |
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bne 1f |
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ldr r5, [r2, #4] |
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ldr r6, =ATAG_CORE |
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cmp r5, r6 |
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bne 1f |
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2: ret lr @ atag/dtb pointer is ok |
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1: mov r2, #0 |
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ret lr |
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ENDPROC(__vet_atags) |
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/* |
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* The following fragment of code is executed with the MMU on in MMU mode, |
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* and uses absolute addresses; this is not position independent. |
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* |
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* r0 = cp#15 control register (exc_ret for M-class) |
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* r1 = machine ID |
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* r2 = atags/dtb pointer |
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* r9 = processor ID |
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*/ |
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__INIT |
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__mmap_switched: |
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mov r7, r1 |
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mov r8, r2 |
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mov r10, r0 |
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adr r4, __mmap_switched_data |
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mov fp, #0 |
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#if defined(CONFIG_XIP_DEFLATED_DATA) |
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ARM( ldr sp, [r4], #4 ) |
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THUMB( ldr sp, [r4] ) |
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THUMB( add r4, #4 ) |
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bl __inflate_kernel_data @ decompress .data to RAM |
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teq r0, #0 |
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bne __error |
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#elif defined(CONFIG_XIP_KERNEL) |
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ARM( ldmia r4!, {r0, r1, r2, sp} ) |
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THUMB( ldmia r4!, {r0, r1, r2, r3} ) |
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THUMB( mov sp, r3 ) |
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sub r2, r2, r1 |
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bl __memcpy @ copy .data to RAM |
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#endif |
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ARM( ldmia r4!, {r0, r1, sp} ) |
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THUMB( ldmia r4!, {r0, r1, r3} ) |
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THUMB( mov sp, r3 ) |
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sub r2, r1, r0 |
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mov r1, #0 |
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bl __memset @ clear .bss |
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ldmia r4, {r0, r1, r2, r3} |
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str r9, [r0] @ Save processor ID |
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str r7, [r1] @ Save machine type |
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str r8, [r2] @ Save atags pointer |
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cmp r3, #0 |
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strne r10, [r3] @ Save control register values |
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#ifdef CONFIG_KASAN |
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bl kasan_early_init |
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#endif |
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mov lr, #0 |
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b start_kernel |
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ENDPROC(__mmap_switched) |
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.align 2 |
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.type __mmap_switched_data, %object |
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__mmap_switched_data: |
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#ifdef CONFIG_XIP_KERNEL |
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#ifndef CONFIG_XIP_DEFLATED_DATA |
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.long _sdata @ r0 |
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.long __data_loc @ r1 |
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.long _edata_loc @ r2 |
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#endif |
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.long __bss_stop @ sp (temporary stack in .bss) |
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#endif |
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.long __bss_start @ r0 |
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.long __bss_stop @ r1 |
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.long init_thread_union + THREAD_START_SP @ sp |
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.long processor_id @ r0 |
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.long __machine_arch_type @ r1 |
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.long __atags_pointer @ r2 |
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#ifdef CONFIG_CPU_CP15 |
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.long cr_alignment @ r3 |
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#else |
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M_CLASS(.long exc_ret) @ r3 |
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AR_CLASS(.long 0) @ r3 |
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#endif |
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.size __mmap_switched_data, . - __mmap_switched_data |
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__FINIT |
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.text |
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/* |
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* This provides a C-API version of __lookup_processor_type |
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*/ |
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ENTRY(lookup_processor_type) |
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stmfd sp!, {r4 - r6, r9, lr} |
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mov r9, r0 |
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bl __lookup_processor_type |
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mov r0, r5 |
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ldmfd sp!, {r4 - r6, r9, pc} |
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ENDPROC(lookup_processor_type) |
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/* |
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* Read processor ID register (CP#15, CR0), and look up in the linker-built |
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* supported processor list. Note that we can't use the absolute addresses |
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* for the __proc_info lists since we aren't running with the MMU on |
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* (and therefore, we are not in the correct address space). We have to |
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* calculate the offset. |
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* |
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* r9 = cpuid |
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* Returns: |
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* r3, r4, r6 corrupted |
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* r5 = proc_info pointer in physical address space |
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* r9 = cpuid (preserved) |
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*/ |
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__lookup_processor_type: |
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/* |
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* Look in <asm/procinfo.h> for information about the __proc_info |
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* structure. |
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*/ |
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adr_l r5, __proc_info_begin |
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adr_l r6, __proc_info_end |
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1: ldmia r5, {r3, r4} @ value, mask |
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and r4, r4, r9 @ mask wanted bits |
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teq r3, r4 |
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beq 2f |
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add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list) |
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cmp r5, r6 |
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blo 1b |
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mov r5, #0 @ unknown processor |
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2: ret lr |
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ENDPROC(__lookup_processor_type) |
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__error_lpae: |
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#ifdef CONFIG_DEBUG_LL |
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adr r0, str_lpae |
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bl printascii |
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b __error |
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str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n" |
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#else |
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b __error |
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#endif |
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.align |
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ENDPROC(__error_lpae) |
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__error_p: |
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#ifdef CONFIG_DEBUG_LL |
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adr r0, str_p1 |
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bl printascii |
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mov r0, r9 |
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bl printhex8 |
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adr r0, str_p2 |
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bl printascii |
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b __error |
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str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x" |
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str_p2: .asciz ").\n" |
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.align |
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#endif |
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ENDPROC(__error_p) |
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__error: |
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#ifdef CONFIG_ARCH_RPC |
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/* |
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* Turn the screen red on a error - RiscPC only. |
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*/ |
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mov r0, #0x02000000 |
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mov r3, #0x11 |
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orr r3, r3, r3, lsl #8 |
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orr r3, r3, r3, lsl #16 |
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str r3, [r0], #4 |
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str r3, [r0], #4 |
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str r3, [r0], #4 |
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str r3, [r0], #4 |
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#endif |
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1: mov r0, r0 |
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b 1b |
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ENDPROC(__error)
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