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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
93 lines
2.7 KiB
YAML
93 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,mutex.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek mutex
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maintainers:
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- Chun-Kuang Hu <chunkuang.hu@kernel.org>
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- Philipp Zabel <p.zabel@pengutronix.de>
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description: |
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Mediatek mutex, namely MUTEX, is used to send the triggers signals called
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Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
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data path or MDP data path.
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In some SoC, such as mt2701, MUTEX could be a hardware mutex which protects
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the shadow register.
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MUTEX device node must be siblings to the central MMSYS_CONFIG node.
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For a description of the MMSYS_CONFIG binding, see
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Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
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for details.
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properties:
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compatible:
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oneOf:
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- items:
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- const: mediatek,mt2701-disp-mutex
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- items:
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- const: mediatek,mt2712-disp-mutex
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- items:
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- const: mediatek,mt8167-disp-mutex
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- items:
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- const: mediatek,mt8173-disp-mutex
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- items:
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- const: mediatek,mt8183-disp-mutex
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- items:
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- const: mediatek,mt8192-disp-mutex
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- items:
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- const: mediatek,mt8195-disp-mutex
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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power-domains:
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description: A phandle and PM domain specifier as defined by bindings of
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the power controller specified by phandle. See
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Documentation/devicetree/bindings/power/power-domain.yaml for details.
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clocks:
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items:
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- description: MUTEX Clock
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mediatek,gce-events:
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description:
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The event id which is mapping to the specific hardware event signal
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to gce. The event id is defined in the gce header
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include/dt-bindings/gce/<chip>-gce.h of each chips.
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$ref: /schemas/types.yaml#/definitions/uint32-array
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required:
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- compatible
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- reg
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- interrupts
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- power-domains
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/power/mt8173-power.h>
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#include <dt-bindings/gce/mt8173-gce.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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mutex: mutex@14020000 {
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compatible = "mediatek,mt8173-disp-mutex";
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reg = <0 0x14020000 0 0x1000>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
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clocks = <&mmsys CLK_MM_MUTEX_32K>;
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mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
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<CMDQ_EVENT_MUTEX1_STREAM_EOF>;
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};
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};
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