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1077 lines
26 KiB
1077 lines
26 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Copyright (c) 2015 Google, Inc |
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* Copyright (c) 2011 The Chromium OS Authors. |
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* Copyright (C) 2009 NVIDIA, Corporation |
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* Copyright (C) 2007-2008 SMSC (Steve Glendinning) |
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*/ |
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|
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#include <common.h> |
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#include <dm.h> |
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#include <errno.h> |
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#include <malloc.h> |
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#include <memalign.h> |
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#include <usb.h> |
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#include <asm/unaligned.h> |
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#include <linux/mii.h> |
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#include "usb_ether.h" |
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|
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/* SMSC LAN95xx based USB 2.0 Ethernet Devices */ |
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|
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/* LED defines */ |
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#define LED_GPIO_CFG (0x24) |
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#define LED_GPIO_CFG_SPD_LED (0x01000000) |
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#define LED_GPIO_CFG_LNK_LED (0x00100000) |
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#define LED_GPIO_CFG_FDX_LED (0x00010000) |
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/* Tx command words */ |
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#define TX_CMD_A_FIRST_SEG_ 0x00002000 |
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#define TX_CMD_A_LAST_SEG_ 0x00001000 |
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|
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/* Rx status word */ |
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#define RX_STS_FL_ 0x3FFF0000 /* Frame Length */ |
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#define RX_STS_ES_ 0x00008000 /* Error Summary */ |
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|
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/* SCSRs */ |
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#define ID_REV 0x00 |
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|
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#define INT_STS 0x08 |
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|
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#define TX_CFG 0x10 |
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#define TX_CFG_ON_ 0x00000004 |
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|
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#define HW_CFG 0x14 |
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#define HW_CFG_BIR_ 0x00001000 |
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#define HW_CFG_RXDOFF_ 0x00000600 |
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#define HW_CFG_MEF_ 0x00000020 |
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#define HW_CFG_BCE_ 0x00000002 |
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#define HW_CFG_LRST_ 0x00000008 |
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|
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#define PM_CTRL 0x20 |
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#define PM_CTL_PHY_RST_ 0x00000010 |
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|
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#define AFC_CFG 0x2C |
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|
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/* |
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* Hi watermark = 15.5Kb (~10 mtu pkts) |
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* low watermark = 3k (~2 mtu pkts) |
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* backpressure duration = ~ 350us |
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* Apply FC on any frame. |
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*/ |
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#define AFC_CFG_DEFAULT 0x00F830A1 |
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|
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#define E2P_CMD 0x30 |
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#define E2P_CMD_BUSY_ 0x80000000 |
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#define E2P_CMD_READ_ 0x00000000 |
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#define E2P_CMD_TIMEOUT_ 0x00000400 |
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#define E2P_CMD_LOADED_ 0x00000200 |
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#define E2P_CMD_ADDR_ 0x000001FF |
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#define E2P_DATA 0x34 |
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#define BURST_CAP 0x38 |
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#define INT_EP_CTL 0x68 |
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#define INT_EP_CTL_PHY_INT_ 0x00008000 |
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|
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#define BULK_IN_DLY 0x6C |
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|
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/* MAC CSRs */ |
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#define MAC_CR 0x100 |
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#define MAC_CR_MCPAS_ 0x00080000 |
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#define MAC_CR_PRMS_ 0x00040000 |
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#define MAC_CR_HPFILT_ 0x00002000 |
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#define MAC_CR_TXEN_ 0x00000008 |
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#define MAC_CR_RXEN_ 0x00000004 |
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#define ADDRH 0x104 |
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#define ADDRL 0x108 |
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#define MII_ADDR 0x114 |
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#define MII_WRITE_ 0x02 |
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#define MII_BUSY_ 0x01 |
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#define MII_READ_ 0x00 /* ~of MII Write bit */ |
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#define MII_DATA 0x118 |
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#define FLOW 0x11C |
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#define VLAN1 0x120 |
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#define COE_CR 0x130 |
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#define Tx_COE_EN_ 0x00010000 |
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#define Rx_COE_EN_ 0x00000001 |
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|
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/* Vendor-specific PHY Definitions */ |
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#define PHY_INT_SRC 29 |
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#define PHY_INT_MASK 30 |
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#define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040) |
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#define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010) |
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#define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \ |
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PHY_INT_MASK_LINK_DOWN_) |
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|
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/* USB Vendor Requests */ |
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#define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0 |
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#define USB_VENDOR_REQUEST_READ_REGISTER 0xA1 |
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|
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/* Some extra defines */ |
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#define HS_USB_PKT_SIZE 512 |
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#define FS_USB_PKT_SIZE 64 |
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/* 5/33 is lower limit for BURST_CAP to work */ |
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#define DEFAULT_HS_BURST_CAP_SIZE (5 * HS_USB_PKT_SIZE) |
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#define DEFAULT_FS_BURST_CAP_SIZE (33 * FS_USB_PKT_SIZE) |
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#define DEFAULT_BULK_IN_DELAY 0x00002000 |
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#define MAX_SINGLE_PACKET_SIZE 2048 |
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#define EEPROM_MAC_OFFSET 0x01 |
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#define SMSC95XX_INTERNAL_PHY_ID 1 |
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#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ |
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|
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/* local defines */ |
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#define SMSC95XX_BASE_NAME "sms" |
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#define USB_CTRL_SET_TIMEOUT 5000 |
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#define USB_CTRL_GET_TIMEOUT 5000 |
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#define USB_BULK_SEND_TIMEOUT 5000 |
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#define USB_BULK_RECV_TIMEOUT 5000 |
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#define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE |
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#define PHY_CONNECT_TIMEOUT 5000 |
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#define TURBO_MODE |
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#ifndef CONFIG_DM_ETH |
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/* local vars */ |
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static int curr_eth_dev; /* index for name of next device detected */ |
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#endif |
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/* driver private */ |
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struct smsc95xx_private { |
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#ifdef CONFIG_DM_ETH |
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struct ueth_data ueth; |
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#endif |
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size_t rx_urb_size; /* maximum USB URB size */ |
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u32 mac_cr; /* MAC control register value */ |
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int have_hwaddr; /* 1 if we have a hardware MAC address */ |
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}; |
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|
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/* |
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* Smsc95xx infrastructure commands |
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*/ |
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static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data) |
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{ |
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int len; |
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ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1); |
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|
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cpu_to_le32s(&data); |
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tmpbuf[0] = data; |
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len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), |
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USB_VENDOR_REQUEST_WRITE_REGISTER, |
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USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
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0, index, tmpbuf, sizeof(data), |
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USB_CTRL_SET_TIMEOUT); |
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if (len != sizeof(data)) { |
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debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d", |
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index, data, len); |
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return -EIO; |
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} |
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return 0; |
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} |
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static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data) |
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{ |
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int len; |
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ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1); |
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|
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len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), |
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USB_VENDOR_REQUEST_READ_REGISTER, |
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USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
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0, index, tmpbuf, sizeof(*data), |
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USB_CTRL_GET_TIMEOUT); |
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*data = tmpbuf[0]; |
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if (len != sizeof(*data)) { |
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debug("smsc95xx_read_reg failed: index=%d, len=%d", |
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index, len); |
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return -EIO; |
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} |
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le32_to_cpus(data); |
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return 0; |
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} |
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|
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/* Loop until the read is completed with timeout */ |
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static int smsc95xx_phy_wait_not_busy(struct usb_device *udev) |
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{ |
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unsigned long start_time = get_timer(0); |
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u32 val; |
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do { |
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smsc95xx_read_reg(udev, MII_ADDR, &val); |
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if (!(val & MII_BUSY_)) |
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return 0; |
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} while (get_timer(start_time) < 1000); |
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return -ETIMEDOUT; |
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} |
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static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx) |
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{ |
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u32 val, addr; |
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|
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/* confirm MII not busy */ |
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if (smsc95xx_phy_wait_not_busy(udev)) { |
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debug("MII is busy in smsc95xx_mdio_read\n"); |
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return -ETIMEDOUT; |
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} |
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/* set the address, index & direction (read from PHY) */ |
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addr = (phy_id << 11) | (idx << 6) | MII_READ_; |
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smsc95xx_write_reg(udev, MII_ADDR, addr); |
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|
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if (smsc95xx_phy_wait_not_busy(udev)) { |
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debug("Timed out reading MII reg %02X\n", idx); |
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return -ETIMEDOUT; |
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} |
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smsc95xx_read_reg(udev, MII_DATA, &val); |
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return (u16)(val & 0xFFFF); |
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} |
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static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx, |
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int regval) |
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{ |
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u32 val, addr; |
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/* confirm MII not busy */ |
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if (smsc95xx_phy_wait_not_busy(udev)) { |
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debug("MII is busy in smsc95xx_mdio_write\n"); |
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return; |
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} |
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val = regval; |
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smsc95xx_write_reg(udev, MII_DATA, val); |
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/* set the address, index & direction (write to PHY) */ |
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addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; |
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smsc95xx_write_reg(udev, MII_ADDR, addr); |
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if (smsc95xx_phy_wait_not_busy(udev)) |
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debug("Timed out writing MII reg %02X\n", idx); |
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} |
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static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev) |
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{ |
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unsigned long start_time = get_timer(0); |
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u32 val; |
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do { |
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smsc95xx_read_reg(udev, E2P_CMD, &val); |
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if (!(val & E2P_CMD_BUSY_)) |
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return 0; |
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udelay(40); |
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} while (get_timer(start_time) < 1 * 1000 * 1000); |
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debug("EEPROM is busy\n"); |
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return -ETIMEDOUT; |
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} |
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static int smsc95xx_wait_eeprom(struct usb_device *udev) |
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{ |
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unsigned long start_time = get_timer(0); |
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u32 val; |
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do { |
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smsc95xx_read_reg(udev, E2P_CMD, &val); |
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if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
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break; |
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udelay(40); |
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} while (get_timer(start_time) < 1 * 1000 * 1000); |
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if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { |
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debug("EEPROM read operation timeout\n"); |
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return -ETIMEDOUT; |
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} |
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return 0; |
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} |
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static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length, |
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u8 *data) |
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{ |
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u32 val; |
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int i, ret; |
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ret = smsc95xx_eeprom_confirm_not_busy(udev); |
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if (ret) |
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return ret; |
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for (i = 0; i < length; i++) { |
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val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); |
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smsc95xx_write_reg(udev, E2P_CMD, val); |
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ret = smsc95xx_wait_eeprom(udev); |
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if (ret < 0) |
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return ret; |
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smsc95xx_read_reg(udev, E2P_DATA, &val); |
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data[i] = val & 0xFF; |
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offset++; |
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} |
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return 0; |
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} |
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/* |
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* mii_nway_restart - restart NWay (autonegotiation) for this interface |
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* |
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* Returns 0 on success, negative on error. |
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*/ |
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static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev) |
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{ |
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int bmcr; |
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int r = -1; |
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/* if autoneg is off, it's an error */ |
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bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR); |
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if (bmcr & BMCR_ANENABLE) { |
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bmcr |= BMCR_ANRESTART; |
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smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr); |
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r = 0; |
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} |
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return r; |
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} |
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static int smsc95xx_phy_initialize(struct usb_device *udev, |
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struct ueth_data *dev) |
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{ |
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smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET); |
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smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE, |
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ADVERTISE_ALL | ADVERTISE_CSMA | |
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ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
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/* read to clear */ |
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smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC); |
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smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK, |
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PHY_INT_MASK_DEFAULT_); |
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mii_nway_restart(udev, dev); |
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debug("phy initialised succesfully\n"); |
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return 0; |
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} |
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static int smsc95xx_init_mac_address(unsigned char *enetaddr, |
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struct usb_device *udev) |
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{ |
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int ret; |
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|
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/* try reading mac address from EEPROM */ |
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ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr); |
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if (ret) |
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return ret; |
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if (is_valid_ethaddr(enetaddr)) { |
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/* eeprom values are valid so use them */ |
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debug("MAC address read from EEPROM\n"); |
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return 0; |
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} |
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/* |
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* No eeprom, or eeprom values are invalid. Generating a random MAC |
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* address is not safe. Just return an error. |
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*/ |
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debug("Invalid MAC address read from EEPROM\n"); |
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|
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return -ENXIO; |
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} |
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static int smsc95xx_write_hwaddr_common(struct usb_device *udev, |
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struct smsc95xx_private *priv, |
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unsigned char *enetaddr) |
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{ |
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u32 addr_lo = get_unaligned_le32(&enetaddr[0]); |
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u32 addr_hi = get_unaligned_le16(&enetaddr[4]); |
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int ret; |
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/* set hardware address */ |
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debug("** %s()\n", __func__); |
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ret = smsc95xx_write_reg(udev, ADDRL, addr_lo); |
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if (ret < 0) |
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return ret; |
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ret = smsc95xx_write_reg(udev, ADDRH, addr_hi); |
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if (ret < 0) |
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return ret; |
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debug("MAC %pM\n", enetaddr); |
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priv->have_hwaddr = 1; |
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|
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return 0; |
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} |
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|
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/* Enable or disable Tx & Rx checksum offload engines */ |
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static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum, |
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int use_rx_csum) |
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{ |
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u32 read_buf; |
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int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf); |
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if (ret < 0) |
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return ret; |
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if (use_tx_csum) |
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read_buf |= Tx_COE_EN_; |
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else |
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read_buf &= ~Tx_COE_EN_; |
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|
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if (use_rx_csum) |
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read_buf |= Rx_COE_EN_; |
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else |
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read_buf &= ~Rx_COE_EN_; |
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ret = smsc95xx_write_reg(udev, COE_CR, read_buf); |
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if (ret < 0) |
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return ret; |
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|
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debug("COE_CR = 0x%08x\n", read_buf); |
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return 0; |
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} |
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|
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static void smsc95xx_set_multicast(struct smsc95xx_private *priv) |
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{ |
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/* No multicast in u-boot */ |
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priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); |
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} |
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|
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/* starts the TX path */ |
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static void smsc95xx_start_tx_path(struct usb_device *udev, |
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struct smsc95xx_private *priv) |
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{ |
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u32 reg_val; |
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|
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/* Enable Tx at MAC */ |
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priv->mac_cr |= MAC_CR_TXEN_; |
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|
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smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr); |
|
|
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/* Enable Tx at SCSRs */ |
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reg_val = TX_CFG_ON_; |
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smsc95xx_write_reg(udev, TX_CFG, reg_val); |
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} |
|
|
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/* Starts the Receive path */ |
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static void smsc95xx_start_rx_path(struct usb_device *udev, |
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struct smsc95xx_private *priv) |
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{ |
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priv->mac_cr |= MAC_CR_RXEN_; |
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smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr); |
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} |
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|
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static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, |
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struct smsc95xx_private *priv, |
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unsigned char *enetaddr) |
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{ |
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int ret; |
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u32 write_buf; |
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u32 read_buf; |
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u32 burst_cap; |
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int timeout; |
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#define TIMEOUT_RESOLUTION 50 /* ms */ |
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int link_detected; |
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|
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debug("** %s()\n", __func__); |
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dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */ |
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|
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write_buf = HW_CFG_LRST_; |
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ret = smsc95xx_write_reg(udev, HW_CFG, write_buf); |
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if (ret < 0) |
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return ret; |
|
|
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timeout = 0; |
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do { |
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ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); |
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if (ret < 0) |
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return ret; |
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udelay(10 * 1000); |
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timeout++; |
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} while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); |
|
|
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if (timeout >= 100) { |
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debug("timeout waiting for completion of Lite Reset\n"); |
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return -ETIMEDOUT; |
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} |
|
|
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write_buf = PM_CTL_PHY_RST_; |
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ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf); |
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if (ret < 0) |
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return ret; |
|
|
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timeout = 0; |
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do { |
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ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf); |
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if (ret < 0) |
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return ret; |
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udelay(10 * 1000); |
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timeout++; |
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} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); |
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if (timeout >= 100) { |
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debug("timeout waiting for PHY Reset\n"); |
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return -ETIMEDOUT; |
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} |
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#ifndef CONFIG_DM_ETH |
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if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) == |
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0) |
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priv->have_hwaddr = 1; |
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#endif |
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if (!priv->have_hwaddr) { |
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puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n"); |
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return -EADDRNOTAVAIL; |
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} |
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ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr); |
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if (ret < 0) |
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return ret; |
|
|
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#ifdef TURBO_MODE |
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if (dev->pusb_dev->speed == USB_SPEED_HIGH) { |
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burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; |
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priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; |
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} else { |
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burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; |
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priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; |
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} |
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#else |
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burst_cap = 0; |
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priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE; |
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#endif |
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debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size); |
|
|
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ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap); |
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if (ret < 0) |
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return ret; |
|
|
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ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf); |
|
if (ret < 0) |
|
return ret; |
|
debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf); |
|
|
|
read_buf = DEFAULT_BULK_IN_DELAY; |
|
ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf); |
|
if (ret < 0) |
|
return ret; |
|
debug("Read Value from BULK_IN_DLY after writing: " |
|
"0x%08x\n", read_buf); |
|
|
|
ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); |
|
if (ret < 0) |
|
return ret; |
|
debug("Read Value from HW_CFG: 0x%08x\n", read_buf); |
|
|
|
#ifdef TURBO_MODE |
|
read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); |
|
#endif |
|
read_buf &= ~HW_CFG_RXDOFF_; |
|
|
|
#define NET_IP_ALIGN 0 |
|
read_buf |= NET_IP_ALIGN << 9; |
|
|
|
ret = smsc95xx_write_reg(udev, HW_CFG, read_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); |
|
if (ret < 0) |
|
return ret; |
|
debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf); |
|
|
|
write_buf = 0xFFFFFFFF; |
|
ret = smsc95xx_write_reg(udev, INT_STS, write_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = smsc95xx_read_reg(udev, ID_REV, &read_buf); |
|
if (ret < 0) |
|
return ret; |
|
debug("ID_REV = 0x%08x\n", read_buf); |
|
|
|
/* Configure GPIO pins as LED outputs */ |
|
write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | |
|
LED_GPIO_CFG_FDX_LED; |
|
ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf); |
|
if (ret < 0) |
|
return ret; |
|
debug("LED_GPIO_CFG set\n"); |
|
|
|
/* Init Tx */ |
|
write_buf = 0; |
|
ret = smsc95xx_write_reg(udev, FLOW, write_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
read_buf = AFC_CFG_DEFAULT; |
|
ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Init Rx. Set Vlan */ |
|
write_buf = (u32)ETH_P_8021Q; |
|
ret = smsc95xx_write_reg(udev, VLAN1, write_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Disable checksum offload engines */ |
|
ret = smsc95xx_set_csums(udev, 0, 0); |
|
if (ret < 0) { |
|
debug("Failed to set csum offload: %d\n", ret); |
|
return ret; |
|
} |
|
smsc95xx_set_multicast(priv); |
|
|
|
ret = smsc95xx_phy_initialize(udev, dev); |
|
if (ret < 0) |
|
return ret; |
|
ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* enable PHY interrupts */ |
|
read_buf |= INT_EP_CTL_PHY_INT_; |
|
|
|
ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf); |
|
if (ret < 0) |
|
return ret; |
|
|
|
smsc95xx_start_tx_path(udev, priv); |
|
smsc95xx_start_rx_path(udev, priv); |
|
|
|
timeout = 0; |
|
do { |
|
link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR) |
|
& BMSR_LSTATUS; |
|
if (!link_detected) { |
|
if (timeout == 0) |
|
printf("Waiting for Ethernet connection... "); |
|
udelay(TIMEOUT_RESOLUTION * 1000); |
|
timeout += TIMEOUT_RESOLUTION; |
|
} |
|
} while (!link_detected && timeout < PHY_CONNECT_TIMEOUT); |
|
if (link_detected) { |
|
if (timeout != 0) |
|
printf("done.\n"); |
|
} else { |
|
printf("unable to connect.\n"); |
|
return -EIO; |
|
} |
|
return 0; |
|
} |
|
|
|
static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length) |
|
{ |
|
int err; |
|
int actual_len; |
|
u32 tx_cmd_a; |
|
u32 tx_cmd_b; |
|
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, |
|
PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)); |
|
|
|
debug("** %s(), len %d, buf %#x\n", __func__, length, |
|
(unsigned int)(ulong)msg); |
|
if (length > PKTSIZE) |
|
return -ENOSPC; |
|
|
|
tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; |
|
tx_cmd_b = (u32)length; |
|
cpu_to_le32s(&tx_cmd_a); |
|
cpu_to_le32s(&tx_cmd_b); |
|
|
|
/* prepend cmd_a and cmd_b */ |
|
memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a)); |
|
memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b)); |
|
memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet, |
|
length); |
|
err = usb_bulk_msg(dev->pusb_dev, |
|
usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), |
|
(void *)msg, |
|
length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), |
|
&actual_len, |
|
USB_BULK_SEND_TIMEOUT); |
|
debug("Tx: len = %u, actual = %u, err = %d\n", |
|
(unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)), |
|
(unsigned int)actual_len, err); |
|
|
|
return err; |
|
} |
|
|
|
#ifndef CONFIG_DM_ETH |
|
/* |
|
* Smsc95xx callbacks |
|
*/ |
|
static int smsc95xx_init(struct eth_device *eth, bd_t *bd) |
|
{ |
|
struct ueth_data *dev = (struct ueth_data *)eth->priv; |
|
struct usb_device *udev = dev->pusb_dev; |
|
struct smsc95xx_private *priv = |
|
(struct smsc95xx_private *)dev->dev_priv; |
|
|
|
return smsc95xx_init_common(udev, dev, priv, eth->enetaddr); |
|
} |
|
|
|
static int smsc95xx_send(struct eth_device *eth, void *packet, int length) |
|
{ |
|
struct ueth_data *dev = (struct ueth_data *)eth->priv; |
|
|
|
return smsc95xx_send_common(dev, packet, length); |
|
} |
|
|
|
static int smsc95xx_recv(struct eth_device *eth) |
|
{ |
|
struct ueth_data *dev = (struct ueth_data *)eth->priv; |
|
DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE); |
|
unsigned char *buf_ptr; |
|
int err; |
|
int actual_len; |
|
u32 packet_len; |
|
int cur_buf_align; |
|
|
|
debug("** %s()\n", __func__); |
|
err = usb_bulk_msg(dev->pusb_dev, |
|
usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), |
|
(void *)recv_buf, RX_URB_SIZE, &actual_len, |
|
USB_BULK_RECV_TIMEOUT); |
|
debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE, |
|
actual_len, err); |
|
if (err != 0) { |
|
debug("Rx: failed to receive\n"); |
|
return -err; |
|
} |
|
if (actual_len > RX_URB_SIZE) { |
|
debug("Rx: received too many bytes %d\n", actual_len); |
|
return -ENOSPC; |
|
} |
|
|
|
buf_ptr = recv_buf; |
|
while (actual_len > 0) { |
|
/* |
|
* 1st 4 bytes contain the length of the actual data plus error |
|
* info. Extract data length. |
|
*/ |
|
if (actual_len < sizeof(packet_len)) { |
|
debug("Rx: incomplete packet length\n"); |
|
return -EIO; |
|
} |
|
memcpy(&packet_len, buf_ptr, sizeof(packet_len)); |
|
le32_to_cpus(&packet_len); |
|
if (packet_len & RX_STS_ES_) { |
|
debug("Rx: Error header=%#x", packet_len); |
|
return -EIO; |
|
} |
|
packet_len = ((packet_len & RX_STS_FL_) >> 16); |
|
|
|
if (packet_len > actual_len - sizeof(packet_len)) { |
|
debug("Rx: too large packet: %d\n", packet_len); |
|
return -EIO; |
|
} |
|
|
|
/* Notify net stack */ |
|
net_process_received_packet(buf_ptr + sizeof(packet_len), |
|
packet_len - 4); |
|
|
|
/* Adjust for next iteration */ |
|
actual_len -= sizeof(packet_len) + packet_len; |
|
buf_ptr += sizeof(packet_len) + packet_len; |
|
cur_buf_align = (ulong)buf_ptr - (ulong)recv_buf; |
|
|
|
if (cur_buf_align & 0x03) { |
|
int align = 4 - (cur_buf_align & 0x03); |
|
|
|
actual_len -= align; |
|
buf_ptr += align; |
|
} |
|
} |
|
return err; |
|
} |
|
|
|
static void smsc95xx_halt(struct eth_device *eth) |
|
{ |
|
debug("** %s()\n", __func__); |
|
} |
|
|
|
static int smsc95xx_write_hwaddr(struct eth_device *eth) |
|
{ |
|
struct ueth_data *dev = eth->priv; |
|
struct usb_device *udev = dev->pusb_dev; |
|
struct smsc95xx_private *priv = dev->dev_priv; |
|
|
|
return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr); |
|
} |
|
|
|
/* |
|
* SMSC probing functions |
|
*/ |
|
void smsc95xx_eth_before_probe(void) |
|
{ |
|
curr_eth_dev = 0; |
|
} |
|
|
|
struct smsc95xx_dongle { |
|
unsigned short vendor; |
|
unsigned short product; |
|
}; |
|
|
|
static const struct smsc95xx_dongle smsc95xx_dongles[] = { |
|
{ 0x0424, 0xec00 }, /* LAN9512/LAN9514 Ethernet */ |
|
{ 0x0424, 0x9500 }, /* LAN9500 Ethernet */ |
|
{ 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */ |
|
{ 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */ |
|
{ 0x0424, 0x9e00 }, /* LAN9500A Ethernet */ |
|
{ 0x0000, 0x0000 } /* END - Do not remove */ |
|
}; |
|
|
|
/* Probe to see if a new device is actually an SMSC device */ |
|
int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, |
|
struct ueth_data *ss) |
|
{ |
|
struct usb_interface *iface; |
|
struct usb_interface_descriptor *iface_desc; |
|
int i; |
|
|
|
/* let's examine the device now */ |
|
iface = &dev->config.if_desc[ifnum]; |
|
iface_desc = &dev->config.if_desc[ifnum].desc; |
|
|
|
for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) { |
|
if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor && |
|
dev->descriptor.idProduct == smsc95xx_dongles[i].product) |
|
/* Found a supported dongle */ |
|
break; |
|
} |
|
if (smsc95xx_dongles[i].vendor == 0) |
|
return 0; |
|
|
|
/* At this point, we know we've got a live one */ |
|
debug("\n\nUSB Ethernet device detected\n"); |
|
memset(ss, '\0', sizeof(struct ueth_data)); |
|
|
|
/* Initialize the ueth_data structure with some useful info */ |
|
ss->ifnum = ifnum; |
|
ss->pusb_dev = dev; |
|
ss->subclass = iface_desc->bInterfaceSubClass; |
|
ss->protocol = iface_desc->bInterfaceProtocol; |
|
|
|
/* |
|
* We are expecting a minimum of 3 endpoints - in, out (bulk), and int. |
|
* We will ignore any others. |
|
*/ |
|
for (i = 0; i < iface_desc->bNumEndpoints; i++) { |
|
/* is it an BULK endpoint? */ |
|
if ((iface->ep_desc[i].bmAttributes & |
|
USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) { |
|
if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN) |
|
ss->ep_in = |
|
iface->ep_desc[i].bEndpointAddress & |
|
USB_ENDPOINT_NUMBER_MASK; |
|
else |
|
ss->ep_out = |
|
iface->ep_desc[i].bEndpointAddress & |
|
USB_ENDPOINT_NUMBER_MASK; |
|
} |
|
|
|
/* is it an interrupt endpoint? */ |
|
if ((iface->ep_desc[i].bmAttributes & |
|
USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) { |
|
ss->ep_int = iface->ep_desc[i].bEndpointAddress & |
|
USB_ENDPOINT_NUMBER_MASK; |
|
ss->irqinterval = iface->ep_desc[i].bInterval; |
|
} |
|
} |
|
debug("Endpoints In %d Out %d Int %d\n", |
|
ss->ep_in, ss->ep_out, ss->ep_int); |
|
|
|
/* Do some basic sanity checks, and bail if we find a problem */ |
|
if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || |
|
!ss->ep_in || !ss->ep_out || !ss->ep_int) { |
|
debug("Problems with device\n"); |
|
return 0; |
|
} |
|
dev->privptr = (void *)ss; |
|
|
|
/* alloc driver private */ |
|
ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private)); |
|
if (!ss->dev_priv) |
|
return 0; |
|
|
|
return 1; |
|
} |
|
|
|
int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, |
|
struct eth_device *eth) |
|
{ |
|
debug("** %s()\n", __func__); |
|
if (!eth) { |
|
debug("%s: missing parameter.\n", __func__); |
|
return 0; |
|
} |
|
sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++); |
|
eth->init = smsc95xx_init; |
|
eth->send = smsc95xx_send; |
|
eth->recv = smsc95xx_recv; |
|
eth->halt = smsc95xx_halt; |
|
eth->write_hwaddr = smsc95xx_write_hwaddr; |
|
eth->priv = ss; |
|
return 1; |
|
} |
|
#endif /* !CONFIG_DM_ETH */ |
|
|
|
#ifdef CONFIG_DM_ETH |
|
static int smsc95xx_eth_start(struct udevice *dev) |
|
{ |
|
struct usb_device *udev = dev_get_parent_priv(dev); |
|
struct smsc95xx_private *priv = dev_get_priv(dev); |
|
struct eth_pdata *pdata = dev_get_platdata(dev); |
|
|
|
/* Driver-model Ethernet ensures we have this */ |
|
priv->have_hwaddr = 1; |
|
|
|
return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr); |
|
} |
|
|
|
void smsc95xx_eth_stop(struct udevice *dev) |
|
{ |
|
debug("** %s()\n", __func__); |
|
} |
|
|
|
int smsc95xx_eth_send(struct udevice *dev, void *packet, int length) |
|
{ |
|
struct smsc95xx_private *priv = dev_get_priv(dev); |
|
|
|
return smsc95xx_send_common(&priv->ueth, packet, length); |
|
} |
|
|
|
int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp) |
|
{ |
|
struct smsc95xx_private *priv = dev_get_priv(dev); |
|
struct ueth_data *ueth = &priv->ueth; |
|
uint8_t *ptr; |
|
int ret, len; |
|
u32 packet_len; |
|
|
|
len = usb_ether_get_rx_bytes(ueth, &ptr); |
|
debug("%s: first try, len=%d\n", __func__, len); |
|
if (!len) { |
|
if (!(flags & ETH_RECV_CHECK_DEVICE)) |
|
return -EAGAIN; |
|
ret = usb_ether_receive(ueth, RX_URB_SIZE); |
|
if (ret == -EAGAIN) |
|
return ret; |
|
|
|
len = usb_ether_get_rx_bytes(ueth, &ptr); |
|
debug("%s: second try, len=%d\n", __func__, len); |
|
} |
|
|
|
/* |
|
* 1st 4 bytes contain the length of the actual data plus error info. |
|
* Extract data length. |
|
*/ |
|
if (len < sizeof(packet_len)) { |
|
debug("Rx: incomplete packet length\n"); |
|
goto err; |
|
} |
|
memcpy(&packet_len, ptr, sizeof(packet_len)); |
|
le32_to_cpus(&packet_len); |
|
if (packet_len & RX_STS_ES_) { |
|
debug("Rx: Error header=%#x", packet_len); |
|
goto err; |
|
} |
|
packet_len = ((packet_len & RX_STS_FL_) >> 16); |
|
|
|
if (packet_len > len - sizeof(packet_len)) { |
|
debug("Rx: too large packet: %d\n", packet_len); |
|
goto err; |
|
} |
|
|
|
*packetp = ptr + sizeof(packet_len); |
|
return packet_len - 4; |
|
|
|
err: |
|
usb_ether_advance_rxbuf(ueth, -1); |
|
return -EINVAL; |
|
} |
|
|
|
static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len) |
|
{ |
|
struct smsc95xx_private *priv = dev_get_priv(dev); |
|
|
|
packet_len = ALIGN(packet_len + sizeof(u32), 4); |
|
usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len); |
|
|
|
return 0; |
|
} |
|
|
|
int smsc95xx_write_hwaddr(struct udevice *dev) |
|
{ |
|
struct usb_device *udev = dev_get_parent_priv(dev); |
|
struct eth_pdata *pdata = dev_get_platdata(dev); |
|
struct smsc95xx_private *priv = dev_get_priv(dev); |
|
|
|
return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr); |
|
} |
|
|
|
int smsc95xx_read_rom_hwaddr(struct udevice *dev) |
|
{ |
|
struct usb_device *udev = dev_get_parent_priv(dev); |
|
struct eth_pdata *pdata = dev_get_platdata(dev); |
|
int ret; |
|
|
|
ret = smsc95xx_init_mac_address(pdata->enetaddr, udev); |
|
if (ret) |
|
memset(pdata->enetaddr, 0, 6); |
|
|
|
return 0; |
|
} |
|
|
|
static int smsc95xx_eth_probe(struct udevice *dev) |
|
{ |
|
struct smsc95xx_private *priv = dev_get_priv(dev); |
|
struct ueth_data *ueth = &priv->ueth; |
|
|
|
return usb_ether_register(dev, ueth, RX_URB_SIZE); |
|
} |
|
|
|
static const struct eth_ops smsc95xx_eth_ops = { |
|
.start = smsc95xx_eth_start, |
|
.send = smsc95xx_eth_send, |
|
.recv = smsc95xx_eth_recv, |
|
.free_pkt = smsc95xx_free_pkt, |
|
.stop = smsc95xx_eth_stop, |
|
.write_hwaddr = smsc95xx_write_hwaddr, |
|
.read_rom_hwaddr = smsc95xx_read_rom_hwaddr, |
|
}; |
|
|
|
U_BOOT_DRIVER(smsc95xx_eth) = { |
|
.name = "smsc95xx_eth", |
|
.id = UCLASS_ETH, |
|
.probe = smsc95xx_eth_probe, |
|
.ops = &smsc95xx_eth_ops, |
|
.priv_auto_alloc_size = sizeof(struct smsc95xx_private), |
|
.platdata_auto_alloc_size = sizeof(struct eth_pdata), |
|
}; |
|
|
|
static const struct usb_device_id smsc95xx_eth_id_table[] = { |
|
{ USB_DEVICE(0x05ac, 0x1402) }, |
|
{ USB_DEVICE(0x0424, 0xec00) }, /* LAN9512/LAN9514 Ethernet */ |
|
{ USB_DEVICE(0x0424, 0x9500) }, /* LAN9500 Ethernet */ |
|
{ USB_DEVICE(0x0424, 0x9730) }, /* LAN9730 Ethernet (HSIC) */ |
|
{ USB_DEVICE(0x0424, 0x9900) }, /* SMSC9500 USB Ethernet (SAL10) */ |
|
{ USB_DEVICE(0x0424, 0x9e00) }, /* LAN9500A Ethernet */ |
|
{ } /* Terminating entry */ |
|
}; |
|
|
|
U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table); |
|
#endif
|
|
|