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186 lines
4.5 KiB
186 lines
4.5 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Pinctrl driver for Rockchip 3128 SoCs |
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <errno.h> |
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#include <syscon.h> |
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#include <asm/io.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/grf_rk3128.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/periph.h> |
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#include <dm/pinctrl.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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struct rk3128_pinctrl_priv { |
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struct rk3128_grf *grf; |
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}; |
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static void pinctrl_rk3128_i2c_config(struct rk3128_grf *grf, int i2c_id) |
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{ |
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switch (i2c_id) { |
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case PERIPH_ID_I2C0: |
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rk_clrsetreg(&grf->gpio0a_iomux, |
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GPIO0A1_MASK | GPIO0A0_MASK, |
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GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT | |
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GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT); |
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break; |
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case PERIPH_ID_I2C1: |
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rk_clrsetreg(&grf->gpio0a_iomux, |
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GPIO0A3_MASK | GPIO0A2_MASK, |
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GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT | |
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GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT); |
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break; |
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case PERIPH_ID_I2C2: |
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rk_clrsetreg(&grf->gpio2c_iomux2, |
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GPIO2C5_MASK | GPIO2C4_MASK, |
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GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT | |
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GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT); |
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break; |
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case PERIPH_ID_I2C3: |
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rk_clrsetreg(&grf->gpio0a_iomux, |
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GPIO0A7_MASK | GPIO0A6_MASK, |
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GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT | |
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GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT); |
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break; |
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} |
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} |
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static void pinctrl_rk3128_sdmmc_config(struct rk3128_grf *grf, int mmc_id) |
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{ |
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switch (mmc_id) { |
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case PERIPH_ID_EMMC: |
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rk_clrsetreg(&grf->gpio1d_iomux, 0xffff, |
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GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT | |
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GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT | |
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GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT | |
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GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT | |
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GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT | |
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GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT | |
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GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT | |
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GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT); |
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rk_clrsetreg(&grf->gpio2a_iomux, |
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GPIO2A5_MASK | GPIO2A7_MASK, |
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GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT | |
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GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT); |
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break; |
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case PERIPH_ID_SDCARD: |
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rk_clrsetreg(&grf->gpio1c_iomux, 0x0fff, |
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GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT | |
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GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT | |
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GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT | |
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GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT | |
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GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT | |
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GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT); |
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break; |
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} |
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} |
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static int rk3128_pinctrl_request(struct udevice *dev, int func, int flags) |
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{ |
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struct rk3128_pinctrl_priv *priv = dev_get_priv(dev); |
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debug("%s: func=%x, flags=%x\n", __func__, func, flags); |
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switch (func) { |
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case PERIPH_ID_I2C0: |
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case PERIPH_ID_I2C1: |
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case PERIPH_ID_I2C2: |
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case PERIPH_ID_I2C3: |
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pinctrl_rk3128_i2c_config(priv->grf, func); |
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break; |
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case PERIPH_ID_SDMMC0: |
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case PERIPH_ID_SDMMC1: |
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pinctrl_rk3128_sdmmc_config(priv->grf, func); |
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break; |
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default: |
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return -EINVAL; |
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} |
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return 0; |
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} |
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static int rk3128_pinctrl_get_periph_id(struct udevice *dev, |
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struct udevice *periph) |
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{ |
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u32 cell[3]; |
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int ret; |
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ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph), |
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"interrupts", cell, ARRAY_SIZE(cell)); |
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if (ret < 0) |
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return -EINVAL; |
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switch (cell[1]) { |
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case 14: |
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return PERIPH_ID_SDCARD; |
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case 16: |
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return PERIPH_ID_EMMC; |
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case 20: |
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return PERIPH_ID_UART0; |
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case 21: |
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return PERIPH_ID_UART1; |
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case 22: |
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return PERIPH_ID_UART2; |
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case 23: |
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return PERIPH_ID_SPI0; |
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case 24: |
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return PERIPH_ID_I2C0; |
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case 25: |
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return PERIPH_ID_I2C1; |
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case 26: |
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return PERIPH_ID_I2C2; |
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case 27: |
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return PERIPH_ID_I2C3; |
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case 30: |
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return PERIPH_ID_PWM0; |
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} |
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return -ENOENT; |
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} |
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static int rk3128_pinctrl_set_state_simple(struct udevice *dev, |
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struct udevice *periph) |
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{ |
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int func; |
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func = rk3128_pinctrl_get_periph_id(dev, periph); |
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if (func < 0) |
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return func; |
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return rk3128_pinctrl_request(dev, func, 0); |
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} |
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static struct pinctrl_ops rk3128_pinctrl_ops = { |
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.set_state_simple = rk3128_pinctrl_set_state_simple, |
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.request = rk3128_pinctrl_request, |
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.get_periph_id = rk3128_pinctrl_get_periph_id, |
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}; |
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static int rk3128_pinctrl_probe(struct udevice *dev) |
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{ |
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struct rk3128_pinctrl_priv *priv = dev_get_priv(dev); |
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priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
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debug("%s: grf=%p\n", __func__, priv->grf); |
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return 0; |
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} |
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static const struct udevice_id rk3128_pinctrl_ids[] = { |
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{ .compatible = "rockchip,rk3128-pinctrl" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(pinctrl_rk3128) = { |
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.name = "pinctrl_rk3128", |
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.id = UCLASS_PINCTRL, |
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.of_match = rk3128_pinctrl_ids, |
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.priv_auto_alloc_size = sizeof(struct rk3128_pinctrl_priv), |
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.ops = &rk3128_pinctrl_ops, |
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.bind = dm_scan_fdt_dev, |
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.probe = rk3128_pinctrl_probe, |
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};
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