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52 lines
1.3 KiB
52 lines
1.3 KiB
/* SPDX-License-Identifier: GPL-2.0+ */ |
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/* |
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* Copyright (C) 2016 Peng Fan <[email protected]> |
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*/ |
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#ifndef __DRIVERS_PINCTRL_IMX_H |
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#define __DRIVERS_PINCTRL_IMX_H |
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/** |
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* @base: the address to the controller in virtual memory |
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* @input_sel_base: the address of the select input in virtual memory. |
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* @flags: flags specific for each soc |
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* @mux_mask: Used when SHARE_MUX_CONF_REG flag is added |
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*/ |
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struct imx_pinctrl_soc_info { |
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void __iomem *base; |
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void __iomem *input_sel_base; |
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unsigned int flags; |
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unsigned int mux_mask; |
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}; |
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/** |
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* @dev: a pointer back to containing device |
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* @info: the soc info |
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*/ |
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struct imx_pinctrl_priv { |
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struct udevice *dev; |
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struct imx_pinctrl_soc_info *info; |
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}; |
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extern const struct pinctrl_ops imx_pinctrl_ops; |
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#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */ |
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#define IMX_PAD_SION 0x40000000 /* set SION */ |
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/* |
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* Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and |
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* 1 u32 CONFIG, so 24 types in total for each pin. |
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*/ |
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#define FSL_PIN_SIZE 24 |
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#define SHARE_FSL_PIN_SIZE 20 |
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#define SHARE_MUX_CONF_REG 0x1 |
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#define ZERO_OFFSET_VALID 0x2 |
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#define CONFIG_IBE_OBE 0x4 |
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#define IOMUXC_CONFIG_SION (0x1 << 4) |
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int imx_pinctrl_probe(struct udevice *dev, struct imx_pinctrl_soc_info *info); |
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int imx_pinctrl_remove(struct udevice *dev); |
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#endif /* __DRIVERS_PINCTRL_IMX_H */
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