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947 lines
19 KiB
947 lines
19 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Driver for NEC VR4100 series Serial Interface Unit. |
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* |
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* Copyright (C) 2004-2008 Yoichi Yuasa <[email protected]> |
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* |
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* Based on drivers/serial/8250.c, by Russell King. |
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*/ |
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|
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#include <linux/console.h> |
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#include <linux/errno.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/ioport.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/serial.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial_reg.h> |
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#include <linux/tty.h> |
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#include <linux/tty_flip.h> |
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#include <linux/io.h> |
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#include <asm/vr41xx/siu.h> |
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#include <asm/vr41xx/vr41xx.h> |
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#define SIU_BAUD_BASE 1152000 |
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#define SIU_MAJOR 204 |
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#define SIU_MINOR_BASE 82 |
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#define RX_MAX_COUNT 256 |
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#define TX_MAX_COUNT 15 |
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|
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#define SIUIRSEL 0x08 |
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#define TMICMODE 0x20 |
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#define TMICTX 0x10 |
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#define IRMSEL 0x0c |
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#define IRMSEL_HP 0x08 |
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#define IRMSEL_TEMIC 0x04 |
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#define IRMSEL_SHARP 0x00 |
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#define IRUSESEL 0x02 |
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#define SIRSEL 0x01 |
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|
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static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = { |
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[0 ... SIU_PORTS_MAX-1] = { |
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.lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock), |
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.irq = 0, |
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}, |
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}; |
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#ifdef CONFIG_SERIAL_VR41XX_CONSOLE |
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static uint8_t lsr_break_flag[SIU_PORTS_MAX]; |
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#endif |
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#define siu_read(port, offset) readb((port)->membase + (offset)) |
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#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset)) |
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void vr41xx_select_siu_interface(siu_interface_t interface) |
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{ |
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struct uart_port *port; |
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unsigned long flags; |
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uint8_t irsel; |
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port = &siu_uart_ports[0]; |
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spin_lock_irqsave(&port->lock, flags); |
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irsel = siu_read(port, SIUIRSEL); |
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if (interface == SIU_INTERFACE_IRDA) |
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irsel |= SIRSEL; |
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else |
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irsel &= ~SIRSEL; |
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siu_write(port, SIUIRSEL, irsel); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface); |
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void vr41xx_use_irda(irda_use_t use) |
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{ |
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struct uart_port *port; |
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unsigned long flags; |
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uint8_t irsel; |
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port = &siu_uart_ports[0]; |
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spin_lock_irqsave(&port->lock, flags); |
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irsel = siu_read(port, SIUIRSEL); |
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if (use == FIR_USE_IRDA) |
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irsel |= IRUSESEL; |
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else |
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irsel &= ~IRUSESEL; |
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siu_write(port, SIUIRSEL, irsel); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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EXPORT_SYMBOL_GPL(vr41xx_use_irda); |
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void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed) |
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{ |
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struct uart_port *port; |
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unsigned long flags; |
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uint8_t irsel; |
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port = &siu_uart_ports[0]; |
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spin_lock_irqsave(&port->lock, flags); |
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irsel = siu_read(port, SIUIRSEL); |
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irsel &= ~(IRMSEL | TMICTX | TMICMODE); |
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switch (module) { |
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case SHARP_IRDA: |
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irsel |= IRMSEL_SHARP; |
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break; |
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case TEMIC_IRDA: |
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irsel |= IRMSEL_TEMIC | TMICMODE; |
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if (speed == IRDA_TX_4MBPS) |
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irsel |= TMICTX; |
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break; |
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case HP_IRDA: |
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irsel |= IRMSEL_HP; |
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break; |
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default: |
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break; |
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} |
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siu_write(port, SIUIRSEL, irsel); |
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|
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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EXPORT_SYMBOL_GPL(vr41xx_select_irda_module); |
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static inline void siu_clear_fifo(struct uart_port *port) |
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{ |
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siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO); |
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siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | |
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UART_FCR_CLEAR_XMIT); |
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siu_write(port, UART_FCR, 0); |
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} |
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|
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static inline unsigned long siu_port_size(struct uart_port *port) |
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{ |
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switch (port->type) { |
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case PORT_VR41XX_SIU: |
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return 11UL; |
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case PORT_VR41XX_DSIU: |
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return 8UL; |
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} |
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return 0; |
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} |
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static inline unsigned int siu_check_type(struct uart_port *port) |
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{ |
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if (port->line == 0) |
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return PORT_VR41XX_SIU; |
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if (port->line == 1 && port->irq) |
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return PORT_VR41XX_DSIU; |
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return PORT_UNKNOWN; |
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} |
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static inline const char *siu_type_name(struct uart_port *port) |
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{ |
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switch (port->type) { |
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case PORT_VR41XX_SIU: |
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return "SIU"; |
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case PORT_VR41XX_DSIU: |
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return "DSIU"; |
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} |
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return NULL; |
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} |
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static unsigned int siu_tx_empty(struct uart_port *port) |
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{ |
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uint8_t lsr; |
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|
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lsr = siu_read(port, UART_LSR); |
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if (lsr & UART_LSR_TEMT) |
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return TIOCSER_TEMT; |
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return 0; |
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} |
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static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl) |
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{ |
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uint8_t mcr = 0; |
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if (mctrl & TIOCM_DTR) |
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mcr |= UART_MCR_DTR; |
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if (mctrl & TIOCM_RTS) |
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mcr |= UART_MCR_RTS; |
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if (mctrl & TIOCM_OUT1) |
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mcr |= UART_MCR_OUT1; |
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if (mctrl & TIOCM_OUT2) |
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mcr |= UART_MCR_OUT2; |
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if (mctrl & TIOCM_LOOP) |
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mcr |= UART_MCR_LOOP; |
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siu_write(port, UART_MCR, mcr); |
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} |
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static unsigned int siu_get_mctrl(struct uart_port *port) |
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{ |
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uint8_t msr; |
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unsigned int mctrl = 0; |
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msr = siu_read(port, UART_MSR); |
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if (msr & UART_MSR_DCD) |
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mctrl |= TIOCM_CAR; |
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if (msr & UART_MSR_RI) |
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mctrl |= TIOCM_RNG; |
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if (msr & UART_MSR_DSR) |
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mctrl |= TIOCM_DSR; |
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if (msr & UART_MSR_CTS) |
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mctrl |= TIOCM_CTS; |
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return mctrl; |
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} |
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static void siu_stop_tx(struct uart_port *port) |
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{ |
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unsigned long flags; |
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uint8_t ier; |
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spin_lock_irqsave(&port->lock, flags); |
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ier = siu_read(port, UART_IER); |
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ier &= ~UART_IER_THRI; |
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siu_write(port, UART_IER, ier); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static void siu_start_tx(struct uart_port *port) |
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{ |
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unsigned long flags; |
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uint8_t ier; |
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spin_lock_irqsave(&port->lock, flags); |
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ier = siu_read(port, UART_IER); |
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ier |= UART_IER_THRI; |
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siu_write(port, UART_IER, ier); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static void siu_stop_rx(struct uart_port *port) |
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{ |
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unsigned long flags; |
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uint8_t ier; |
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spin_lock_irqsave(&port->lock, flags); |
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ier = siu_read(port, UART_IER); |
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ier &= ~UART_IER_RLSI; |
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siu_write(port, UART_IER, ier); |
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port->read_status_mask &= ~UART_LSR_DR; |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static void siu_enable_ms(struct uart_port *port) |
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{ |
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unsigned long flags; |
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uint8_t ier; |
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spin_lock_irqsave(&port->lock, flags); |
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ier = siu_read(port, UART_IER); |
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ier |= UART_IER_MSI; |
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siu_write(port, UART_IER, ier); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static void siu_break_ctl(struct uart_port *port, int ctl) |
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{ |
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unsigned long flags; |
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uint8_t lcr; |
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spin_lock_irqsave(&port->lock, flags); |
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lcr = siu_read(port, UART_LCR); |
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if (ctl == -1) |
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lcr |= UART_LCR_SBC; |
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else |
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lcr &= ~UART_LCR_SBC; |
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siu_write(port, UART_LCR, lcr); |
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spin_unlock_irqrestore(&port->lock, flags); |
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} |
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static inline void receive_chars(struct uart_port *port, uint8_t *status) |
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{ |
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uint8_t lsr, ch; |
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char flag; |
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int max_count = RX_MAX_COUNT; |
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lsr = *status; |
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do { |
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ch = siu_read(port, UART_RX); |
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port->icount.rx++; |
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flag = TTY_NORMAL; |
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#ifdef CONFIG_SERIAL_VR41XX_CONSOLE |
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lsr |= lsr_break_flag[port->line]; |
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lsr_break_flag[port->line] = 0; |
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#endif |
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if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE | |
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UART_LSR_PE | UART_LSR_OE))) { |
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if (lsr & UART_LSR_BI) { |
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lsr &= ~(UART_LSR_FE | UART_LSR_PE); |
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port->icount.brk++; |
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if (uart_handle_break(port)) |
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goto ignore_char; |
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} |
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if (lsr & UART_LSR_FE) |
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port->icount.frame++; |
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if (lsr & UART_LSR_PE) |
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port->icount.parity++; |
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if (lsr & UART_LSR_OE) |
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port->icount.overrun++; |
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lsr &= port->read_status_mask; |
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if (lsr & UART_LSR_BI) |
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flag = TTY_BREAK; |
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if (lsr & UART_LSR_FE) |
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flag = TTY_FRAME; |
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if (lsr & UART_LSR_PE) |
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flag = TTY_PARITY; |
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} |
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if (uart_handle_sysrq_char(port, ch)) |
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goto ignore_char; |
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uart_insert_char(port, lsr, UART_LSR_OE, ch, flag); |
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ignore_char: |
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lsr = siu_read(port, UART_LSR); |
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} while ((lsr & UART_LSR_DR) && (max_count-- > 0)); |
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tty_flip_buffer_push(&port->state->port); |
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*status = lsr; |
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} |
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static inline void check_modem_status(struct uart_port *port) |
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{ |
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uint8_t msr; |
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msr = siu_read(port, UART_MSR); |
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if ((msr & UART_MSR_ANY_DELTA) == 0) |
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return; |
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if (msr & UART_MSR_DDCD) |
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uart_handle_dcd_change(port, msr & UART_MSR_DCD); |
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if (msr & UART_MSR_TERI) |
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port->icount.rng++; |
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if (msr & UART_MSR_DDSR) |
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port->icount.dsr++; |
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if (msr & UART_MSR_DCTS) |
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uart_handle_cts_change(port, msr & UART_MSR_CTS); |
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wake_up_interruptible(&port->state->port.delta_msr_wait); |
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} |
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static inline void transmit_chars(struct uart_port *port) |
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{ |
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struct circ_buf *xmit; |
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int max_count = TX_MAX_COUNT; |
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xmit = &port->state->xmit; |
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if (port->x_char) { |
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siu_write(port, UART_TX, port->x_char); |
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port->icount.tx++; |
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port->x_char = 0; |
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return; |
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} |
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
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siu_stop_tx(port); |
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return; |
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} |
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do { |
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siu_write(port, UART_TX, xmit->buf[xmit->tail]); |
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
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port->icount.tx++; |
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if (uart_circ_empty(xmit)) |
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break; |
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} while (max_count-- > 0); |
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
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uart_write_wakeup(port); |
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if (uart_circ_empty(xmit)) |
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siu_stop_tx(port); |
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} |
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static irqreturn_t siu_interrupt(int irq, void *dev_id) |
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{ |
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struct uart_port *port; |
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uint8_t iir, lsr; |
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port = (struct uart_port *)dev_id; |
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iir = siu_read(port, UART_IIR); |
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if (iir & UART_IIR_NO_INT) |
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return IRQ_NONE; |
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lsr = siu_read(port, UART_LSR); |
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if (lsr & UART_LSR_DR) |
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receive_chars(port, &lsr); |
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check_modem_status(port); |
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if (lsr & UART_LSR_THRE) |
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transmit_chars(port); |
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return IRQ_HANDLED; |
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} |
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static int siu_startup(struct uart_port *port) |
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{ |
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int retval; |
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if (port->membase == NULL) |
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return -ENODEV; |
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siu_clear_fifo(port); |
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(void)siu_read(port, UART_LSR); |
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(void)siu_read(port, UART_RX); |
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(void)siu_read(port, UART_IIR); |
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(void)siu_read(port, UART_MSR); |
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if (siu_read(port, UART_LSR) == 0xff) |
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return -ENODEV; |
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retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port); |
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if (retval) |
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return retval; |
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if (port->type == PORT_VR41XX_DSIU) |
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vr41xx_enable_dsiuint(DSIUINT_ALL); |
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siu_write(port, UART_LCR, UART_LCR_WLEN8); |
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spin_lock_irq(&port->lock); |
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siu_set_mctrl(port, port->mctrl); |
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spin_unlock_irq(&port->lock); |
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siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI); |
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(void)siu_read(port, UART_LSR); |
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(void)siu_read(port, UART_RX); |
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(void)siu_read(port, UART_IIR); |
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(void)siu_read(port, UART_MSR); |
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return 0; |
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} |
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static void siu_shutdown(struct uart_port *port) |
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{ |
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unsigned long flags; |
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uint8_t lcr; |
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|
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siu_write(port, UART_IER, 0); |
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|
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spin_lock_irqsave(&port->lock, flags); |
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|
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port->mctrl &= ~TIOCM_OUT2; |
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siu_set_mctrl(port, port->mctrl); |
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|
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spin_unlock_irqrestore(&port->lock, flags); |
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|
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lcr = siu_read(port, UART_LCR); |
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lcr &= ~UART_LCR_SBC; |
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siu_write(port, UART_LCR, lcr); |
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|
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siu_clear_fifo(port); |
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|
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(void)siu_read(port, UART_RX); |
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|
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if (port->type == PORT_VR41XX_DSIU) |
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vr41xx_disable_dsiuint(DSIUINT_ALL); |
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|
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free_irq(port->irq, port); |
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} |
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|
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static void siu_set_termios(struct uart_port *port, struct ktermios *new, |
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struct ktermios *old) |
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{ |
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tcflag_t c_cflag, c_iflag; |
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uint8_t lcr, fcr, ier; |
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unsigned int baud, quot; |
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unsigned long flags; |
|
|
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c_cflag = new->c_cflag; |
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switch (c_cflag & CSIZE) { |
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case CS5: |
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lcr = UART_LCR_WLEN5; |
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break; |
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case CS6: |
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lcr = UART_LCR_WLEN6; |
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break; |
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case CS7: |
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lcr = UART_LCR_WLEN7; |
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break; |
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default: |
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lcr = UART_LCR_WLEN8; |
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break; |
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} |
|
|
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if (c_cflag & CSTOPB) |
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lcr |= UART_LCR_STOP; |
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if (c_cflag & PARENB) |
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lcr |= UART_LCR_PARITY; |
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if ((c_cflag & PARODD) != PARODD) |
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lcr |= UART_LCR_EPAR; |
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if (c_cflag & CMSPAR) |
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lcr |= UART_LCR_SPAR; |
|
|
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baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); |
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quot = uart_get_divisor(port, baud); |
|
|
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fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10; |
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|
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spin_lock_irqsave(&port->lock, flags); |
|
|
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uart_update_timeout(port, c_cflag, baud); |
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|
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c_iflag = new->c_iflag; |
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|
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port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR; |
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if (c_iflag & INPCK) |
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port->read_status_mask |= UART_LSR_FE | UART_LSR_PE; |
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if (c_iflag & (IGNBRK | BRKINT | PARMRK)) |
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port->read_status_mask |= UART_LSR_BI; |
|
|
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port->ignore_status_mask = 0; |
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if (c_iflag & IGNPAR) |
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port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE; |
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if (c_iflag & IGNBRK) { |
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port->ignore_status_mask |= UART_LSR_BI; |
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if (c_iflag & IGNPAR) |
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port->ignore_status_mask |= UART_LSR_OE; |
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} |
|
|
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if ((c_cflag & CREAD) == 0) |
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port->ignore_status_mask |= UART_LSR_DR; |
|
|
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ier = siu_read(port, UART_IER); |
|
ier &= ~UART_IER_MSI; |
|
if (UART_ENABLE_MS(port, c_cflag)) |
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ier |= UART_IER_MSI; |
|
siu_write(port, UART_IER, ier); |
|
|
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siu_write(port, UART_LCR, lcr | UART_LCR_DLAB); |
|
|
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siu_write(port, UART_DLL, (uint8_t)quot); |
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siu_write(port, UART_DLM, (uint8_t)(quot >> 8)); |
|
|
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siu_write(port, UART_LCR, lcr); |
|
|
|
siu_write(port, UART_FCR, fcr); |
|
|
|
siu_set_mctrl(port, port->mctrl); |
|
|
|
spin_unlock_irqrestore(&port->lock, flags); |
|
} |
|
|
|
static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) |
|
{ |
|
switch (state) { |
|
case 0: |
|
switch (port->type) { |
|
case PORT_VR41XX_SIU: |
|
vr41xx_supply_clock(SIU_CLOCK); |
|
break; |
|
case PORT_VR41XX_DSIU: |
|
vr41xx_supply_clock(DSIU_CLOCK); |
|
break; |
|
} |
|
break; |
|
case 3: |
|
switch (port->type) { |
|
case PORT_VR41XX_SIU: |
|
vr41xx_mask_clock(SIU_CLOCK); |
|
break; |
|
case PORT_VR41XX_DSIU: |
|
vr41xx_mask_clock(DSIU_CLOCK); |
|
break; |
|
} |
|
break; |
|
} |
|
} |
|
|
|
static const char *siu_type(struct uart_port *port) |
|
{ |
|
return siu_type_name(port); |
|
} |
|
|
|
static void siu_release_port(struct uart_port *port) |
|
{ |
|
unsigned long size; |
|
|
|
if (port->flags & UPF_IOREMAP) { |
|
iounmap(port->membase); |
|
port->membase = NULL; |
|
} |
|
|
|
size = siu_port_size(port); |
|
release_mem_region(port->mapbase, size); |
|
} |
|
|
|
static int siu_request_port(struct uart_port *port) |
|
{ |
|
unsigned long size; |
|
struct resource *res; |
|
|
|
size = siu_port_size(port); |
|
res = request_mem_region(port->mapbase, size, siu_type_name(port)); |
|
if (res == NULL) |
|
return -EBUSY; |
|
|
|
if (port->flags & UPF_IOREMAP) { |
|
port->membase = ioremap(port->mapbase, size); |
|
if (port->membase == NULL) { |
|
release_resource(res); |
|
return -ENOMEM; |
|
} |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static void siu_config_port(struct uart_port *port, int flags) |
|
{ |
|
if (flags & UART_CONFIG_TYPE) { |
|
port->type = siu_check_type(port); |
|
(void)siu_request_port(port); |
|
} |
|
} |
|
|
|
static int siu_verify_port(struct uart_port *port, struct serial_struct *serial) |
|
{ |
|
if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU) |
|
return -EINVAL; |
|
if (port->irq != serial->irq) |
|
return -EINVAL; |
|
if (port->iotype != serial->io_type) |
|
return -EINVAL; |
|
if (port->mapbase != (unsigned long)serial->iomem_base) |
|
return -EINVAL; |
|
|
|
return 0; |
|
} |
|
|
|
static const struct uart_ops siu_uart_ops = { |
|
.tx_empty = siu_tx_empty, |
|
.set_mctrl = siu_set_mctrl, |
|
.get_mctrl = siu_get_mctrl, |
|
.stop_tx = siu_stop_tx, |
|
.start_tx = siu_start_tx, |
|
.stop_rx = siu_stop_rx, |
|
.enable_ms = siu_enable_ms, |
|
.break_ctl = siu_break_ctl, |
|
.startup = siu_startup, |
|
.shutdown = siu_shutdown, |
|
.set_termios = siu_set_termios, |
|
.pm = siu_pm, |
|
.type = siu_type, |
|
.release_port = siu_release_port, |
|
.request_port = siu_request_port, |
|
.config_port = siu_config_port, |
|
.verify_port = siu_verify_port, |
|
}; |
|
|
|
static int siu_init_ports(struct platform_device *pdev) |
|
{ |
|
struct uart_port *port; |
|
struct resource *res; |
|
int *type = dev_get_platdata(&pdev->dev); |
|
int i; |
|
|
|
if (!type) |
|
return 0; |
|
|
|
port = siu_uart_ports; |
|
for (i = 0; i < SIU_PORTS_MAX; i++) { |
|
port->type = type[i]; |
|
if (port->type == PORT_UNKNOWN) |
|
continue; |
|
port->irq = platform_get_irq(pdev, i); |
|
port->uartclk = SIU_BAUD_BASE * 16; |
|
port->fifosize = 16; |
|
port->regshift = 0; |
|
port->iotype = UPIO_MEM; |
|
port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; |
|
port->line = i; |
|
res = platform_get_resource(pdev, IORESOURCE_MEM, i); |
|
port->mapbase = res->start; |
|
port++; |
|
} |
|
|
|
return i; |
|
} |
|
|
|
#ifdef CONFIG_SERIAL_VR41XX_CONSOLE |
|
|
|
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) |
|
|
|
static void wait_for_xmitr(struct uart_port *port) |
|
{ |
|
int timeout = 10000; |
|
uint8_t lsr, msr; |
|
|
|
do { |
|
lsr = siu_read(port, UART_LSR); |
|
if (lsr & UART_LSR_BI) |
|
lsr_break_flag[port->line] = UART_LSR_BI; |
|
|
|
if ((lsr & BOTH_EMPTY) == BOTH_EMPTY) |
|
break; |
|
} while (timeout-- > 0); |
|
|
|
if (port->flags & UPF_CONS_FLOW) { |
|
timeout = 1000000; |
|
|
|
do { |
|
msr = siu_read(port, UART_MSR); |
|
if ((msr & UART_MSR_CTS) != 0) |
|
break; |
|
} while (timeout-- > 0); |
|
} |
|
} |
|
|
|
static void siu_console_putchar(struct uart_port *port, int ch) |
|
{ |
|
wait_for_xmitr(port); |
|
siu_write(port, UART_TX, ch); |
|
} |
|
|
|
static void siu_console_write(struct console *con, const char *s, unsigned count) |
|
{ |
|
struct uart_port *port; |
|
uint8_t ier; |
|
|
|
port = &siu_uart_ports[con->index]; |
|
|
|
ier = siu_read(port, UART_IER); |
|
siu_write(port, UART_IER, 0); |
|
|
|
uart_console_write(port, s, count, siu_console_putchar); |
|
|
|
wait_for_xmitr(port); |
|
siu_write(port, UART_IER, ier); |
|
} |
|
|
|
static int __init siu_console_setup(struct console *con, char *options) |
|
{ |
|
struct uart_port *port; |
|
int baud = 9600; |
|
int parity = 'n'; |
|
int bits = 8; |
|
int flow = 'n'; |
|
|
|
if (con->index >= SIU_PORTS_MAX) |
|
con->index = 0; |
|
|
|
port = &siu_uart_ports[con->index]; |
|
if (port->membase == NULL) { |
|
if (port->mapbase == 0) |
|
return -ENODEV; |
|
port->membase = ioremap(port->mapbase, siu_port_size(port)); |
|
} |
|
|
|
if (port->type == PORT_VR41XX_SIU) |
|
vr41xx_select_siu_interface(SIU_INTERFACE_RS232C); |
|
|
|
if (options != NULL) |
|
uart_parse_options(options, &baud, &parity, &bits, &flow); |
|
|
|
return uart_set_options(port, con, baud, parity, bits, flow); |
|
} |
|
|
|
static struct uart_driver siu_uart_driver; |
|
|
|
static struct console siu_console = { |
|
.name = "ttyVR", |
|
.write = siu_console_write, |
|
.device = uart_console_device, |
|
.setup = siu_console_setup, |
|
.flags = CON_PRINTBUFFER, |
|
.index = -1, |
|
.data = &siu_uart_driver, |
|
}; |
|
|
|
static int siu_console_init(void) |
|
{ |
|
struct uart_port *port; |
|
int i; |
|
|
|
for (i = 0; i < SIU_PORTS_MAX; i++) { |
|
port = &siu_uart_ports[i]; |
|
port->ops = &siu_uart_ops; |
|
} |
|
|
|
register_console(&siu_console); |
|
|
|
return 0; |
|
} |
|
|
|
console_initcall(siu_console_init); |
|
|
|
void __init vr41xx_siu_early_setup(struct uart_port *port) |
|
{ |
|
if (port->type == PORT_UNKNOWN) |
|
return; |
|
|
|
siu_uart_ports[port->line].line = port->line; |
|
siu_uart_ports[port->line].type = port->type; |
|
siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16; |
|
siu_uart_ports[port->line].mapbase = port->mapbase; |
|
siu_uart_ports[port->line].ops = &siu_uart_ops; |
|
} |
|
|
|
#define SERIAL_VR41XX_CONSOLE &siu_console |
|
#else |
|
#define SERIAL_VR41XX_CONSOLE NULL |
|
#endif |
|
|
|
static struct uart_driver siu_uart_driver = { |
|
.owner = THIS_MODULE, |
|
.driver_name = "SIU", |
|
.dev_name = "ttyVR", |
|
.major = SIU_MAJOR, |
|
.minor = SIU_MINOR_BASE, |
|
.cons = SERIAL_VR41XX_CONSOLE, |
|
}; |
|
|
|
static int siu_probe(struct platform_device *dev) |
|
{ |
|
struct uart_port *port; |
|
int num, i, retval; |
|
|
|
num = siu_init_ports(dev); |
|
if (num <= 0) |
|
return -ENODEV; |
|
|
|
siu_uart_driver.nr = num; |
|
retval = uart_register_driver(&siu_uart_driver); |
|
if (retval) |
|
return retval; |
|
|
|
for (i = 0; i < num; i++) { |
|
port = &siu_uart_ports[i]; |
|
port->ops = &siu_uart_ops; |
|
port->dev = &dev->dev; |
|
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_VR41XX_CONSOLE); |
|
|
|
retval = uart_add_one_port(&siu_uart_driver, port); |
|
if (retval < 0) { |
|
port->dev = NULL; |
|
break; |
|
} |
|
} |
|
|
|
if (i == 0 && retval < 0) { |
|
uart_unregister_driver(&siu_uart_driver); |
|
return retval; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int siu_remove(struct platform_device *dev) |
|
{ |
|
struct uart_port *port; |
|
int i; |
|
|
|
for (i = 0; i < siu_uart_driver.nr; i++) { |
|
port = &siu_uart_ports[i]; |
|
if (port->dev == &dev->dev) { |
|
uart_remove_one_port(&siu_uart_driver, port); |
|
port->dev = NULL; |
|
} |
|
} |
|
|
|
uart_unregister_driver(&siu_uart_driver); |
|
|
|
return 0; |
|
} |
|
|
|
static int siu_suspend(struct platform_device *dev, pm_message_t state) |
|
{ |
|
struct uart_port *port; |
|
int i; |
|
|
|
for (i = 0; i < siu_uart_driver.nr; i++) { |
|
port = &siu_uart_ports[i]; |
|
if ((port->type == PORT_VR41XX_SIU || |
|
port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev) |
|
uart_suspend_port(&siu_uart_driver, port); |
|
|
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int siu_resume(struct platform_device *dev) |
|
{ |
|
struct uart_port *port; |
|
int i; |
|
|
|
for (i = 0; i < siu_uart_driver.nr; i++) { |
|
port = &siu_uart_ports[i]; |
|
if ((port->type == PORT_VR41XX_SIU || |
|
port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev) |
|
uart_resume_port(&siu_uart_driver, port); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static struct platform_driver siu_device_driver = { |
|
.probe = siu_probe, |
|
.remove = siu_remove, |
|
.suspend = siu_suspend, |
|
.resume = siu_resume, |
|
.driver = { |
|
.name = "SIU", |
|
}, |
|
}; |
|
|
|
module_platform_driver(siu_device_driver); |
|
|
|
MODULE_LICENSE("GPL"); |
|
MODULE_ALIAS("platform:SIU");
|
|
|