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409 lines
12 KiB
409 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* Copyright (c) 2018, Broadcom */ |
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/* |
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* This module contains USB PHY initialization for power up and S3 resume |
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* for newer Synopsys based USB hardware first used on the bcm7216. |
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*/ |
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#include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/soc/brcmstb/brcmstb.h> |
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#include "phy-brcm-usb-init.h" |
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#define PHY_LOCK_TIMEOUT_MS 200 |
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/* Register definitions for syscon piarbctl registers */ |
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#define PIARBCTL_CAM 0x00 |
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#define PIARBCTL_SPLITTER 0x04 |
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#define PIARBCTL_MISC 0x08 |
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#define PIARBCTL_MISC_SECURE_MASK 0x80000000 |
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#define PIARBCTL_MISC_USB_SELECT_MASK 0x40000000 |
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#define PIARBCTL_MISC_USB_4G_SDRAM_MASK 0x20000000 |
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#define PIARBCTL_MISC_USB_PRIORITY_MASK 0x000f0000 |
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#define PIARBCTL_MISC_USB_MEM_PAGE_MASK 0x0000f000 |
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#define PIARBCTL_MISC_CAM1_MEM_PAGE_MASK 0x00000f00 |
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#define PIARBCTL_MISC_CAM0_MEM_PAGE_MASK 0x000000f0 |
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#define PIARBCTL_MISC_SATA_PRIORITY_MASK 0x0000000f |
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#define PIARBCTL_MISC_USB_ONLY_MASK \ |
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(PIARBCTL_MISC_USB_SELECT_MASK | \ |
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PIARBCTL_MISC_USB_4G_SDRAM_MASK | \ |
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PIARBCTL_MISC_USB_PRIORITY_MASK | \ |
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PIARBCTL_MISC_USB_MEM_PAGE_MASK) |
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/* Register definitions for the USB CTRL block */ |
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#define USB_CTRL_SETUP 0x00 |
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#define USB_CTRL_SETUP_STRAP_IPP_SEL_MASK 0x02000000 |
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#define USB_CTRL_SETUP_SCB2_EN_MASK 0x00008000 |
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#define USB_CTRL_SETUP_tca_drv_sel_MASK 0x01000000 |
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#define USB_CTRL_SETUP_SCB1_EN_MASK 0x00004000 |
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#define USB_CTRL_SETUP_SOFT_SHUTDOWN_MASK 0x00000200 |
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#define USB_CTRL_SETUP_IPP_MASK 0x00000020 |
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#define USB_CTRL_SETUP_IOC_MASK 0x00000010 |
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#define USB_CTRL_USB_PM 0x04 |
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#define USB_CTRL_USB_PM_USB_PWRDN_MASK 0x80000000 |
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#define USB_CTRL_USB_PM_SOFT_RESET_MASK 0x40000000 |
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#define USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK 0x00800000 |
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#define USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK 0x00400000 |
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#define USB_CTRL_USB_PM_STATUS 0x08 |
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#define USB_CTRL_USB_DEVICE_CTL1 0x10 |
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#define USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK 0x00000003 |
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#define USB_CTRL_TEST_PORT_CTL 0x30 |
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#define USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_MASK 0x000000ff |
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#define USB_CTRL_TEST_PORT_CTL_TPOUT_SEL_PME_GEN_MASK 0x0000002e |
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#define USB_CTRL_TP_DIAG1 0x34 |
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#define USB_CTLR_TP_DIAG1_wake_MASK 0x00000002 |
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#define USB_CTRL_CTLR_CSHCR 0x50 |
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#define USB_CTRL_CTLR_CSHCR_ctl_pme_en_MASK 0x00040000 |
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/* Register definitions for the USB_PHY block in 7211b0 */ |
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#define USB_PHY_PLL_CTL 0x00 |
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#define USB_PHY_PLL_CTL_PLL_RESETB_MASK 0x40000000 |
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#define USB_PHY_PLL_LDO_CTL 0x08 |
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#define USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK 0x00000004 |
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#define USB_PHY_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK 0x00000002 |
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#define USB_PHY_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK 0x00000001 |
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#define USB_PHY_UTMI_CTL_1 0x04 |
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#define USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 |
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#define USB_PHY_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c |
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#define USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT 2 |
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#define USB_PHY_IDDQ 0x1c |
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#define USB_PHY_IDDQ_phy_iddq_MASK 0x00000001 |
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#define USB_PHY_STATUS 0x20 |
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#define USB_PHY_STATUS_pll_lock_MASK 0x00000001 |
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/* Register definitions for the MDIO registers in the DWC2 block of |
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* the 7211b0. |
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* NOTE: The PHY's MDIO registers are only accessible through the |
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* legacy DesignWare USB controller even though it's not being used. |
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*/ |
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#define USB_GMDIOCSR 0 |
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#define USB_GMDIOGEN 4 |
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/* Register definitions for the BDC EC block in 7211b0 */ |
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#define BDC_EC_AXIRDA 0x0c |
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#define BDC_EC_AXIRDA_RTS_MASK 0xf0000000 |
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#define BDC_EC_AXIRDA_RTS_SHIFT 28 |
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static void usb_mdio_write_7211b0(struct brcm_usb_init_params *params, |
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uint8_t addr, uint16_t data) |
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{ |
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void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO]; |
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addr &= 0x1f; /* 5-bit address */ |
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brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN); |
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while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) |
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; |
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brcm_usb_writel(0x59020000 | (addr << 18) | data, |
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usb_mdio + USB_GMDIOGEN); |
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while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) |
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; |
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brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN); |
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while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) |
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; |
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} |
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static uint16_t __maybe_unused usb_mdio_read_7211b0( |
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struct brcm_usb_init_params *params, uint8_t addr) |
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{ |
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void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO]; |
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addr &= 0x1f; /* 5-bit address */ |
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brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN); |
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while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) |
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; |
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brcm_usb_writel(0x69020000 | (addr << 18), usb_mdio + USB_GMDIOGEN); |
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while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) |
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; |
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brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN); |
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while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) |
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; |
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return brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & 0xffff; |
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} |
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static void usb2_eye_fix_7211b0(struct brcm_usb_init_params *params) |
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{ |
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/* select bank */ |
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usb_mdio_write_7211b0(params, 0x1f, 0x80a0); |
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/* Set the eye */ |
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usb_mdio_write_7211b0(params, 0x0a, 0xc6a0); |
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} |
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static void xhci_soft_reset(struct brcm_usb_init_params *params, |
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int on_off) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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/* Assert reset */ |
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if (on_off) |
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USB_CTRL_UNSET(ctrl, USB_PM, XHC_SOFT_RESETB); |
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/* De-assert reset */ |
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else |
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USB_CTRL_SET(ctrl, USB_PM, XHC_SOFT_RESETB); |
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} |
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static void usb_init_ipp(struct brcm_usb_init_params *params) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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u32 reg; |
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u32 orig_reg; |
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pr_debug("%s\n", __func__); |
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orig_reg = reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP)); |
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if (params->ipp != 2) |
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/* override ipp strap pin (if it exits) */ |
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reg &= ~(USB_CTRL_MASK(SETUP, STRAP_IPP_SEL)); |
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/* Override the default OC and PP polarity */ |
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reg &= ~(USB_CTRL_MASK(SETUP, IPP) | USB_CTRL_MASK(SETUP, IOC)); |
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if (params->ioc) |
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reg |= USB_CTRL_MASK(SETUP, IOC); |
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if (params->ipp == 1) |
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reg |= USB_CTRL_MASK(SETUP, IPP); |
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brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP)); |
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/* |
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* If we're changing IPP, make sure power is off long enough |
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* to turn off any connected devices. |
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*/ |
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if ((reg ^ orig_reg) & USB_CTRL_MASK(SETUP, IPP)) |
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msleep(50); |
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} |
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static void syscon_piarbctl_init(struct regmap *rmap) |
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{ |
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/* Switch from legacy USB OTG controller to new STB USB controller */ |
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regmap_update_bits(rmap, PIARBCTL_MISC, PIARBCTL_MISC_USB_ONLY_MASK, |
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PIARBCTL_MISC_USB_SELECT_MASK | |
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PIARBCTL_MISC_USB_4G_SDRAM_MASK); |
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} |
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static void usb_init_common(struct brcm_usb_init_params *params) |
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{ |
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u32 reg; |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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pr_debug("%s\n", __func__); |
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USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN); |
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/* 1 millisecond - for USB clocks to settle down */ |
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usleep_range(1000, 2000); |
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if (USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE)) { |
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reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); |
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reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE); |
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reg |= params->mode; |
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brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); |
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} |
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switch (params->mode) { |
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case USB_CTLR_MODE_HOST: |
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USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB); |
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break; |
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default: |
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USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB); |
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USB_CTRL_SET(ctrl, USB_PM, BDC_SOFT_RESETB); |
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break; |
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} |
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} |
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static void usb_wake_enable_7211b0(struct brcm_usb_init_params *params, |
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bool enable) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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if (enable) |
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USB_CTRL_SET(ctrl, CTLR_CSHCR, ctl_pme_en); |
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else |
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USB_CTRL_UNSET(ctrl, CTLR_CSHCR, ctl_pme_en); |
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} |
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static void usb_init_common_7211b0(struct brcm_usb_init_params *params) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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void __iomem *usb_phy = params->regs[BRCM_REGS_USB_PHY]; |
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void __iomem *bdc_ec = params->regs[BRCM_REGS_BDC_EC]; |
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int timeout_ms = PHY_LOCK_TIMEOUT_MS; |
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u32 reg; |
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if (params->syscon_piarbctl) |
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syscon_piarbctl_init(params->syscon_piarbctl); |
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USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN); |
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usb_wake_enable_7211b0(params, false); |
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if (!params->wake_enabled) { |
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/* undo possible suspend settings */ |
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brcm_usb_writel(0, usb_phy + USB_PHY_IDDQ); |
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reg = brcm_usb_readl(usb_phy + USB_PHY_PLL_CTL); |
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reg |= USB_PHY_PLL_CTL_PLL_RESETB_MASK; |
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brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_CTL); |
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/* temporarily enable FSM so PHY comes up properly */ |
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reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1); |
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reg |= USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK; |
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brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1); |
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} |
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/* Init the PHY */ |
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reg = USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK | |
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USB_PHY_PLL_LDO_CTL_AFE_LDO_PWRDWNB_MASK | |
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USB_PHY_PLL_LDO_CTL_AFE_BG_PWRDWNB_MASK; |
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brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_LDO_CTL); |
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/* wait for lock */ |
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while (timeout_ms-- > 0) { |
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reg = brcm_usb_readl(usb_phy + USB_PHY_STATUS); |
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if (reg & USB_PHY_STATUS_pll_lock_MASK) |
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break; |
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usleep_range(1000, 2000); |
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} |
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/* Set the PHY_MODE */ |
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reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1); |
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reg &= ~USB_PHY_UTMI_CTL_1_PHY_MODE_MASK; |
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reg |= params->mode << USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT; |
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brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1); |
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usb_init_common(params); |
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/* |
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* The BDC controller will get occasional failures with |
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* the default "Read Transaction Size" of 6 (1024 bytes). |
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* Set it to 4 (256 bytes). |
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*/ |
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if ((params->mode != USB_CTLR_MODE_HOST) && bdc_ec) { |
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reg = brcm_usb_readl(bdc_ec + BDC_EC_AXIRDA); |
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reg &= ~BDC_EC_AXIRDA_RTS_MASK; |
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reg |= (0x4 << BDC_EC_AXIRDA_RTS_SHIFT); |
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brcm_usb_writel(reg, bdc_ec + BDC_EC_AXIRDA); |
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} |
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/* |
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* Disable FSM, otherwise the PHY will auto suspend when no |
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* device is connected and will be reset on resume. |
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*/ |
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reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1); |
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reg &= ~USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK; |
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brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1); |
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usb2_eye_fix_7211b0(params); |
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} |
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static void usb_init_xhci(struct brcm_usb_init_params *params) |
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{ |
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pr_debug("%s\n", __func__); |
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xhci_soft_reset(params, 0); |
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} |
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static void usb_uninit_common(struct brcm_usb_init_params *params) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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pr_debug("%s\n", __func__); |
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USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN); |
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} |
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static void usb_uninit_common_7211b0(struct brcm_usb_init_params *params) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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void __iomem *usb_phy = params->regs[BRCM_REGS_USB_PHY]; |
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u32 reg; |
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pr_debug("%s\n", __func__); |
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if (params->wake_enabled) { |
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USB_CTRL_SET(ctrl, TEST_PORT_CTL, TPOUT_SEL_PME_GEN); |
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usb_wake_enable_7211b0(params, true); |
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} else { |
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USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN); |
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brcm_usb_writel(0, usb_phy + USB_PHY_PLL_LDO_CTL); |
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reg = brcm_usb_readl(usb_phy + USB_PHY_PLL_CTL); |
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reg &= ~USB_PHY_PLL_CTL_PLL_RESETB_MASK; |
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brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_CTL); |
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brcm_usb_writel(USB_PHY_IDDQ_phy_iddq_MASK, |
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usb_phy + USB_PHY_IDDQ); |
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} |
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} |
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static void usb_uninit_xhci(struct brcm_usb_init_params *params) |
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{ |
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pr_debug("%s\n", __func__); |
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if (!params->wake_enabled) |
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xhci_soft_reset(params, 1); |
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} |
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static int usb_get_dual_select(struct brcm_usb_init_params *params) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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u32 reg = 0; |
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pr_debug("%s\n", __func__); |
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reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); |
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reg &= USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE); |
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return reg; |
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} |
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static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode) |
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{ |
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void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; |
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u32 reg; |
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pr_debug("%s\n", __func__); |
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reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); |
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reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE); |
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reg |= mode; |
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brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); |
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} |
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static const struct brcm_usb_init_ops bcm7216_ops = { |
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.init_ipp = usb_init_ipp, |
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.init_common = usb_init_common, |
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.init_xhci = usb_init_xhci, |
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.uninit_common = usb_uninit_common, |
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.uninit_xhci = usb_uninit_xhci, |
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.get_dual_select = usb_get_dual_select, |
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.set_dual_select = usb_set_dual_select, |
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}; |
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static const struct brcm_usb_init_ops bcm7211b0_ops = { |
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.init_ipp = usb_init_ipp, |
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.init_common = usb_init_common_7211b0, |
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.init_xhci = usb_init_xhci, |
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.uninit_common = usb_uninit_common_7211b0, |
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.uninit_xhci = usb_uninit_xhci, |
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.get_dual_select = usb_get_dual_select, |
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.set_dual_select = usb_set_dual_select, |
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}; |
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void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params) |
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{ |
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pr_debug("%s\n", __func__); |
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params->family_name = "7216"; |
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params->ops = &bcm7216_ops; |
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} |
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void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params) |
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{ |
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pr_debug("%s\n", __func__); |
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params->family_name = "7211"; |
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params->ops = &bcm7211b0_ops; |
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params->suspend_with_clocks = true; |
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}
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