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397 lines
9.0 KiB
397 lines
9.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// Copyright (c) 2018, The Linux Foundation. All rights reserved. |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/err.h> |
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#include <linux/io.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/clk.h> |
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#include <linux/clk-provider.h> |
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#include <linux/slab.h> |
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#include "clk-krait.h" |
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static unsigned int sec_mux_map[] = { |
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2, |
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0, |
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}; |
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static unsigned int pri_mux_map[] = { |
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1, |
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2, |
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0, |
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}; |
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/* |
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* Notifier function for switching the muxes to safe parent |
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* while the hfpll is getting reprogrammed. |
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*/ |
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static int krait_notifier_cb(struct notifier_block *nb, |
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unsigned long event, |
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void *data) |
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{ |
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int ret = 0; |
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struct krait_mux_clk *mux = container_of(nb, struct krait_mux_clk, |
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clk_nb); |
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/* Switch to safe parent */ |
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if (event == PRE_RATE_CHANGE) { |
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mux->old_index = krait_mux_clk_ops.get_parent(&mux->hw); |
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ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel); |
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mux->reparent = false; |
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/* |
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* By the time POST_RATE_CHANGE notifier is called, |
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* clk framework itself would have changed the parent for the new rate. |
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* Only otherwise, put back to the old parent. |
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*/ |
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} else if (event == POST_RATE_CHANGE) { |
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if (!mux->reparent) |
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ret = krait_mux_clk_ops.set_parent(&mux->hw, |
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mux->old_index); |
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} |
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return notifier_from_errno(ret); |
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} |
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static int krait_notifier_register(struct device *dev, struct clk *clk, |
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struct krait_mux_clk *mux) |
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{ |
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int ret = 0; |
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mux->clk_nb.notifier_call = krait_notifier_cb; |
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ret = clk_notifier_register(clk, &mux->clk_nb); |
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if (ret) |
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dev_err(dev, "failed to register clock notifier: %d\n", ret); |
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return ret; |
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} |
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static int |
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krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) |
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{ |
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struct krait_div2_clk *div; |
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struct clk_init_data init = { |
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.num_parents = 1, |
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.ops = &krait_div2_clk_ops, |
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.flags = CLK_SET_RATE_PARENT, |
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}; |
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const char *p_names[1]; |
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struct clk *clk; |
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div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); |
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if (!div) |
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return -ENOMEM; |
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div->width = 2; |
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div->shift = 6; |
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div->lpl = id >= 0; |
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div->offset = offset; |
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div->hw.init = &init; |
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init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); |
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if (!init.name) |
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return -ENOMEM; |
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init.parent_names = p_names; |
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p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); |
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if (!p_names[0]) { |
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kfree(init.name); |
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return -ENOMEM; |
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} |
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clk = devm_clk_register(dev, &div->hw); |
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kfree(p_names[0]); |
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kfree(init.name); |
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return PTR_ERR_OR_ZERO(clk); |
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} |
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static int |
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krait_add_sec_mux(struct device *dev, int id, const char *s, |
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unsigned int offset, bool unique_aux) |
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{ |
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int ret; |
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struct krait_mux_clk *mux; |
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static const char *sec_mux_list[] = { |
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"acpu_aux", |
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"qsb", |
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}; |
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struct clk_init_data init = { |
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.parent_names = sec_mux_list, |
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.num_parents = ARRAY_SIZE(sec_mux_list), |
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.ops = &krait_mux_clk_ops, |
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.flags = CLK_SET_RATE_PARENT, |
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}; |
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struct clk *clk; |
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mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); |
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if (!mux) |
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return -ENOMEM; |
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mux->offset = offset; |
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mux->lpl = id >= 0; |
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mux->mask = 0x3; |
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mux->shift = 2; |
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mux->parent_map = sec_mux_map; |
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mux->hw.init = &init; |
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mux->safe_sel = 0; |
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init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); |
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if (!init.name) |
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return -ENOMEM; |
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if (unique_aux) { |
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sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); |
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if (!sec_mux_list[0]) { |
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clk = ERR_PTR(-ENOMEM); |
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goto err_aux; |
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} |
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} |
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clk = devm_clk_register(dev, &mux->hw); |
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ret = krait_notifier_register(dev, clk, mux); |
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if (ret) |
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goto unique_aux; |
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unique_aux: |
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if (unique_aux) |
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kfree(sec_mux_list[0]); |
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err_aux: |
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kfree(init.name); |
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return PTR_ERR_OR_ZERO(clk); |
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} |
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static struct clk * |
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krait_add_pri_mux(struct device *dev, int id, const char *s, |
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unsigned int offset) |
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{ |
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int ret; |
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struct krait_mux_clk *mux; |
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const char *p_names[3]; |
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struct clk_init_data init = { |
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.parent_names = p_names, |
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.num_parents = ARRAY_SIZE(p_names), |
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.ops = &krait_mux_clk_ops, |
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.flags = CLK_SET_RATE_PARENT, |
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}; |
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struct clk *clk; |
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mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); |
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if (!mux) |
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return ERR_PTR(-ENOMEM); |
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mux->mask = 0x3; |
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mux->shift = 0; |
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mux->offset = offset; |
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mux->lpl = id >= 0; |
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mux->parent_map = pri_mux_map; |
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mux->hw.init = &init; |
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mux->safe_sel = 2; |
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init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s); |
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if (!init.name) |
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return ERR_PTR(-ENOMEM); |
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p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); |
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if (!p_names[0]) { |
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clk = ERR_PTR(-ENOMEM); |
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goto err_p0; |
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} |
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p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); |
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if (!p_names[1]) { |
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clk = ERR_PTR(-ENOMEM); |
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goto err_p1; |
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} |
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p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); |
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if (!p_names[2]) { |
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clk = ERR_PTR(-ENOMEM); |
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goto err_p2; |
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} |
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clk = devm_clk_register(dev, &mux->hw); |
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ret = krait_notifier_register(dev, clk, mux); |
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if (ret) |
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goto err_p3; |
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err_p3: |
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kfree(p_names[2]); |
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err_p2: |
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kfree(p_names[1]); |
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err_p1: |
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kfree(p_names[0]); |
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err_p0: |
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kfree(init.name); |
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return clk; |
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} |
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/* id < 0 for L2, otherwise id == physical CPU number */ |
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static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) |
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{ |
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int ret; |
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unsigned int offset; |
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void *p = NULL; |
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const char *s; |
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struct clk *clk; |
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if (id >= 0) { |
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offset = 0x4501 + (0x1000 * id); |
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s = p = kasprintf(GFP_KERNEL, "%d", id); |
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if (!s) |
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return ERR_PTR(-ENOMEM); |
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} else { |
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offset = 0x500; |
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s = "_l2"; |
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} |
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ret = krait_add_div(dev, id, s, offset); |
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if (ret) { |
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clk = ERR_PTR(ret); |
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goto err; |
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} |
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ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); |
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if (ret) { |
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clk = ERR_PTR(ret); |
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goto err; |
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} |
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clk = krait_add_pri_mux(dev, id, s, offset); |
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err: |
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kfree(p); |
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return clk; |
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} |
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static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) |
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{ |
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unsigned int idx = clkspec->args[0]; |
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struct clk **clks = data; |
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if (idx >= 5) { |
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pr_err("%s: invalid clock index %d\n", __func__, idx); |
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return ERR_PTR(-EINVAL); |
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} |
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return clks[idx] ? : ERR_PTR(-ENODEV); |
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} |
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static const struct of_device_id krait_cc_match_table[] = { |
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{ .compatible = "qcom,krait-cc-v1", (void *)1UL }, |
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{ .compatible = "qcom,krait-cc-v2" }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, krait_cc_match_table); |
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static int krait_cc_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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const struct of_device_id *id; |
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unsigned long cur_rate, aux_rate; |
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int cpu; |
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struct clk *clk; |
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struct clk **clks; |
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struct clk *l2_pri_mux_clk; |
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id = of_match_device(krait_cc_match_table, dev); |
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if (!id) |
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return -ENODEV; |
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/* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */ |
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clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); |
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if (IS_ERR(clk)) |
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return PTR_ERR(clk); |
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if (!id->data) { |
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clk = clk_register_fixed_factor(dev, "acpu_aux", |
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"gpll0_vote", 0, 1, 2); |
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if (IS_ERR(clk)) |
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return PTR_ERR(clk); |
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} |
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/* Krait configurations have at most 4 CPUs and one L2 */ |
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clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL); |
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if (!clks) |
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return -ENOMEM; |
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for_each_possible_cpu(cpu) { |
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clk = krait_add_clks(dev, cpu, id->data); |
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if (IS_ERR(clk)) |
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return PTR_ERR(clk); |
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clks[cpu] = clk; |
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} |
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l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); |
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if (IS_ERR(l2_pri_mux_clk)) |
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return PTR_ERR(l2_pri_mux_clk); |
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clks[4] = l2_pri_mux_clk; |
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/* |
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* We don't want the CPU or L2 clocks to be turned off at late init |
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* if CPUFREQ or HOTPLUG configs are disabled. So, bump up the |
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* refcount of these clocks. Any cpufreq/hotplug manager can assume |
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* that the clocks have already been prepared and enabled by the time |
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* they take over. |
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*/ |
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for_each_online_cpu(cpu) { |
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clk_prepare_enable(l2_pri_mux_clk); |
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WARN(clk_prepare_enable(clks[cpu]), |
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"Unable to turn on CPU%d clock", cpu); |
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} |
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/* |
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* Force reinit of HFPLLs and muxes to overwrite any potential |
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* incorrect configuration of HFPLLs and muxes by the bootloader. |
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* While at it, also make sure the cores are running at known rates |
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* and print the current rate. |
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* |
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* The clocks are set to aux clock rate first to make sure the |
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* secondary mux is not sourcing off of QSB. The rate is then set to |
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* two different rates to force a HFPLL reinit under all |
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* circumstances. |
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*/ |
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cur_rate = clk_get_rate(l2_pri_mux_clk); |
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aux_rate = 384000000; |
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if (cur_rate == 1) { |
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pr_info("L2 @ QSB rate. Forcing new rate.\n"); |
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cur_rate = aux_rate; |
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} |
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clk_set_rate(l2_pri_mux_clk, aux_rate); |
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clk_set_rate(l2_pri_mux_clk, 2); |
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clk_set_rate(l2_pri_mux_clk, cur_rate); |
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pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); |
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for_each_possible_cpu(cpu) { |
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clk = clks[cpu]; |
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cur_rate = clk_get_rate(clk); |
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if (cur_rate == 1) { |
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pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); |
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cur_rate = aux_rate; |
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} |
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clk_set_rate(clk, aux_rate); |
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clk_set_rate(clk, 2); |
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clk_set_rate(clk, cur_rate); |
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pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); |
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} |
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of_clk_add_provider(dev->of_node, krait_of_get, clks); |
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return 0; |
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} |
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static struct platform_driver krait_cc_driver = { |
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.probe = krait_cc_probe, |
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.driver = { |
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.name = "krait-cc", |
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.of_match_table = krait_cc_match_table, |
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}, |
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}; |
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module_platform_driver(krait_cc_driver); |
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MODULE_DESCRIPTION("Krait CPU Clock Driver"); |
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MODULE_LICENSE("GPL v2"); |
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MODULE_ALIAS("platform:krait-cc");
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