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57 lines
1.5 KiB
57 lines
1.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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// |
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// Copyright (c) 2021 MediaTek Inc. |
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// Author: Chun-Jie Chen <[email protected]> |
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#include <linux/clk-provider.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include "clk-mtk.h" |
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#include "clk-gate.h" |
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#include <dt-bindings/clock/mt8192-clk.h> |
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static const struct mtk_gate_regs ipe_cg_regs = { |
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.set_ofs = 0x4, |
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.clr_ofs = 0x8, |
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.sta_ofs = 0x0, |
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}; |
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#define GATE_IPE(_id, _name, _parent, _shift) \ |
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GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_setclr) |
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static const struct mtk_gate ipe_clks[] = { |
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GATE_IPE(CLK_IPE_LARB19, "ipe_larb19", "ipe_sel", 0), |
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GATE_IPE(CLK_IPE_LARB20, "ipe_larb20", "ipe_sel", 1), |
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GATE_IPE(CLK_IPE_SMI_SUBCOM, "ipe_smi_subcom", "ipe_sel", 2), |
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GATE_IPE(CLK_IPE_FD, "ipe_fd", "ipe_sel", 3), |
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GATE_IPE(CLK_IPE_FE, "ipe_fe", "ipe_sel", 4), |
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GATE_IPE(CLK_IPE_RSC, "ipe_rsc", "ipe_sel", 5), |
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GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "ipe_sel", 6), |
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GATE_IPE(CLK_IPE_GALS, "ipe_gals", "ipe_sel", 8), |
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}; |
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static const struct mtk_clk_desc ipe_desc = { |
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.clks = ipe_clks, |
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.num_clks = ARRAY_SIZE(ipe_clks), |
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}; |
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static const struct of_device_id of_match_clk_mt8192_ipe[] = { |
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{ |
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.compatible = "mediatek,mt8192-ipesys", |
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.data = &ipe_desc, |
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}, { |
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/* sentinel */ |
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} |
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}; |
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static struct platform_driver clk_mt8192_ipe_drv = { |
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.probe = mtk_clk_simple_probe, |
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.driver = { |
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.name = "clk-mt8192-ipe", |
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.of_match_table = of_match_clk_mt8192_ipe, |
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}, |
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}; |
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builtin_platform_driver(clk_mt8192_ipe_drv);
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