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458 lines
7.9 KiB
458 lines
7.9 KiB
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
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/* |
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* Device Tree file for Globalscale MOCHAbin |
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* Copyright (C) 2019 Globalscale technologies, Inc. |
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* Copyright (C) 2021 Sartura Ltd. |
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* |
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*/ |
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/dts-v1/; |
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#include <dt-bindings/gpio/gpio.h> |
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#include "armada-7040.dtsi" |
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/ { |
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model = "Globalscale MOCHAbin"; |
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compatible = "globalscale,mochabin", "marvell,armada7040", |
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"marvell,armada-ap806-quad", "marvell,armada-ap806"; |
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chosen { |
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stdout-path = "serial0:115200n8"; |
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}; |
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aliases { |
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ethernet0 = &cp0_eth0; |
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ethernet1 = &cp0_eth1; |
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ethernet2 = &cp0_eth2; |
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ethernet3 = &swport1; |
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ethernet4 = &swport2; |
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ethernet5 = &swport3; |
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ethernet6 = &swport4; |
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}; |
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/* SFP+ 10G */ |
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sfp_eth0: sfp-eth0 { |
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compatible = "sff,sfp"; |
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i2c-bus = <&cp0_i2c1>; |
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los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>; |
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mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>; |
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tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>; |
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tx-fault-gpio = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>; |
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}; |
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/* SFP 1G */ |
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sfp_eth2: sfp-eth2 { |
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compatible = "sff,sfp"; |
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i2c-bus = <&cp0_i2c0>; |
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los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>; |
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mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>; |
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tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>; |
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tx-fault-gpio = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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/* microUSB UART console */ |
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&uart0 { |
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status = "okay"; |
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pinctrl-0 = <&uart0_pins>; |
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pinctrl-names = "default"; |
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}; |
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/* eMMC */ |
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&ap_sdhci0 { |
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status = "okay"; |
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bus-width = <4>; |
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non-removable; |
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/delete-property/ marvell,xenon-phy-slow-mode; |
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no-1-8-v; |
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}; |
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&cp0_pinctrl { |
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cp0_uart0_pins: cp0-uart0-pins { |
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marvell,pins = "mpp6", "mpp7"; |
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marvell,function = "uart0"; |
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}; |
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cp0_spi0_pins: cp0-spi0-pins { |
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marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59"; |
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marvell,function = "spi0"; |
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}; |
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cp0_spi1_pins: cp0-spi1-pins { |
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marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; |
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marvell,function = "spi1"; |
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}; |
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cp0_i2c0_pins: cp0-i2c0-pins { |
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marvell,pins = "mpp37", "mpp38"; |
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marvell,function = "i2c0"; |
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}; |
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cp0_i2c1_pins: cp0-i2c1-pins { |
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marvell,pins = "mpp2", "mpp3"; |
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marvell,function = "i2c1"; |
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}; |
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pca9554_int_pins: pca9554-int-pins { |
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marvell,pins = "mpp27"; |
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marvell,function = "gpio"; |
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}; |
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cp0_rgmii1_pins: cp0-rgmii1-pins { |
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marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49", |
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"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55"; |
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marvell,function = "ge1"; |
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}; |
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is31_sdb_pins: is31-sdb-pins { |
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marvell,pins = "mpp30"; |
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marvell,function = "gpio"; |
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}; |
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cp0_pcie_reset_pins: cp0-pcie-reset-pins { |
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marvell,pins = "mpp9"; |
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marvell,function = "gpio"; |
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}; |
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cp0_pcie_clkreq_pins: cp0-pcie-clkreq-pins { |
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marvell,pins = "mpp5"; |
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marvell,function = "pcie1"; |
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}; |
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cp0_switch_pins: cp0-switch-pins { |
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marvell,pins = "mpp0", "mpp1"; |
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marvell,function = "gpio"; |
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}; |
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cp0_phy_pins: cp0-phy-pins { |
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marvell,pins = "mpp12"; |
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marvell,function = "gpio"; |
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}; |
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}; |
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/* mikroBUS UART */ |
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&cp0_uart0 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_uart0_pins>; |
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}; |
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/* mikroBUS SPI */ |
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&cp0_spi0 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_spi0_pins>; |
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}; |
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/* SPI-NOR */ |
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&cp0_spi1{ |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_spi1_pins>; |
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spi-flash@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "jedec,spi-nor"; |
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reg = <0>; |
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spi-max-frequency = <20000000>; |
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partitions { |
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compatible = "fixed-partitions"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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partition@0 { |
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label = "firmware"; |
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reg = <0x0 0x3e0000>; |
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read-only; |
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}; |
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partition@3e0000 { |
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label = "hw-info"; |
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reg = <0x3e0000 0x10000>; |
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read-only; |
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}; |
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partition@3f0000 { |
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label = "u-boot-env"; |
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reg = <0x3f0000 0x10000>; |
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}; |
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}; |
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}; |
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}; |
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/* mikroBUS, 1G SFP and GPIO expander */ |
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&cp0_i2c0 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_i2c0_pins>; |
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clock-frequency = <100000>; |
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sfp_gpio: pca9554@39 { |
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compatible = "nxp,pca9554"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pca9554_int_pins>; |
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reg = <0x39>; |
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interrupt-parent = <&cp0_gpio1>; |
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interrupts = <27 IRQ_TYPE_LEVEL_LOW>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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/* |
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* IO0_0: SFP+_TX_FAULT |
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* IO0_1: SFP+_TX_DISABLE |
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* IO0_2: SFP+_PRSNT |
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* IO0_3: SFP+_LOSS |
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* IO0_4: SFP_TX_FAULT |
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* IO0_5: SFP_TX_DISABLE |
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* IO0_6: SFP_PRSNT |
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* IO0_7: SFP_LOSS |
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*/ |
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}; |
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}; |
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/* IS31FL3199, mini-PCIe and 10G SFP+ */ |
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&cp0_i2c1 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_i2c1_pins>; |
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clock-frequency = <100000>; |
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leds@64 { |
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compatible = "issi,is31fl3199"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&is31_sdb_pins>; |
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shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>; |
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reg = <0x64>; |
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led1_red: led@1 { |
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label = "red:led1"; |
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reg = <1>; |
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led-max-microamp = <20000>; |
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}; |
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led1_green: led@2 { |
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label = "green:led1"; |
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reg = <2>; |
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}; |
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led1_blue: led@3 { |
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label = "blue:led1"; |
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reg = <3>; |
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}; |
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led2_red: led@4 { |
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label = "red:led2"; |
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reg = <4>; |
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}; |
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led2_green: led@5 { |
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label = "green:led2"; |
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reg = <5>; |
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}; |
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led2_blue: led@6 { |
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label = "blue:led2"; |
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reg = <6>; |
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}; |
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led3_red: led@7 { |
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label = "red:led3"; |
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reg = <7>; |
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}; |
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led3_green: led@8 { |
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label = "green:led3"; |
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reg = <8>; |
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}; |
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led3_blue: led@9 { |
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label = "blue:led3"; |
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reg = <9>; |
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}; |
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}; |
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}; |
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&cp0_mdio { |
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status = "okay"; |
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/* 88E1512 PHY */ |
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eth2phy: ethernet-phy@1 { |
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reg = <1>; |
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sfp = <&sfp_eth2>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_phy_pins>; |
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reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>; |
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}; |
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/* 88E6141 Topaz switch */ |
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switch: switch@3 { |
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compatible = "marvell,mv88e6085"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <3>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_switch_pins>; |
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reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>; |
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interrupt-parent = <&cp0_gpio1>; |
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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swport1: port@1 { |
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reg = <1>; |
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label = "lan0"; |
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phy-handle = <&swphy1>; |
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}; |
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swport2: port@2 { |
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reg = <2>; |
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label = "lan1"; |
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phy-handle = <&swphy2>; |
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}; |
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swport3: port@3 { |
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reg = <3>; |
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label = "lan2"; |
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phy-handle = <&swphy3>; |
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}; |
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swport4: port@4 { |
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reg = <4>; |
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label = "lan3"; |
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phy-handle = <&swphy4>; |
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}; |
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port@5 { |
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reg = <5>; |
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label = "cpu"; |
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ethernet = <&cp0_eth1>; |
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phy-mode = "2500base-x"; |
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managed = "in-band-status"; |
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}; |
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}; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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swphy1: swphy1@17 { |
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reg = <17>; |
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}; |
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swphy2: swphy2@18 { |
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reg = <18>; |
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}; |
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swphy3: swphy3@19 { |
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reg = <19>; |
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}; |
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swphy4: swphy4@20 { |
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reg = <20>; |
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}; |
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}; |
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}; |
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}; |
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&cp0_ethernet { |
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status = "okay"; |
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}; |
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/* 10G SFP+ */ |
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&cp0_eth0 { |
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status = "okay"; |
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phy-mode = "10gbase-r"; |
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phys = <&cp0_comphy4 0>; |
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managed = "in-band-status"; |
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sfp = <&sfp_eth0>; |
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}; |
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/* Topaz switch uplink */ |
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&cp0_eth1 { |
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status = "okay"; |
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phy-mode = "2500base-x"; |
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phys = <&cp0_comphy0 1>; |
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fixed-link { |
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speed = <2500>; |
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full-duplex; |
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}; |
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}; |
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/* 1G SFP or 1G RJ45 */ |
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&cp0_eth2 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&cp0_rgmii1_pins>; |
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phy = <ð2phy>; |
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phy-mode = "rgmii-id"; |
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}; |
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&cp0_utmi { |
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status = "okay"; |
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}; |
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/* SMSC USB5434B hub */ |
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&cp0_usb3_0 { |
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status = "okay"; |
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phys = <&cp0_comphy1 0>, <&cp0_utmi0>; |
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phy-names = "cp0-usb3h0-comphy", "utmi"; |
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}; |
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/* miniPCI-E USB */ |
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&cp0_usb3_1 { |
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status = "okay"; |
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}; |
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&cp0_sata0 { |
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status = "okay"; |
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/* 7 + 12 SATA connector (J24) */ |
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sata-port@0 { |
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phys = <&cp0_comphy2 0>; |
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phy-names = "cp0-sata0-0-phy"; |
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}; |
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/* M.2-2250 B-key (J39) */ |
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sata-port@1 { |
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phys = <&cp0_comphy3 1>; |
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phy-names = "cp0-sata0-1-phy"; |
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}; |
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}; |
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/* miniPCI-E (J5) */ |
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&cp0_pcie2 { |
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status = "okay"; |
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pinctrl-names = "default", "clkreq"; |
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pinctrl-0 = <&cp0_pcie_reset_pins>; |
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pinctrl-1 = <&cp0_pcie_clkreq_pins>; |
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phys = <&cp0_comphy5 2>; |
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phy-names = "cp0-pcie2-x1-phy"; |
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reset-gpios = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>; |
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};
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