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125 lines
2.9 KiB
125 lines
2.9 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* arch/arm/mach-lpc32xx/common.c |
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* |
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* Author: Kevin Wells <[email protected]> |
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* |
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* Copyright (C) 2010 NXP Semiconductors |
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*/ |
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#include <linux/init.h> |
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#include <linux/soc/nxp/lpc32xx-misc.h> |
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#include <asm/mach/map.h> |
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#include <asm/system_info.h> |
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#include "lpc32xx.h" |
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#include "common.h" |
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/* |
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* Returns the unique ID for the device |
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*/ |
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void lpc32xx_get_uid(u32 devid[4]) |
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{ |
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int i; |
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for (i = 0; i < 4; i++) |
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devid[i] = __raw_readl(LPC32XX_CLKPWR_DEVID(i << 2)); |
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} |
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/* |
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* Detects and returns IRAM size for the device variation |
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*/ |
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#define LPC32XX_IRAM_BANK_SIZE SZ_128K |
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static u32 iram_size; |
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u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr) |
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{ |
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if (iram_size == 0) { |
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u32 savedval1, savedval2; |
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void __iomem *iramptr1, *iramptr2; |
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iramptr1 = io_p2v(LPC32XX_IRAM_BASE); |
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iramptr2 = io_p2v(LPC32XX_IRAM_BASE + LPC32XX_IRAM_BANK_SIZE); |
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savedval1 = __raw_readl(iramptr1); |
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savedval2 = __raw_readl(iramptr2); |
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if (savedval1 == savedval2) { |
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__raw_writel(savedval2 + 1, iramptr2); |
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if (__raw_readl(iramptr1) == savedval2 + 1) |
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iram_size = LPC32XX_IRAM_BANK_SIZE; |
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else |
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iram_size = LPC32XX_IRAM_BANK_SIZE * 2; |
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__raw_writel(savedval2, iramptr2); |
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} else |
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iram_size = LPC32XX_IRAM_BANK_SIZE * 2; |
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} |
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if (dmaaddr) |
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*dmaaddr = LPC32XX_IRAM_BASE; |
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if (mapbase) |
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*mapbase = io_p2v(LPC32XX_IRAM_BASE); |
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return iram_size; |
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} |
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EXPORT_SYMBOL_GPL(lpc32xx_return_iram); |
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void lpc32xx_set_phy_interface_mode(phy_interface_t mode) |
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{ |
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u32 tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL); |
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tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK; |
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if (mode == PHY_INTERFACE_MODE_MII) |
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tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS; |
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else |
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tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS; |
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__raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL); |
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} |
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EXPORT_SYMBOL_GPL(lpc32xx_set_phy_interface_mode); |
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static struct map_desc lpc32xx_io_desc[] __initdata = { |
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{ |
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.virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START), |
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.pfn = __phys_to_pfn(LPC32XX_AHB0_START), |
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.length = LPC32XX_AHB0_SIZE, |
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.type = MT_DEVICE |
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}, |
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{ |
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.virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START), |
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.pfn = __phys_to_pfn(LPC32XX_AHB1_START), |
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.length = LPC32XX_AHB1_SIZE, |
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.type = MT_DEVICE |
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}, |
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{ |
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.virtual = (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START), |
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.pfn = __phys_to_pfn(LPC32XX_FABAPB_START), |
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.length = LPC32XX_FABAPB_SIZE, |
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.type = MT_DEVICE |
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}, |
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{ |
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.virtual = (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE), |
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.pfn = __phys_to_pfn(LPC32XX_IRAM_BASE), |
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.length = (LPC32XX_IRAM_BANK_SIZE * 2), |
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.type = MT_DEVICE |
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}, |
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}; |
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void __init lpc32xx_map_io(void) |
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{ |
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iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); |
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} |
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static int __init lpc32xx_check_uid(void) |
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{ |
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u32 uid[4]; |
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lpc32xx_get_uid(uid); |
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printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n", |
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uid[3], uid[2], uid[1], uid[0]); |
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if (!system_serial_low && !system_serial_high) { |
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system_serial_low = uid[0]; |
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system_serial_high = uid[1]; |
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} |
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return 1; |
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} |
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arch_initcall(lpc32xx_check_uid);
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