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36 lines
923 B
36 lines
923 B
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright 2013 Freescale Semiconductor, Inc. |
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*/ |
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#define VF_UART0_BASE_ADDR 0x40027000 |
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#define VF_UART1_BASE_ADDR 0x40028000 |
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#define VF_UART2_BASE_ADDR 0x40029000 |
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#define VF_UART3_BASE_ADDR 0x4002a000 |
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#define VF_UART_BASE_ADDR(n) VF_UART##n##_BASE_ADDR |
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#define VF_UART_BASE(n) VF_UART_BASE_ADDR(n) |
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#define VF_UART_PHYSICAL_BASE VF_UART_BASE(CONFIG_DEBUG_VF_UART_PORT) |
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#define VF_UART_VIRTUAL_BASE 0xfe000000 |
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.macro addruart, rp, rv, tmp |
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ldr \rp, =VF_UART_PHYSICAL_BASE @ physical |
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and \rv, \rp, #0xffffff @ offset within 16MB section |
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add \rv, \rv, #VF_UART_VIRTUAL_BASE |
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.endm |
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.macro senduart, rd, rx |
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strb \rd, [\rx, #0x7] @ Data Register |
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.endm |
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.macro busyuart, rd, rx |
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1001: ldrb \rd, [\rx, #0x4] @ Status Register 1 |
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tst \rd, #1 << 6 @ TC |
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beq 1001b @ wait until transmit done |
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.endm |
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.macro waituartcts,rd,rx |
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.endm |
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.macro waituarttxrdy,rd,rx |
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.endm
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