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1104 lines
28 KiB
1104 lines
28 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Common code for ADAU1X61 and ADAU1X81 codecs |
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* |
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* Copyright 2011-2014 Analog Devices Inc. |
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* Author: Lars-Peter Clausen <[email protected]> |
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*/ |
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|
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/slab.h> |
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#include <sound/core.h> |
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#include <sound/pcm.h> |
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#include <sound/pcm_params.h> |
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#include <sound/soc.h> |
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#include <sound/tlv.h> |
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#include <linux/gcd.h> |
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#include <linux/i2c.h> |
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#include <linux/spi/spi.h> |
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#include <linux/regmap.h> |
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#include <asm/unaligned.h> |
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|
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#include "sigmadsp.h" |
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#include "adau17x1.h" |
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#include "adau-utils.h" |
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|
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#define ADAU17X1_SAFELOAD_TARGET_ADDRESS 0x0006 |
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#define ADAU17X1_SAFELOAD_TRIGGER 0x0007 |
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#define ADAU17X1_SAFELOAD_DATA 0x0001 |
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#define ADAU17X1_SAFELOAD_DATA_SIZE 20 |
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#define ADAU17X1_WORD_SIZE 4 |
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|
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static const char * const adau17x1_capture_mixer_boost_text[] = { |
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"Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3", |
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}; |
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|
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static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum, |
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ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text); |
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|
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static const char * const adau17x1_mic_bias_mode_text[] = { |
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"Normal operation", "High performance", |
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}; |
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|
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static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum, |
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ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text); |
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|
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static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0); |
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|
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static const struct snd_kcontrol_new adau17x1_controls[] = { |
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SOC_DOUBLE_R_TLV("Digital Capture Volume", |
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ADAU17X1_LEFT_INPUT_DIGITAL_VOL, |
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ADAU17X1_RIGHT_INPUT_DIGITAL_VOL, |
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0, 0xff, 1, adau17x1_digital_tlv), |
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SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1, |
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ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv), |
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|
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SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL, |
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5, 1, 0), |
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SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0, |
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2, 1, 0), |
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|
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SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum), |
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|
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SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum), |
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}; |
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|
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static int adau17x1_setup_firmware(struct snd_soc_component *component, |
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unsigned int rate); |
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|
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static int adau17x1_pll_event(struct snd_soc_dapm_widget *w, |
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struct snd_kcontrol *kcontrol, int event) |
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{ |
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
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struct adau *adau = snd_soc_component_get_drvdata(component); |
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|
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if (SND_SOC_DAPM_EVENT_ON(event)) { |
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adau->pll_regs[5] = 1; |
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} else { |
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adau->pll_regs[5] = 0; |
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/* Bypass the PLL when disabled, otherwise registers will become |
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* inaccessible. */ |
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regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, |
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ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0); |
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} |
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|
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/* The PLL register is 6 bytes long and can only be written at once. */ |
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regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL, |
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adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); |
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|
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if (SND_SOC_DAPM_EVENT_ON(event)) { |
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mdelay(5); |
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regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, |
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ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, |
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ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL); |
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} |
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|
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return 0; |
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} |
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|
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static int adau17x1_adc_fixup(struct snd_soc_dapm_widget *w, |
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struct snd_kcontrol *kcontrol, int event) |
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{ |
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
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struct adau *adau = snd_soc_component_get_drvdata(component); |
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|
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/* |
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* If we are capturing, toggle the ADOSR bit in Converter Control 0 to |
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* avoid losing SNR (workaround from ADI). This must be done after |
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* the ADC(s) have been enabled. According to the data sheet, it is |
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* normally illegal to set this bit when the sampling rate is 96 kHz, |
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* but according to ADI it is acceptable for this workaround. |
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*/ |
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regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, |
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ADAU17X1_CONVERTER0_ADOSR, ADAU17X1_CONVERTER0_ADOSR); |
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regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, |
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ADAU17X1_CONVERTER0_ADOSR, 0); |
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|
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return 0; |
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} |
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|
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static const char * const adau17x1_mono_stereo_text[] = { |
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"Stereo", |
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"Mono Left Channel (L+R)", |
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"Mono Right Channel (L+R)", |
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"Mono (L+R)", |
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}; |
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|
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static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum, |
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ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text); |
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|
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static const struct snd_kcontrol_new adau17x1_dac_mode_mux = |
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SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum); |
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|
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static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = { |
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SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event, |
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
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|
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SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0), |
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SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0), |
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|
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SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT, |
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0, 0, NULL, 0), |
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SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT, |
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1, 0, NULL, 0), |
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|
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SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0, |
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&adau17x1_dac_mode_mux), |
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SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0, |
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&adau17x1_dac_mode_mux), |
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|
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SND_SOC_DAPM_ADC_E("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0, |
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adau17x1_adc_fixup, SND_SOC_DAPM_POST_PMU), |
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SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0), |
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SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0), |
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SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0), |
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}; |
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|
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static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = { |
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{ "Left Decimator", NULL, "SYSCLK" }, |
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{ "Right Decimator", NULL, "SYSCLK" }, |
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{ "Left DAC", NULL, "SYSCLK" }, |
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{ "Right DAC", NULL, "SYSCLK" }, |
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{ "Capture", NULL, "SYSCLK" }, |
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{ "Playback", NULL, "SYSCLK" }, |
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|
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{ "Left DAC", NULL, "Left DAC Mode Mux" }, |
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{ "Right DAC", NULL, "Right DAC Mode Mux" }, |
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|
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{ "Capture", NULL, "AIFCLK" }, |
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{ "Playback", NULL, "AIFCLK" }, |
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}; |
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static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = { |
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"SYSCLK", NULL, "PLL", |
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}; |
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|
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/* |
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* The MUX register for the Capture and Playback MUXs selects either DSP as |
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* source/destination or one of the TDM slots. The TDM slot is selected via |
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* snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or |
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* directly to the DAI interface with this control. |
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*/ |
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static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol, |
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struct snd_ctl_elem_value *ucontrol) |
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{ |
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struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); |
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); |
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struct adau *adau = snd_soc_component_get_drvdata(component); |
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struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; |
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struct snd_soc_dapm_update update = {}; |
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unsigned int stream = e->shift_l; |
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unsigned int val, change; |
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int reg; |
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|
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if (ucontrol->value.enumerated.item[0] >= e->items) |
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return -EINVAL; |
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|
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switch (ucontrol->value.enumerated.item[0]) { |
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case 0: |
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val = 0; |
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adau->dsp_bypass[stream] = false; |
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break; |
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default: |
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val = (adau->tdm_slot[stream] * 2) + 1; |
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adau->dsp_bypass[stream] = true; |
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break; |
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} |
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|
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) |
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reg = ADAU17X1_SERIAL_INPUT_ROUTE; |
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else |
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reg = ADAU17X1_SERIAL_OUTPUT_ROUTE; |
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|
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change = snd_soc_component_test_bits(component, reg, 0xff, val); |
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if (change) { |
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update.kcontrol = kcontrol; |
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update.mask = 0xff; |
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update.reg = reg; |
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update.val = val; |
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|
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snd_soc_dapm_mux_update_power(dapm, kcontrol, |
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ucontrol->value.enumerated.item[0], e, &update); |
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} |
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|
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return change; |
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} |
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static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol, |
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struct snd_ctl_elem_value *ucontrol) |
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{ |
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struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol); |
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struct adau *adau = snd_soc_component_get_drvdata(component); |
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struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; |
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unsigned int stream = e->shift_l; |
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unsigned int reg, val; |
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int ret; |
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) |
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reg = ADAU17X1_SERIAL_INPUT_ROUTE; |
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else |
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reg = ADAU17X1_SERIAL_OUTPUT_ROUTE; |
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|
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ret = regmap_read(adau->regmap, reg, &val); |
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if (ret) |
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return ret; |
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if (val != 0) |
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val = 1; |
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ucontrol->value.enumerated.item[0] = val; |
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return 0; |
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} |
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#define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \ |
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const struct snd_kcontrol_new _name = \ |
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SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\ |
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SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \ |
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ARRAY_SIZE(_text), _text), \ |
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adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put) |
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|
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static const char * const adau17x1_dac_mux_text[] = { |
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"DSP", |
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"AIFIN", |
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}; |
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|
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static const char * const adau17x1_capture_mux_text[] = { |
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"DSP", |
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"Decimator", |
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}; |
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|
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static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux", |
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SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text); |
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|
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static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux", |
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SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text); |
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|
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static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = { |
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SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0), |
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SND_SOC_DAPM_SIGGEN("DSP Siggen"), |
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|
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SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0, |
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&adau17x1_dac_mux), |
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SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0, |
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&adau17x1_capture_mux), |
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}; |
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|
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static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = { |
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{ "DAC Playback Mux", "DSP", "DSP" }, |
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{ "DAC Playback Mux", "AIFIN", "Playback" }, |
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|
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{ "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" }, |
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{ "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" }, |
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{ "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" }, |
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{ "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" }, |
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{ "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" }, |
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{ "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" }, |
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|
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{ "Capture Mux", "DSP", "DSP" }, |
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{ "Capture Mux", "Decimator", "Left Decimator" }, |
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{ "Capture Mux", "Decimator", "Right Decimator" }, |
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|
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{ "Capture", NULL, "Capture Mux" }, |
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|
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{ "DSP", NULL, "DSP Siggen" }, |
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{ "DSP", NULL, "Left Decimator" }, |
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{ "DSP", NULL, "Right Decimator" }, |
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{ "DSP", NULL, "Playback" }, |
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}; |
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|
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static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = { |
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{ "Left DAC Mode Mux", "Stereo", "Playback" }, |
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{ "Left DAC Mode Mux", "Mono (L+R)", "Playback" }, |
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{ "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" }, |
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{ "Right DAC Mode Mux", "Stereo", "Playback" }, |
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{ "Right DAC Mode Mux", "Mono (L+R)", "Playback" }, |
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{ "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" }, |
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{ "Capture", NULL, "Left Decimator" }, |
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{ "Capture", NULL, "Right Decimator" }, |
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}; |
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|
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static bool adau17x1_has_dsp(struct adau *adau) |
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{ |
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switch (adau->type) { |
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case ADAU1761: |
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case ADAU1381: |
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case ADAU1781: |
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return true; |
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default: |
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return false; |
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} |
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} |
|
|
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static bool adau17x1_has_safeload(struct adau *adau) |
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{ |
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switch (adau->type) { |
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case ADAU1761: |
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case ADAU1781: |
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return true; |
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default: |
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return false; |
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} |
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} |
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|
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static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id, |
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int source, unsigned int freq_in, unsigned int freq_out) |
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{ |
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struct snd_soc_component *component = dai->component; |
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struct adau *adau = snd_soc_component_get_drvdata(component); |
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int ret; |
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|
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if (freq_in < 8000000 || freq_in > 27000000) |
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return -EINVAL; |
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|
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ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs); |
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if (ret < 0) |
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return ret; |
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|
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/* The PLL register is 6 bytes long and can only be written at once. */ |
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ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL, |
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adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); |
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if (ret) |
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return ret; |
|
|
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adau->pll_freq = freq_out; |
|
|
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return 0; |
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} |
|
|
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static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai, |
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int clk_id, unsigned int freq, int dir) |
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{ |
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(dai->component); |
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struct adau *adau = snd_soc_component_get_drvdata(dai->component); |
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bool is_pll; |
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bool was_pll; |
|
|
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switch (clk_id) { |
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case ADAU17X1_CLK_SRC_MCLK: |
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is_pll = false; |
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break; |
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case ADAU17X1_CLK_SRC_PLL_AUTO: |
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if (!adau->mclk) |
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return -EINVAL; |
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fallthrough; |
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case ADAU17X1_CLK_SRC_PLL: |
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is_pll = true; |
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break; |
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default: |
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return -EINVAL; |
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} |
|
|
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switch (adau->clk_src) { |
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case ADAU17X1_CLK_SRC_MCLK: |
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was_pll = false; |
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break; |
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case ADAU17X1_CLK_SRC_PLL: |
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case ADAU17X1_CLK_SRC_PLL_AUTO: |
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was_pll = true; |
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break; |
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default: |
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return -EINVAL; |
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} |
|
|
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adau->sysclk = freq; |
|
|
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if (is_pll != was_pll) { |
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if (is_pll) { |
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snd_soc_dapm_add_routes(dapm, |
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&adau17x1_dapm_pll_route, 1); |
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} else { |
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snd_soc_dapm_del_routes(dapm, |
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&adau17x1_dapm_pll_route, 1); |
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} |
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} |
|
|
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adau->clk_src = clk_id; |
|
|
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return 0; |
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} |
|
|
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static int adau17x1_auto_pll(struct snd_soc_dai *dai, |
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struct snd_pcm_hw_params *params) |
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{ |
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struct adau *adau = snd_soc_dai_get_drvdata(dai); |
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unsigned int pll_rate; |
|
|
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switch (params_rate(params)) { |
|
case 48000: |
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case 8000: |
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case 12000: |
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case 16000: |
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case 24000: |
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case 32000: |
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case 96000: |
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pll_rate = 48000 * 1024; |
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break; |
|
case 44100: |
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case 7350: |
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case 11025: |
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case 14700: |
|
case 22050: |
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case 29400: |
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case 88200: |
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pll_rate = 44100 * 1024; |
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break; |
|
default: |
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return -EINVAL; |
|
} |
|
|
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return adau17x1_set_dai_pll(dai, ADAU17X1_PLL, ADAU17X1_PLL_SRC_MCLK, |
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clk_get_rate(adau->mclk), pll_rate); |
|
} |
|
|
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static int adau17x1_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
|
{ |
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struct snd_soc_component *component = dai->component; |
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struct adau *adau = snd_soc_component_get_drvdata(component); |
|
unsigned int val, div, dsp_div; |
|
unsigned int freq; |
|
int ret; |
|
|
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switch (adau->clk_src) { |
|
case ADAU17X1_CLK_SRC_PLL_AUTO: |
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ret = adau17x1_auto_pll(dai, params); |
|
if (ret) |
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return ret; |
|
fallthrough; |
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case ADAU17X1_CLK_SRC_PLL: |
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freq = adau->pll_freq; |
|
break; |
|
default: |
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freq = adau->sysclk; |
|
break; |
|
} |
|
|
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if (freq % params_rate(params) != 0) |
|
return -EINVAL; |
|
|
|
switch (freq / params_rate(params)) { |
|
case 1024: /* fs */ |
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div = 0; |
|
dsp_div = 1; |
|
break; |
|
case 6144: /* fs / 6 */ |
|
div = 1; |
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dsp_div = 6; |
|
break; |
|
case 4096: /* fs / 4 */ |
|
div = 2; |
|
dsp_div = 5; |
|
break; |
|
case 3072: /* fs / 3 */ |
|
div = 3; |
|
dsp_div = 4; |
|
break; |
|
case 2048: /* fs / 2 */ |
|
div = 4; |
|
dsp_div = 3; |
|
break; |
|
case 1536: /* fs / 1.5 */ |
|
div = 5; |
|
dsp_div = 2; |
|
break; |
|
case 512: /* fs / 0.5 */ |
|
div = 6; |
|
dsp_div = 0; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, |
|
ADAU17X1_CONVERTER0_CONVSR_MASK, div); |
|
if (adau17x1_has_dsp(adau)) { |
|
regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div); |
|
regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div); |
|
} |
|
|
|
if (adau->sigmadsp) { |
|
ret = adau17x1_setup_firmware(component, params_rate(params)); |
|
if (ret < 0) |
|
return ret; |
|
} |
|
|
|
if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) |
|
return 0; |
|
|
|
switch (params_width(params)) { |
|
case 16: |
|
val = ADAU17X1_SERIAL_PORT1_DELAY16; |
|
break; |
|
case 24: |
|
val = ADAU17X1_SERIAL_PORT1_DELAY8; |
|
break; |
|
case 32: |
|
val = ADAU17X1_SERIAL_PORT1_DELAY0; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, |
|
ADAU17X1_SERIAL_PORT1_DELAY_MASK, val); |
|
} |
|
|
|
static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai, |
|
unsigned int fmt) |
|
{ |
|
struct adau *adau = snd_soc_component_get_drvdata(dai->component); |
|
unsigned int ctrl0, ctrl1; |
|
int lrclk_pol; |
|
|
|
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
|
case SND_SOC_DAIFMT_CBM_CFM: |
|
ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER; |
|
adau->master = true; |
|
break; |
|
case SND_SOC_DAIFMT_CBS_CFS: |
|
ctrl0 = 0; |
|
adau->master = false; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
|
case SND_SOC_DAIFMT_I2S: |
|
lrclk_pol = 0; |
|
ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1; |
|
break; |
|
case SND_SOC_DAIFMT_LEFT_J: |
|
case SND_SOC_DAIFMT_RIGHT_J: |
|
lrclk_pol = 1; |
|
ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0; |
|
break; |
|
case SND_SOC_DAIFMT_DSP_A: |
|
lrclk_pol = 1; |
|
ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE; |
|
ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1; |
|
break; |
|
case SND_SOC_DAIFMT_DSP_B: |
|
lrclk_pol = 1; |
|
ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE; |
|
ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
|
case SND_SOC_DAIFMT_NB_NF: |
|
break; |
|
case SND_SOC_DAIFMT_IB_NF: |
|
ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL; |
|
break; |
|
case SND_SOC_DAIFMT_NB_IF: |
|
lrclk_pol = !lrclk_pol; |
|
break; |
|
case SND_SOC_DAIFMT_IB_IF: |
|
ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL; |
|
lrclk_pol = !lrclk_pol; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
if (lrclk_pol) |
|
ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL; |
|
|
|
regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0); |
|
regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1); |
|
|
|
adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
|
|
|
return 0; |
|
} |
|
|
|
static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai, |
|
unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) |
|
{ |
|
struct adau *adau = snd_soc_component_get_drvdata(dai->component); |
|
unsigned int ser_ctrl0, ser_ctrl1; |
|
unsigned int conv_ctrl0, conv_ctrl1; |
|
|
|
/* I2S mode */ |
|
if (slots == 0) { |
|
slots = 2; |
|
rx_mask = 3; |
|
tx_mask = 3; |
|
slot_width = 32; |
|
} |
|
|
|
switch (slots) { |
|
case 2: |
|
ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO; |
|
break; |
|
case 4: |
|
ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4; |
|
break; |
|
case 8: |
|
if (adau->type == ADAU1361) |
|
return -EINVAL; |
|
|
|
ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
switch (slot_width * slots) { |
|
case 32: |
|
if (adau->type == ADAU1761) |
|
return -EINVAL; |
|
|
|
ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32; |
|
break; |
|
case 64: |
|
ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64; |
|
break; |
|
case 48: |
|
ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48; |
|
break; |
|
case 128: |
|
ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128; |
|
break; |
|
case 256: |
|
if (adau->type == ADAU1361) |
|
return -EINVAL; |
|
|
|
ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
switch (rx_mask) { |
|
case 0x03: |
|
conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0; |
|
break; |
|
case 0x0c: |
|
conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1; |
|
break; |
|
case 0x30: |
|
conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2; |
|
break; |
|
case 0xc0: |
|
conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
switch (tx_mask) { |
|
case 0x03: |
|
conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0; |
|
break; |
|
case 0x0c: |
|
conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1; |
|
break; |
|
case 0x30: |
|
conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2; |
|
break; |
|
case 0xc0: |
|
conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4); |
|
adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0, |
|
ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0); |
|
regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1, |
|
ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1); |
|
regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0, |
|
ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0); |
|
regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1, |
|
ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1); |
|
|
|
if (!adau17x1_has_dsp(adau)) |
|
return 0; |
|
|
|
if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) { |
|
regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE, |
|
(adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1); |
|
} |
|
|
|
if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) { |
|
regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE, |
|
(adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int adau17x1_startup(struct snd_pcm_substream *substream, |
|
struct snd_soc_dai *dai) |
|
{ |
|
struct adau *adau = snd_soc_component_get_drvdata(dai->component); |
|
|
|
if (adau->sigmadsp) |
|
return sigmadsp_restrict_params(adau->sigmadsp, substream); |
|
|
|
return 0; |
|
} |
|
|
|
const struct snd_soc_dai_ops adau17x1_dai_ops = { |
|
.hw_params = adau17x1_hw_params, |
|
.set_sysclk = adau17x1_set_dai_sysclk, |
|
.set_fmt = adau17x1_set_dai_fmt, |
|
.set_pll = adau17x1_set_dai_pll, |
|
.set_tdm_slot = adau17x1_set_dai_tdm_slot, |
|
.startup = adau17x1_startup, |
|
}; |
|
EXPORT_SYMBOL_GPL(adau17x1_dai_ops); |
|
|
|
int adau17x1_set_micbias_voltage(struct snd_soc_component *component, |
|
enum adau17x1_micbias_voltage micbias) |
|
{ |
|
struct adau *adau = snd_soc_component_get_drvdata(component); |
|
|
|
switch (micbias) { |
|
case ADAU17X1_MICBIAS_0_90_AVDD: |
|
case ADAU17X1_MICBIAS_0_65_AVDD: |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2); |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage); |
|
|
|
bool adau17x1_precious_register(struct device *dev, unsigned int reg) |
|
{ |
|
/* SigmaDSP parameter memory */ |
|
if (reg < 0x400) |
|
return true; |
|
|
|
return false; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_precious_register); |
|
|
|
bool adau17x1_readable_register(struct device *dev, unsigned int reg) |
|
{ |
|
/* SigmaDSP parameter memory */ |
|
if (reg < 0x400) |
|
return true; |
|
|
|
switch (reg) { |
|
case ADAU17X1_CLOCK_CONTROL: |
|
case ADAU17X1_PLL_CONTROL: |
|
case ADAU17X1_REC_POWER_MGMT: |
|
case ADAU17X1_MICBIAS: |
|
case ADAU17X1_SERIAL_PORT0: |
|
case ADAU17X1_SERIAL_PORT1: |
|
case ADAU17X1_CONVERTER0: |
|
case ADAU17X1_CONVERTER1: |
|
case ADAU17X1_LEFT_INPUT_DIGITAL_VOL: |
|
case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL: |
|
case ADAU17X1_ADC_CONTROL: |
|
case ADAU17X1_PLAY_POWER_MGMT: |
|
case ADAU17X1_DAC_CONTROL0: |
|
case ADAU17X1_DAC_CONTROL1: |
|
case ADAU17X1_DAC_CONTROL2: |
|
case ADAU17X1_SERIAL_PORT_PAD: |
|
case ADAU17X1_CONTROL_PORT_PAD0: |
|
case ADAU17X1_CONTROL_PORT_PAD1: |
|
case ADAU17X1_DSP_SAMPLING_RATE: |
|
case ADAU17X1_SERIAL_INPUT_ROUTE: |
|
case ADAU17X1_SERIAL_OUTPUT_ROUTE: |
|
case ADAU17X1_DSP_ENABLE: |
|
case ADAU17X1_DSP_RUN: |
|
case ADAU17X1_SERIAL_SAMPLING_RATE: |
|
return true; |
|
default: |
|
break; |
|
} |
|
return false; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_readable_register); |
|
|
|
bool adau17x1_volatile_register(struct device *dev, unsigned int reg) |
|
{ |
|
/* SigmaDSP parameter and program memory */ |
|
if (reg < 0x4000) |
|
return true; |
|
|
|
switch (reg) { |
|
/* The PLL register is 6 bytes long */ |
|
case ADAU17X1_PLL_CONTROL: |
|
case ADAU17X1_PLL_CONTROL + 1: |
|
case ADAU17X1_PLL_CONTROL + 2: |
|
case ADAU17X1_PLL_CONTROL + 3: |
|
case ADAU17X1_PLL_CONTROL + 4: |
|
case ADAU17X1_PLL_CONTROL + 5: |
|
return true; |
|
default: |
|
break; |
|
} |
|
|
|
return false; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_volatile_register); |
|
|
|
static int adau17x1_setup_firmware(struct snd_soc_component *component, |
|
unsigned int rate) |
|
{ |
|
int ret; |
|
int dspsr, dsp_run; |
|
struct adau *adau = snd_soc_component_get_drvdata(component); |
|
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); |
|
|
|
/* Check if sample rate is the same as before. If it is there is no |
|
* point in performing the below steps as the call to |
|
* sigmadsp_setup(...) will return directly when it finds the sample |
|
* rate to be the same as before. By checking this we can prevent an |
|
* audiable popping noise which occours when toggling DSP_RUN. |
|
*/ |
|
if (adau->sigmadsp->current_samplerate == rate) |
|
return 0; |
|
|
|
snd_soc_dapm_mutex_lock(dapm); |
|
|
|
ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr); |
|
if (ret) |
|
goto err; |
|
|
|
ret = regmap_read(adau->regmap, ADAU17X1_DSP_RUN, &dsp_run); |
|
if (ret) |
|
goto err; |
|
|
|
regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1); |
|
regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf); |
|
regmap_write(adau->regmap, ADAU17X1_DSP_RUN, 0); |
|
|
|
ret = sigmadsp_setup(adau->sigmadsp, rate); |
|
if (ret) { |
|
regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0); |
|
goto err; |
|
} |
|
regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr); |
|
regmap_write(adau->regmap, ADAU17X1_DSP_RUN, dsp_run); |
|
|
|
err: |
|
snd_soc_dapm_mutex_unlock(dapm); |
|
|
|
return ret; |
|
} |
|
|
|
int adau17x1_add_widgets(struct snd_soc_component *component) |
|
{ |
|
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); |
|
struct adau *adau = snd_soc_component_get_drvdata(component); |
|
int ret; |
|
|
|
ret = snd_soc_add_component_controls(component, adau17x1_controls, |
|
ARRAY_SIZE(adau17x1_controls)); |
|
if (ret) |
|
return ret; |
|
ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets, |
|
ARRAY_SIZE(adau17x1_dapm_widgets)); |
|
if (ret) |
|
return ret; |
|
|
|
if (adau17x1_has_dsp(adau)) { |
|
ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets, |
|
ARRAY_SIZE(adau17x1_dsp_dapm_widgets)); |
|
if (ret) |
|
return ret; |
|
|
|
if (!adau->sigmadsp) |
|
return 0; |
|
|
|
ret = sigmadsp_attach(adau->sigmadsp, component); |
|
if (ret) { |
|
dev_err(component->dev, "Failed to attach firmware: %d\n", |
|
ret); |
|
return ret; |
|
} |
|
} |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_add_widgets); |
|
|
|
int adau17x1_add_routes(struct snd_soc_component *component) |
|
{ |
|
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); |
|
struct adau *adau = snd_soc_component_get_drvdata(component); |
|
int ret; |
|
|
|
ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes, |
|
ARRAY_SIZE(adau17x1_dapm_routes)); |
|
if (ret) |
|
return ret; |
|
|
|
if (adau17x1_has_dsp(adau)) { |
|
ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes, |
|
ARRAY_SIZE(adau17x1_dsp_dapm_routes)); |
|
} else { |
|
ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes, |
|
ARRAY_SIZE(adau17x1_no_dsp_dapm_routes)); |
|
} |
|
|
|
if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK) |
|
snd_soc_dapm_add_routes(dapm, &adau17x1_dapm_pll_route, 1); |
|
|
|
return ret; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_add_routes); |
|
|
|
int adau17x1_resume(struct snd_soc_component *component) |
|
{ |
|
struct adau *adau = snd_soc_component_get_drvdata(component); |
|
|
|
if (adau->switch_mode) |
|
adau->switch_mode(component->dev); |
|
|
|
regcache_sync(adau->regmap); |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_resume); |
|
|
|
static int adau17x1_safeload(struct sigmadsp *sigmadsp, unsigned int addr, |
|
const uint8_t bytes[], size_t len) |
|
{ |
|
uint8_t buf[ADAU17X1_WORD_SIZE]; |
|
uint8_t data[ADAU17X1_SAFELOAD_DATA_SIZE]; |
|
unsigned int addr_offset; |
|
unsigned int nbr_words; |
|
int ret; |
|
|
|
/* write data to safeload addresses. Check if len is not a multiple of |
|
* 4 bytes, if so we need to zero pad. |
|
*/ |
|
nbr_words = len / ADAU17X1_WORD_SIZE; |
|
if ((len - nbr_words * ADAU17X1_WORD_SIZE) == 0) { |
|
ret = regmap_raw_write(sigmadsp->control_data, |
|
ADAU17X1_SAFELOAD_DATA, bytes, len); |
|
} else { |
|
nbr_words++; |
|
memset(data, 0, ADAU17X1_SAFELOAD_DATA_SIZE); |
|
memcpy(data, bytes, len); |
|
ret = regmap_raw_write(sigmadsp->control_data, |
|
ADAU17X1_SAFELOAD_DATA, data, |
|
nbr_words * ADAU17X1_WORD_SIZE); |
|
} |
|
|
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Write target address, target address is offset by 1 */ |
|
addr_offset = addr - 1; |
|
put_unaligned_be32(addr_offset, buf); |
|
ret = regmap_raw_write(sigmadsp->control_data, |
|
ADAU17X1_SAFELOAD_TARGET_ADDRESS, buf, ADAU17X1_WORD_SIZE); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* write nbr of words to trigger address */ |
|
put_unaligned_be32(nbr_words, buf); |
|
ret = regmap_raw_write(sigmadsp->control_data, |
|
ADAU17X1_SAFELOAD_TRIGGER, buf, ADAU17X1_WORD_SIZE); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static const struct sigmadsp_ops adau17x1_sigmadsp_ops = { |
|
.safeload = adau17x1_safeload, |
|
}; |
|
|
|
int adau17x1_probe(struct device *dev, struct regmap *regmap, |
|
enum adau17x1_type type, void (*switch_mode)(struct device *dev), |
|
const char *firmware_name) |
|
{ |
|
struct adau *adau; |
|
int ret; |
|
|
|
if (IS_ERR(regmap)) |
|
return PTR_ERR(regmap); |
|
|
|
adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL); |
|
if (!adau) |
|
return -ENOMEM; |
|
|
|
adau->mclk = devm_clk_get(dev, "mclk"); |
|
if (IS_ERR(adau->mclk)) { |
|
if (PTR_ERR(adau->mclk) != -ENOENT) |
|
return PTR_ERR(adau->mclk); |
|
/* Clock is optional (for the driver) */ |
|
adau->mclk = NULL; |
|
} else if (adau->mclk) { |
|
adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO; |
|
|
|
/* |
|
* Any valid PLL output rate will work at this point, use one |
|
* that is likely to be chosen later as well. The register will |
|
* be written when the PLL is powered up for the first time. |
|
*/ |
|
ret = adau_calc_pll_cfg(clk_get_rate(adau->mclk), 48000 * 1024, |
|
adau->pll_regs); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = clk_prepare_enable(adau->mclk); |
|
if (ret) |
|
return ret; |
|
} |
|
|
|
adau->regmap = regmap; |
|
adau->switch_mode = switch_mode; |
|
adau->type = type; |
|
|
|
dev_set_drvdata(dev, adau); |
|
|
|
if (firmware_name) { |
|
if (adau17x1_has_safeload(adau)) { |
|
adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap, |
|
&adau17x1_sigmadsp_ops, firmware_name); |
|
} else { |
|
adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap, |
|
NULL, firmware_name); |
|
} |
|
if (IS_ERR(adau->sigmadsp)) { |
|
dev_warn(dev, "Could not find firmware file: %ld\n", |
|
PTR_ERR(adau->sigmadsp)); |
|
adau->sigmadsp = NULL; |
|
} |
|
} |
|
|
|
if (switch_mode) |
|
switch_mode(dev); |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_probe); |
|
|
|
void adau17x1_remove(struct device *dev) |
|
{ |
|
struct adau *adau = dev_get_drvdata(dev); |
|
|
|
clk_disable_unprepare(adau->mclk); |
|
} |
|
EXPORT_SYMBOL_GPL(adau17x1_remove); |
|
|
|
MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code"); |
|
MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>"); |
|
MODULE_LICENSE("GPL");
|
|
|