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652 lines
18 KiB
652 lines
18 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Texas Instruments DA8xx/OMAP-L1x "glue layer" |
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* |
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* Copyright (c) 2008-2009 MontaVista Software, Inc. <[email protected]> |
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* |
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* Based on the DaVinci "glue layer" code. |
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* Copyright (C) 2005-2006 by Texas Instruments |
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* |
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* DT support |
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* Copyright (c) 2016 Petr Kulhavy <[email protected]> |
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* |
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* This file is part of the Inventra Controller Driver for Linux. |
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*/ |
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|
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#include <linux/module.h> |
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#include <linux/clk.h> |
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#include <linux/err.h> |
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#include <linux/io.h> |
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#include <linux/of_platform.h> |
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#include <linux/phy/phy.h> |
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#include <linux/platform_device.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/usb/usb_phy_generic.h> |
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#include "musb_core.h" |
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|
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/* |
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* DA8XX specific definitions |
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*/ |
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|
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/* USB 2.0 OTG module registers */ |
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#define DA8XX_USB_REVISION_REG 0x00 |
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#define DA8XX_USB_CTRL_REG 0x04 |
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#define DA8XX_USB_STAT_REG 0x08 |
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#define DA8XX_USB_EMULATION_REG 0x0c |
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#define DA8XX_USB_SRP_FIX_TIME_REG 0x18 |
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#define DA8XX_USB_INTR_SRC_REG 0x20 |
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#define DA8XX_USB_INTR_SRC_SET_REG 0x24 |
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#define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28 |
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#define DA8XX_USB_INTR_MASK_REG 0x2c |
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#define DA8XX_USB_INTR_MASK_SET_REG 0x30 |
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#define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34 |
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#define DA8XX_USB_INTR_SRC_MASKED_REG 0x38 |
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#define DA8XX_USB_END_OF_INTR_REG 0x3c |
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#define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2)) |
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|
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/* Control register bits */ |
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#define DA8XX_SOFT_RESET_MASK 1 |
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#define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */ |
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#define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */ |
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|
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/* USB interrupt register bits */ |
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#define DA8XX_INTR_USB_SHIFT 16 |
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#define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */ |
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/* interrupts and DRVVBUS interrupt */ |
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#define DA8XX_INTR_DRVVBUS 0x100 |
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#define DA8XX_INTR_RX_SHIFT 8 |
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#define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT) |
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#define DA8XX_INTR_TX_SHIFT 0 |
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#define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT) |
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#define DA8XX_MENTOR_CORE_OFFSET 0x400 |
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struct da8xx_glue { |
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struct device *dev; |
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struct platform_device *musb; |
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struct platform_device *usb_phy; |
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struct clk *clk; |
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struct phy *phy; |
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}; |
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/* |
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* Because we don't set CTRL.UINT, it's "important" to: |
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* - not read/write INTRUSB/INTRUSBE (except during |
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* initial setup, as a workaround); |
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* - use INTSET/INTCLR instead. |
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*/ |
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/** |
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* da8xx_musb_enable - enable interrupts |
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*/ |
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static void da8xx_musb_enable(struct musb *musb) |
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{ |
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void __iomem *reg_base = musb->ctrl_base; |
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u32 mask; |
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|
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/* Workaround: setup IRQs through both register sets. */ |
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mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) | |
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((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) | |
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DA8XX_INTR_USB_MASK; |
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musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask); |
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|
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/* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
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musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG, |
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DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT); |
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} |
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/** |
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* da8xx_musb_disable - disable HDRC and flush interrupts |
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*/ |
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static void da8xx_musb_disable(struct musb *musb) |
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{ |
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void __iomem *reg_base = musb->ctrl_base; |
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musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG, |
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DA8XX_INTR_USB_MASK | |
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DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK); |
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musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); |
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} |
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#define portstate(stmt) stmt |
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static void da8xx_musb_set_vbus(struct musb *musb, int is_on) |
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{ |
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WARN_ON(is_on && is_peripheral_active(musb)); |
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} |
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#define POLL_SECONDS 2 |
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static void otg_timer(struct timer_list *t) |
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{ |
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struct musb *musb = from_timer(musb, t, dev_timer); |
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void __iomem *mregs = musb->mregs; |
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u8 devctl; |
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unsigned long flags; |
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/* |
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* We poll because DaVinci's won't expose several OTG-critical |
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* status change events (from the transceiver) otherwise. |
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*/ |
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devctl = musb_readb(mregs, MUSB_DEVCTL); |
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dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
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usb_otg_state_string(musb->xceiv->otg->state)); |
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spin_lock_irqsave(&musb->lock, flags); |
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switch (musb->xceiv->otg->state) { |
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case OTG_STATE_A_WAIT_BCON: |
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devctl &= ~MUSB_DEVCTL_SESSION; |
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
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devctl = musb_readb(musb->mregs, MUSB_DEVCTL); |
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if (devctl & MUSB_DEVCTL_BDEVICE) { |
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musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
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MUSB_DEV_MODE(musb); |
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} else { |
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musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
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MUSB_HST_MODE(musb); |
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} |
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break; |
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case OTG_STATE_A_WAIT_VFALL: |
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/* |
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* Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3 |
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* RTL seems to mis-handle session "start" otherwise (or in |
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* our case "recover"), in routine "VBUS was valid by the time |
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* VBUSERR got reported during enumeration" cases. |
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*/ |
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if (devctl & MUSB_DEVCTL_VBUS) { |
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
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break; |
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} |
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
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musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG, |
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MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT); |
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break; |
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case OTG_STATE_B_IDLE: |
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/* |
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* There's no ID-changed IRQ, so we have no good way to tell |
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* when to switch to the A-Default state machine (by setting |
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* the DEVCTL.Session bit). |
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* |
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* Workaround: whenever we're in B_IDLE, try setting the |
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* session flag every few seconds. If it works, ID was |
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* grounded and we're now in the A-Default state machine. |
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* |
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* NOTE: setting the session flag is _supposed_ to trigger |
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* SRP but clearly it doesn't. |
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*/ |
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musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION); |
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devctl = musb_readb(mregs, MUSB_DEVCTL); |
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if (devctl & MUSB_DEVCTL_BDEVICE) |
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
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else |
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musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
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break; |
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default: |
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break; |
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} |
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spin_unlock_irqrestore(&musb->lock, flags); |
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} |
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static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout) |
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{ |
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static unsigned long last_timer; |
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if (timeout == 0) |
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timeout = jiffies + msecs_to_jiffies(3); |
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/* Never idle if active, or when VBUS timeout is not set as host */ |
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if (musb->is_active || (musb->a_wait_bcon == 0 && |
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musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) { |
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dev_dbg(musb->controller, "%s active, deleting timer\n", |
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usb_otg_state_string(musb->xceiv->otg->state)); |
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del_timer(&musb->dev_timer); |
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last_timer = jiffies; |
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return; |
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} |
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if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) { |
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dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n"); |
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return; |
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} |
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last_timer = timeout; |
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dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", |
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usb_otg_state_string(musb->xceiv->otg->state), |
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jiffies_to_msecs(timeout - jiffies)); |
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mod_timer(&musb->dev_timer, timeout); |
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} |
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static irqreturn_t da8xx_musb_interrupt(int irq, void *hci) |
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{ |
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struct musb *musb = hci; |
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void __iomem *reg_base = musb->ctrl_base; |
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unsigned long flags; |
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irqreturn_t ret = IRQ_NONE; |
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u32 status; |
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spin_lock_irqsave(&musb->lock, flags); |
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/* |
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* NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through |
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* the Mentor registers (except for setup), use the TI ones and EOI. |
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*/ |
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/* Acknowledge and handle non-CPPI interrupts */ |
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status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG); |
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if (!status) |
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goto eoi; |
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musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status); |
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dev_dbg(musb->controller, "USB IRQ %08x\n", status); |
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musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT; |
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musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT; |
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musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT; |
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/* |
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* DRVVBUS IRQs are the only proxy we have (a very poor one!) for |
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* DA8xx's missing ID change IRQ. We need an ID change IRQ to |
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* switch appropriately between halves of the OTG state machine. |
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* Managing DEVCTL.Session per Mentor docs requires that we know its |
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* value but DEVCTL.BDevice is invalid without DEVCTL.Session set. |
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* Also, DRVVBUS pulses for SRP (but not at 5 V)... |
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*/ |
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if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) { |
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int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG); |
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void __iomem *mregs = musb->mregs; |
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u8 devctl = musb_readb(mregs, MUSB_DEVCTL); |
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int err; |
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err = musb->int_usb & MUSB_INTR_VBUSERROR; |
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if (err) { |
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/* |
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* The Mentor core doesn't debounce VBUS as needed |
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* to cope with device connect current spikes. This |
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* means it's not uncommon for bus-powered devices |
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* to get VBUS errors during enumeration. |
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* |
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* This is a workaround, but newer RTL from Mentor |
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* seems to allow a better one: "re"-starting sessions |
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* without waiting for VBUS to stop registering in |
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* devctl. |
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*/ |
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musb->int_usb &= ~MUSB_INTR_VBUSERROR; |
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; |
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
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WARNING("VBUS error workaround (delay coming)\n"); |
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} else if (drvvbus) { |
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MUSB_HST_MODE(musb); |
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; |
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portstate(musb->port1_status |= USB_PORT_STAT_POWER); |
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del_timer(&musb->dev_timer); |
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} else if (!(musb->int_usb & MUSB_INTR_BABBLE)) { |
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/* |
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* When babble condition happens, drvvbus interrupt |
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* is also generated. Ignore this drvvbus interrupt |
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* and let babble interrupt handler recovers the |
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* controller; otherwise, the host-mode flag is lost |
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* due to the MUSB_DEV_MODE() call below and babble |
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* recovery logic will not be called. |
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*/ |
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musb->is_active = 0; |
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MUSB_DEV_MODE(musb); |
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musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
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portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); |
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} |
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dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", |
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drvvbus ? "on" : "off", |
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usb_otg_state_string(musb->xceiv->otg->state), |
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err ? " ERROR" : "", |
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devctl); |
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ret = IRQ_HANDLED; |
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} |
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if (musb->int_tx || musb->int_rx || musb->int_usb) |
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ret |= musb_interrupt(musb); |
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eoi: |
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/* EOI needs to be written for the IRQ to be re-asserted. */ |
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if (ret == IRQ_HANDLED || status) |
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musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); |
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/* Poll for ID change */ |
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if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) |
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mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ); |
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spin_unlock_irqrestore(&musb->lock, flags); |
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return ret; |
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} |
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static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode) |
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{ |
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struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); |
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enum phy_mode phy_mode; |
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/* |
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* The PHY has some issues when it is forced in device or host mode. |
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* Unless the user request another mode, configure the PHY in OTG mode. |
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*/ |
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if (!musb->is_initialized) |
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return phy_set_mode(glue->phy, PHY_MODE_USB_OTG); |
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switch (musb_mode) { |
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case MUSB_HOST: /* Force VBUS valid, ID = 0 */ |
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phy_mode = PHY_MODE_USB_HOST; |
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break; |
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case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ |
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phy_mode = PHY_MODE_USB_DEVICE; |
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break; |
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case MUSB_OTG: /* Don't override the VBUS/ID comparators */ |
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phy_mode = PHY_MODE_USB_OTG; |
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break; |
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default: |
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return -EINVAL; |
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} |
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return phy_set_mode(glue->phy, phy_mode); |
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} |
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static int da8xx_musb_init(struct musb *musb) |
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{ |
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struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); |
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void __iomem *reg_base = musb->ctrl_base; |
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u32 rev; |
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int ret = -ENODEV; |
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musb->mregs += DA8XX_MENTOR_CORE_OFFSET; |
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ret = clk_prepare_enable(glue->clk); |
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if (ret) { |
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dev_err(glue->dev, "failed to enable clock\n"); |
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return ret; |
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} |
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/* Returns zero if e.g. not clocked */ |
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rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG); |
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if (!rev) |
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goto fail; |
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musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); |
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if (IS_ERR_OR_NULL(musb->xceiv)) { |
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ret = -EPROBE_DEFER; |
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goto fail; |
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} |
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timer_setup(&musb->dev_timer, otg_timer, 0); |
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/* Reset the controller */ |
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musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK); |
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/* Start the on-chip PHY and its PLL. */ |
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ret = phy_init(glue->phy); |
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if (ret) { |
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dev_err(glue->dev, "Failed to init phy.\n"); |
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goto fail; |
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} |
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ret = phy_power_on(glue->phy); |
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if (ret) { |
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dev_err(glue->dev, "Failed to power on phy.\n"); |
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goto err_phy_power_on; |
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} |
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msleep(5); |
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/* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */ |
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pr_debug("DA8xx OTG revision %08x, control %02x\n", rev, |
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musb_readb(reg_base, DA8XX_USB_CTRL_REG)); |
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musb->isr = da8xx_musb_interrupt; |
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return 0; |
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err_phy_power_on: |
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phy_exit(glue->phy); |
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fail: |
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clk_disable_unprepare(glue->clk); |
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return ret; |
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} |
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static int da8xx_musb_exit(struct musb *musb) |
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{ |
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struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent); |
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del_timer_sync(&musb->dev_timer); |
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phy_power_off(glue->phy); |
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phy_exit(glue->phy); |
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clk_disable_unprepare(glue->clk); |
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usb_put_phy(musb->xceiv); |
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return 0; |
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} |
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static inline u8 get_vbus_power(struct device *dev) |
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{ |
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struct regulator *vbus_supply; |
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int current_uA; |
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vbus_supply = regulator_get_optional(dev, "vbus"); |
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if (IS_ERR(vbus_supply)) |
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return 255; |
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current_uA = regulator_get_current_limit(vbus_supply); |
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regulator_put(vbus_supply); |
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if (current_uA <= 0 || current_uA > 510000) |
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return 255; |
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return current_uA / 1000 / 2; |
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} |
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#ifdef CONFIG_USB_TI_CPPI41_DMA |
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static void da8xx_dma_controller_callback(struct dma_controller *c) |
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{ |
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struct musb *musb = c->musb; |
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void __iomem *reg_base = musb->ctrl_base; |
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musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0); |
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} |
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static struct dma_controller * |
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da8xx_dma_controller_create(struct musb *musb, void __iomem *base) |
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{ |
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struct dma_controller *controller; |
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controller = cppi41_dma_controller_create(musb, base); |
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if (IS_ERR_OR_NULL(controller)) |
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return controller; |
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controller->dma_callback = da8xx_dma_controller_callback; |
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return controller; |
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} |
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#endif |
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static const struct musb_platform_ops da8xx_ops = { |
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.quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION | |
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MUSB_DMA_CPPI41 | MUSB_DA8XX, |
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.init = da8xx_musb_init, |
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.exit = da8xx_musb_exit, |
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.fifo_mode = 2, |
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#ifdef CONFIG_USB_TI_CPPI41_DMA |
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.dma_init = da8xx_dma_controller_create, |
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.dma_exit = cppi41_dma_controller_destroy, |
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#endif |
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.enable = da8xx_musb_enable, |
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.disable = da8xx_musb_disable, |
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.set_mode = da8xx_musb_set_mode, |
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.try_idle = da8xx_musb_try_idle, |
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.set_vbus = da8xx_musb_set_vbus, |
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}; |
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static const struct platform_device_info da8xx_dev_info = { |
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.name = "musb-hdrc", |
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.id = PLATFORM_DEVID_AUTO, |
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.dma_mask = DMA_BIT_MASK(32), |
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}; |
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static const struct musb_hdrc_config da8xx_config = { |
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.ram_bits = 10, |
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.num_eps = 5, |
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.multipoint = 1, |
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}; |
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|
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static struct of_dev_auxdata da8xx_auxdata_lookup[] = { |
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OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine", |
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NULL), |
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{} |
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}; |
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|
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static int da8xx_probe(struct platform_device *pdev) |
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{ |
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struct resource musb_resources[2]; |
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struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev); |
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struct da8xx_glue *glue; |
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struct platform_device_info pinfo; |
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struct clk *clk; |
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struct device_node *np = pdev->dev.of_node; |
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int ret; |
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glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); |
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if (!glue) |
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return -ENOMEM; |
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clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(clk)) { |
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dev_err(&pdev->dev, "failed to get clock\n"); |
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return PTR_ERR(clk); |
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} |
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glue->phy = devm_phy_get(&pdev->dev, "usb-phy"); |
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if (IS_ERR(glue->phy)) { |
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if (PTR_ERR(glue->phy) != -EPROBE_DEFER) |
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dev_err(&pdev->dev, "failed to get phy\n"); |
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return PTR_ERR(glue->phy); |
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} |
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glue->dev = &pdev->dev; |
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glue->clk = clk; |
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if (IS_ENABLED(CONFIG_OF) && np) { |
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
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if (!pdata) |
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return -ENOMEM; |
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pdata->config = &da8xx_config; |
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pdata->mode = musb_get_mode(&pdev->dev); |
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pdata->power = get_vbus_power(&pdev->dev); |
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} |
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pdata->platform_ops = &da8xx_ops; |
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glue->usb_phy = usb_phy_generic_register(); |
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ret = PTR_ERR_OR_ZERO(glue->usb_phy); |
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if (ret) { |
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dev_err(&pdev->dev, "failed to register usb_phy\n"); |
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return ret; |
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} |
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platform_set_drvdata(pdev, glue); |
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ret = of_platform_populate(pdev->dev.of_node, NULL, |
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da8xx_auxdata_lookup, &pdev->dev); |
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if (ret) |
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return ret; |
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memset(musb_resources, 0x00, sizeof(*musb_resources) * |
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ARRAY_SIZE(musb_resources)); |
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musb_resources[0].name = pdev->resource[0].name; |
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musb_resources[0].start = pdev->resource[0].start; |
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musb_resources[0].end = pdev->resource[0].end; |
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musb_resources[0].flags = pdev->resource[0].flags; |
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musb_resources[1].name = pdev->resource[1].name; |
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musb_resources[1].start = pdev->resource[1].start; |
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musb_resources[1].end = pdev->resource[1].end; |
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musb_resources[1].flags = pdev->resource[1].flags; |
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pinfo = da8xx_dev_info; |
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pinfo.parent = &pdev->dev; |
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pinfo.res = musb_resources; |
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pinfo.num_res = ARRAY_SIZE(musb_resources); |
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pinfo.data = pdata; |
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pinfo.size_data = sizeof(*pdata); |
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glue->musb = platform_device_register_full(&pinfo); |
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ret = PTR_ERR_OR_ZERO(glue->musb); |
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if (ret) { |
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dev_err(&pdev->dev, "failed to register musb device: %d\n", ret); |
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usb_phy_generic_unregister(glue->usb_phy); |
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} |
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return ret; |
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} |
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static int da8xx_remove(struct platform_device *pdev) |
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{ |
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struct da8xx_glue *glue = platform_get_drvdata(pdev); |
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platform_device_unregister(glue->musb); |
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usb_phy_generic_unregister(glue->usb_phy); |
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return 0; |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static int da8xx_suspend(struct device *dev) |
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{ |
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int ret; |
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struct da8xx_glue *glue = dev_get_drvdata(dev); |
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ret = phy_power_off(glue->phy); |
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if (ret) |
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return ret; |
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clk_disable_unprepare(glue->clk); |
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return 0; |
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} |
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static int da8xx_resume(struct device *dev) |
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{ |
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int ret; |
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struct da8xx_glue *glue = dev_get_drvdata(dev); |
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|
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ret = clk_prepare_enable(glue->clk); |
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if (ret) |
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return ret; |
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return phy_power_on(glue->phy); |
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} |
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#endif |
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static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume); |
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#ifdef CONFIG_OF |
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static const struct of_device_id da8xx_id_table[] = { |
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{ |
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.compatible = "ti,da830-musb", |
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}, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, da8xx_id_table); |
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#endif |
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static struct platform_driver da8xx_driver = { |
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.probe = da8xx_probe, |
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.remove = da8xx_remove, |
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.driver = { |
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.name = "musb-da8xx", |
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.pm = &da8xx_pm_ops, |
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.of_match_table = of_match_ptr(da8xx_id_table), |
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}, |
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}; |
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MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer"); |
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MODULE_AUTHOR("Sergei Shtylyov <[email protected]>"); |
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MODULE_LICENSE("GPL v2"); |
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module_platform_driver(da8xx_driver);
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