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738 lines
23 KiB
738 lines
23 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2015, The Linux Foundation. All rights reserved. |
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*/ |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/platform_device.h> |
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#include <linux/pinctrl/pinctrl.h> |
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#include "pinctrl-msm.h" |
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static const struct pinctrl_pin_desc ipq4019_pins[] = { |
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PINCTRL_PIN(0, "GPIO_0"), |
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PINCTRL_PIN(1, "GPIO_1"), |
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PINCTRL_PIN(2, "GPIO_2"), |
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PINCTRL_PIN(3, "GPIO_3"), |
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PINCTRL_PIN(4, "GPIO_4"), |
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PINCTRL_PIN(5, "GPIO_5"), |
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PINCTRL_PIN(6, "GPIO_6"), |
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PINCTRL_PIN(7, "GPIO_7"), |
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PINCTRL_PIN(8, "GPIO_8"), |
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PINCTRL_PIN(9, "GPIO_9"), |
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PINCTRL_PIN(10, "GPIO_10"), |
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PINCTRL_PIN(11, "GPIO_11"), |
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PINCTRL_PIN(12, "GPIO_12"), |
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PINCTRL_PIN(13, "GPIO_13"), |
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PINCTRL_PIN(14, "GPIO_14"), |
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PINCTRL_PIN(15, "GPIO_15"), |
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PINCTRL_PIN(16, "GPIO_16"), |
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PINCTRL_PIN(17, "GPIO_17"), |
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PINCTRL_PIN(18, "GPIO_18"), |
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PINCTRL_PIN(19, "GPIO_19"), |
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PINCTRL_PIN(20, "GPIO_20"), |
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PINCTRL_PIN(21, "GPIO_21"), |
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PINCTRL_PIN(22, "GPIO_22"), |
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PINCTRL_PIN(23, "GPIO_23"), |
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PINCTRL_PIN(24, "GPIO_24"), |
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PINCTRL_PIN(25, "GPIO_25"), |
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PINCTRL_PIN(26, "GPIO_26"), |
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PINCTRL_PIN(27, "GPIO_27"), |
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PINCTRL_PIN(28, "GPIO_28"), |
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PINCTRL_PIN(29, "GPIO_29"), |
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PINCTRL_PIN(30, "GPIO_30"), |
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PINCTRL_PIN(31, "GPIO_31"), |
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PINCTRL_PIN(32, "GPIO_32"), |
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PINCTRL_PIN(33, "GPIO_33"), |
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PINCTRL_PIN(34, "GPIO_34"), |
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PINCTRL_PIN(35, "GPIO_35"), |
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PINCTRL_PIN(36, "GPIO_36"), |
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PINCTRL_PIN(37, "GPIO_37"), |
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PINCTRL_PIN(38, "GPIO_38"), |
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PINCTRL_PIN(39, "GPIO_39"), |
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PINCTRL_PIN(40, "GPIO_40"), |
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PINCTRL_PIN(41, "GPIO_41"), |
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PINCTRL_PIN(42, "GPIO_42"), |
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PINCTRL_PIN(43, "GPIO_43"), |
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PINCTRL_PIN(44, "GPIO_44"), |
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PINCTRL_PIN(45, "GPIO_45"), |
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PINCTRL_PIN(46, "GPIO_46"), |
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PINCTRL_PIN(47, "GPIO_47"), |
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PINCTRL_PIN(48, "GPIO_48"), |
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PINCTRL_PIN(49, "GPIO_49"), |
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PINCTRL_PIN(50, "GPIO_50"), |
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PINCTRL_PIN(51, "GPIO_51"), |
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PINCTRL_PIN(52, "GPIO_52"), |
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PINCTRL_PIN(53, "GPIO_53"), |
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PINCTRL_PIN(54, "GPIO_54"), |
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PINCTRL_PIN(55, "GPIO_55"), |
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PINCTRL_PIN(56, "GPIO_56"), |
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PINCTRL_PIN(57, "GPIO_57"), |
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PINCTRL_PIN(58, "GPIO_58"), |
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PINCTRL_PIN(59, "GPIO_59"), |
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PINCTRL_PIN(60, "GPIO_60"), |
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PINCTRL_PIN(61, "GPIO_61"), |
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PINCTRL_PIN(62, "GPIO_62"), |
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PINCTRL_PIN(63, "GPIO_63"), |
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PINCTRL_PIN(64, "GPIO_64"), |
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PINCTRL_PIN(65, "GPIO_65"), |
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PINCTRL_PIN(66, "GPIO_66"), |
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PINCTRL_PIN(67, "GPIO_67"), |
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PINCTRL_PIN(68, "GPIO_68"), |
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PINCTRL_PIN(69, "GPIO_69"), |
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PINCTRL_PIN(70, "GPIO_70"), |
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PINCTRL_PIN(71, "GPIO_71"), |
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PINCTRL_PIN(72, "GPIO_72"), |
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PINCTRL_PIN(73, "GPIO_73"), |
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PINCTRL_PIN(74, "GPIO_74"), |
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PINCTRL_PIN(75, "GPIO_75"), |
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PINCTRL_PIN(76, "GPIO_76"), |
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PINCTRL_PIN(77, "GPIO_77"), |
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PINCTRL_PIN(78, "GPIO_78"), |
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PINCTRL_PIN(79, "GPIO_79"), |
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PINCTRL_PIN(80, "GPIO_80"), |
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PINCTRL_PIN(81, "GPIO_81"), |
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PINCTRL_PIN(82, "GPIO_82"), |
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PINCTRL_PIN(83, "GPIO_83"), |
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PINCTRL_PIN(84, "GPIO_84"), |
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PINCTRL_PIN(85, "GPIO_85"), |
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PINCTRL_PIN(86, "GPIO_86"), |
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PINCTRL_PIN(87, "GPIO_87"), |
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PINCTRL_PIN(88, "GPIO_88"), |
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PINCTRL_PIN(89, "GPIO_89"), |
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PINCTRL_PIN(90, "GPIO_90"), |
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PINCTRL_PIN(91, "GPIO_91"), |
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PINCTRL_PIN(92, "GPIO_92"), |
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PINCTRL_PIN(93, "GPIO_93"), |
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PINCTRL_PIN(94, "GPIO_94"), |
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PINCTRL_PIN(95, "GPIO_95"), |
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PINCTRL_PIN(96, "GPIO_96"), |
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PINCTRL_PIN(97, "GPIO_97"), |
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PINCTRL_PIN(98, "GPIO_98"), |
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PINCTRL_PIN(99, "GPIO_99"), |
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}; |
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#define DECLARE_QCA_GPIO_PINS(pin) \ |
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static const unsigned int gpio##pin##_pins[] = { pin } |
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DECLARE_QCA_GPIO_PINS(0); |
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DECLARE_QCA_GPIO_PINS(1); |
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DECLARE_QCA_GPIO_PINS(2); |
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DECLARE_QCA_GPIO_PINS(3); |
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DECLARE_QCA_GPIO_PINS(4); |
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DECLARE_QCA_GPIO_PINS(5); |
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DECLARE_QCA_GPIO_PINS(6); |
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DECLARE_QCA_GPIO_PINS(7); |
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DECLARE_QCA_GPIO_PINS(8); |
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DECLARE_QCA_GPIO_PINS(9); |
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DECLARE_QCA_GPIO_PINS(10); |
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DECLARE_QCA_GPIO_PINS(11); |
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DECLARE_QCA_GPIO_PINS(12); |
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DECLARE_QCA_GPIO_PINS(13); |
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DECLARE_QCA_GPIO_PINS(14); |
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DECLARE_QCA_GPIO_PINS(15); |
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DECLARE_QCA_GPIO_PINS(16); |
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DECLARE_QCA_GPIO_PINS(17); |
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DECLARE_QCA_GPIO_PINS(18); |
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DECLARE_QCA_GPIO_PINS(19); |
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DECLARE_QCA_GPIO_PINS(20); |
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DECLARE_QCA_GPIO_PINS(21); |
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DECLARE_QCA_GPIO_PINS(22); |
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DECLARE_QCA_GPIO_PINS(23); |
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DECLARE_QCA_GPIO_PINS(24); |
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DECLARE_QCA_GPIO_PINS(25); |
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DECLARE_QCA_GPIO_PINS(26); |
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DECLARE_QCA_GPIO_PINS(27); |
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DECLARE_QCA_GPIO_PINS(28); |
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DECLARE_QCA_GPIO_PINS(29); |
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DECLARE_QCA_GPIO_PINS(30); |
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DECLARE_QCA_GPIO_PINS(31); |
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DECLARE_QCA_GPIO_PINS(32); |
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DECLARE_QCA_GPIO_PINS(33); |
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DECLARE_QCA_GPIO_PINS(34); |
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DECLARE_QCA_GPIO_PINS(35); |
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DECLARE_QCA_GPIO_PINS(36); |
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DECLARE_QCA_GPIO_PINS(37); |
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DECLARE_QCA_GPIO_PINS(38); |
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DECLARE_QCA_GPIO_PINS(39); |
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DECLARE_QCA_GPIO_PINS(40); |
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DECLARE_QCA_GPIO_PINS(41); |
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DECLARE_QCA_GPIO_PINS(42); |
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DECLARE_QCA_GPIO_PINS(43); |
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DECLARE_QCA_GPIO_PINS(44); |
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DECLARE_QCA_GPIO_PINS(45); |
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DECLARE_QCA_GPIO_PINS(46); |
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DECLARE_QCA_GPIO_PINS(47); |
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DECLARE_QCA_GPIO_PINS(48); |
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DECLARE_QCA_GPIO_PINS(49); |
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DECLARE_QCA_GPIO_PINS(50); |
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DECLARE_QCA_GPIO_PINS(51); |
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DECLARE_QCA_GPIO_PINS(52); |
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DECLARE_QCA_GPIO_PINS(53); |
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DECLARE_QCA_GPIO_PINS(54); |
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DECLARE_QCA_GPIO_PINS(55); |
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DECLARE_QCA_GPIO_PINS(56); |
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DECLARE_QCA_GPIO_PINS(57); |
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DECLARE_QCA_GPIO_PINS(58); |
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DECLARE_QCA_GPIO_PINS(59); |
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DECLARE_QCA_GPIO_PINS(60); |
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DECLARE_QCA_GPIO_PINS(61); |
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DECLARE_QCA_GPIO_PINS(62); |
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DECLARE_QCA_GPIO_PINS(63); |
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DECLARE_QCA_GPIO_PINS(64); |
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DECLARE_QCA_GPIO_PINS(65); |
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DECLARE_QCA_GPIO_PINS(66); |
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DECLARE_QCA_GPIO_PINS(67); |
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DECLARE_QCA_GPIO_PINS(68); |
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DECLARE_QCA_GPIO_PINS(69); |
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DECLARE_QCA_GPIO_PINS(70); |
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DECLARE_QCA_GPIO_PINS(71); |
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DECLARE_QCA_GPIO_PINS(72); |
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DECLARE_QCA_GPIO_PINS(73); |
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DECLARE_QCA_GPIO_PINS(74); |
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DECLARE_QCA_GPIO_PINS(75); |
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DECLARE_QCA_GPIO_PINS(76); |
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DECLARE_QCA_GPIO_PINS(77); |
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DECLARE_QCA_GPIO_PINS(78); |
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DECLARE_QCA_GPIO_PINS(79); |
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DECLARE_QCA_GPIO_PINS(80); |
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DECLARE_QCA_GPIO_PINS(81); |
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DECLARE_QCA_GPIO_PINS(82); |
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DECLARE_QCA_GPIO_PINS(83); |
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DECLARE_QCA_GPIO_PINS(84); |
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DECLARE_QCA_GPIO_PINS(85); |
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DECLARE_QCA_GPIO_PINS(86); |
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DECLARE_QCA_GPIO_PINS(87); |
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DECLARE_QCA_GPIO_PINS(88); |
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DECLARE_QCA_GPIO_PINS(89); |
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DECLARE_QCA_GPIO_PINS(90); |
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DECLARE_QCA_GPIO_PINS(91); |
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DECLARE_QCA_GPIO_PINS(92); |
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DECLARE_QCA_GPIO_PINS(93); |
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DECLARE_QCA_GPIO_PINS(94); |
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DECLARE_QCA_GPIO_PINS(95); |
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DECLARE_QCA_GPIO_PINS(96); |
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DECLARE_QCA_GPIO_PINS(97); |
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DECLARE_QCA_GPIO_PINS(98); |
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DECLARE_QCA_GPIO_PINS(99); |
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#define FUNCTION(fname) \ |
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[qca_mux_##fname] = { \ |
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.name = #fname, \ |
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.groups = fname##_groups, \ |
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.ngroups = ARRAY_SIZE(fname##_groups), \ |
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} |
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#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \ |
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{ \ |
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.name = "gpio" #id, \ |
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.pins = gpio##id##_pins, \ |
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.npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \ |
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.funcs = (int[]){ \ |
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qca_mux_gpio, /* gpio mode */ \ |
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qca_mux_##f1, \ |
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qca_mux_##f2, \ |
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qca_mux_##f3, \ |
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qca_mux_##f4, \ |
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qca_mux_##f5, \ |
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qca_mux_##f6, \ |
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qca_mux_##f7, \ |
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qca_mux_##f8, \ |
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qca_mux_##f9, \ |
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qca_mux_##f10, \ |
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qca_mux_##f11, \ |
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qca_mux_##f12, \ |
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qca_mux_##f13, \ |
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qca_mux_##f14 \ |
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}, \ |
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.nfuncs = 15, \ |
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.ctl_reg = 0x0 + 0x1000 * id, \ |
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.io_reg = 0x4 + 0x1000 * id, \ |
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.intr_cfg_reg = 0x8 + 0x1000 * id, \ |
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.intr_status_reg = 0xc + 0x1000 * id, \ |
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.intr_target_reg = 0x8 + 0x1000 * id, \ |
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.mux_bit = 2, \ |
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.pull_bit = 0, \ |
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.drv_bit = 6, \ |
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.od_bit = 12, \ |
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.oe_bit = 9, \ |
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.in_bit = 0, \ |
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.out_bit = 1, \ |
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.intr_enable_bit = 0, \ |
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.intr_status_bit = 0, \ |
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.intr_target_bit = 5, \ |
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.intr_raw_status_bit = 4, \ |
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.intr_polarity_bit = 1, \ |
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.intr_detection_bit = 2, \ |
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.intr_detection_width = 2, \ |
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} |
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enum ipq4019_functions { |
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qca_mux_gpio, |
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qca_mux_aud_pin, |
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qca_mux_audio_pwm, |
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qca_mux_blsp_i2c0, |
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qca_mux_blsp_i2c1, |
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qca_mux_blsp_spi0, |
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qca_mux_blsp_spi1, |
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qca_mux_blsp_uart0, |
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qca_mux_blsp_uart1, |
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qca_mux_chip_rst, |
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qca_mux_i2s_rx, |
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qca_mux_i2s_spdif_in, |
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qca_mux_i2s_spdif_out, |
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qca_mux_i2s_td, |
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qca_mux_i2s_tx, |
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qca_mux_jtag, |
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qca_mux_led0, |
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qca_mux_led1, |
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qca_mux_led2, |
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qca_mux_led3, |
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qca_mux_led4, |
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qca_mux_led5, |
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qca_mux_led6, |
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qca_mux_led7, |
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qca_mux_led8, |
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qca_mux_led9, |
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qca_mux_led10, |
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qca_mux_led11, |
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qca_mux_mdc, |
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qca_mux_mdio, |
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qca_mux_pcie, |
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qca_mux_pmu, |
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qca_mux_prng_rosc, |
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qca_mux_qpic, |
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qca_mux_rgmii, |
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qca_mux_rmii, |
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qca_mux_sdio, |
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qca_mux_smart0, |
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qca_mux_smart1, |
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qca_mux_smart2, |
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qca_mux_smart3, |
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qca_mux_tm, |
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qca_mux_wifi0, |
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qca_mux_wifi1, |
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qca_mux_NA, |
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}; |
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static const char * const gpio_groups[] = { |
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"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", |
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"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", |
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"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", |
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"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", |
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"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", |
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"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", |
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"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", |
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"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", |
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"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", |
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"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", |
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"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", |
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"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", |
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"gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", |
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"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", |
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"gpio99", |
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}; |
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static const char * const aud_pin_groups[] = { |
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"gpio48", "gpio49", "gpio50", "gpio51", |
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}; |
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static const char * const audio_pwm_groups[] = { |
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"gpio30", "gpio31", "gpio32", "gpio33", "gpio64", "gpio65", "gpio66", |
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"gpio67", |
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}; |
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static const char * const blsp_i2c0_groups[] = { |
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"gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59", |
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}; |
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static const char * const blsp_i2c1_groups[] = { |
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"gpio12", "gpio13", "gpio34", "gpio35", |
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}; |
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static const char * const blsp_spi0_groups[] = { |
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"gpio12", "gpio13", "gpio14", "gpio15", "gpio45", "gpio54", "gpio55", |
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"gpio56", "gpio57", |
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}; |
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static const char * const blsp_spi1_groups[] = { |
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"gpio44", "gpio45", "gpio46", "gpio47", |
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}; |
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static const char * const blsp_uart0_groups[] = { |
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"gpio16", "gpio17", "gpio60", "gpio61", |
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}; |
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static const char * const blsp_uart1_groups[] = { |
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"gpio8", "gpio9", "gpio10", "gpio11", |
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}; |
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static const char * const chip_rst_groups[] = { |
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"gpio62", |
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}; |
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static const char * const i2s_rx_groups[] = { |
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"gpio0", "gpio1", "gpio2", "gpio20", "gpio21", "gpio22", "gpio23", |
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"gpio58", "gpio60", "gpio61", "gpio63", |
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}; |
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static const char * const i2s_spdif_in_groups[] = { |
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"gpio34", "gpio59", "gpio63", |
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}; |
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static const char * const i2s_spdif_out_groups[] = { |
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"gpio35", "gpio62", "gpio63", |
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}; |
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static const char * const i2s_td_groups[] = { |
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"gpio27", "gpio28", "gpio29", "gpio54", "gpio55", "gpio56", "gpio63", |
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}; |
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static const char * const i2s_tx_groups[] = { |
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"gpio24", "gpio25", "gpio26", "gpio52", "gpio53", "gpio57", "gpio60", |
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"gpio61", |
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}; |
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static const char * const jtag_groups[] = { |
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"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", |
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}; |
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static const char * const led0_groups[] = { |
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"gpio16", "gpio36", "gpio60", |
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}; |
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static const char * const led1_groups[] = { |
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"gpio17", "gpio37", "gpio61", |
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}; |
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static const char * const led2_groups[] = { |
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"gpio36", "gpio38", "gpio58", |
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}; |
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static const char * const led3_groups[] = { |
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"gpio39", |
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}; |
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static const char * const led4_groups[] = { |
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"gpio40", |
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}; |
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static const char * const led5_groups[] = { |
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"gpio44", |
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}; |
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static const char * const led6_groups[] = { |
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"gpio45", |
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}; |
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static const char * const led7_groups[] = { |
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"gpio46", |
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}; |
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static const char * const led8_groups[] = { |
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"gpio47", |
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}; |
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static const char * const led9_groups[] = { |
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"gpio48", |
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}; |
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static const char * const led10_groups[] = { |
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"gpio49", |
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}; |
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static const char * const led11_groups[] = { |
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"gpio50", |
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}; |
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static const char * const mdc_groups[] = { |
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"gpio7", "gpio52", |
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}; |
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static const char * const mdio_groups[] = { |
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"gpio6", "gpio53", |
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}; |
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static const char * const pcie_groups[] = { |
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"gpio39", "gpio52", |
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}; |
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static const char * const pmu_groups[] = { |
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"gpio54", "gpio55", |
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}; |
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static const char * const prng_rosc_groups[] = { |
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"gpio53", |
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}; |
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static const char * const qpic_groups[] = { |
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"gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", |
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"gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", |
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"gpio66", "gpio67", "gpio68", "gpio69", |
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}; |
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static const char * const rgmii_groups[] = { |
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"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", |
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"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", |
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}; |
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static const char * const rmii_groups[] = { |
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"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", |
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"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", |
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"gpio50", "gpio51", |
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}; |
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static const char * const sdio_groups[] = { |
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"gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", |
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"gpio30", "gpio31", "gpio32", |
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}; |
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static const char * const smart0_groups[] = { |
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"gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46", |
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"gpio47", |
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}; |
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static const char * const smart1_groups[] = { |
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"gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60", |
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"gpio61", |
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}; |
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static const char * const smart2_groups[] = { |
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"gpio40", "gpio41", "gpio48", "gpio49", |
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}; |
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static const char * const smart3_groups[] = { |
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"gpio58", "gpio59", "gpio60", "gpio61", |
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}; |
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static const char * const tm_groups[] = { |
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"gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", |
|
"gpio59", "gpio60", "gpio61", "gpio62", "gpio63", |
|
}; |
|
static const char * const wifi0_groups[] = { |
|
"gpio37", "gpio40", "gpio41", "gpio42", "gpio50", "gpio51", "gpio52", |
|
"gpio53", "gpio56", "gpio57", "gpio58", "gpio98", |
|
}; |
|
static const char * const wifi1_groups[] = { |
|
"gpio37", "gpio40", "gpio41", "gpio43", "gpio50", "gpio51", "gpio52", |
|
"gpio53", "gpio56", "gpio57", "gpio58", "gpio98", |
|
}; |
|
|
|
static const struct msm_function ipq4019_functions[] = { |
|
FUNCTION(aud_pin), |
|
FUNCTION(audio_pwm), |
|
FUNCTION(blsp_i2c0), |
|
FUNCTION(blsp_i2c1), |
|
FUNCTION(blsp_spi0), |
|
FUNCTION(blsp_spi1), |
|
FUNCTION(blsp_uart0), |
|
FUNCTION(blsp_uart1), |
|
FUNCTION(chip_rst), |
|
FUNCTION(gpio), |
|
FUNCTION(i2s_rx), |
|
FUNCTION(i2s_spdif_in), |
|
FUNCTION(i2s_spdif_out), |
|
FUNCTION(i2s_td), |
|
FUNCTION(i2s_tx), |
|
FUNCTION(jtag), |
|
FUNCTION(led0), |
|
FUNCTION(led1), |
|
FUNCTION(led2), |
|
FUNCTION(led3), |
|
FUNCTION(led4), |
|
FUNCTION(led5), |
|
FUNCTION(led6), |
|
FUNCTION(led7), |
|
FUNCTION(led8), |
|
FUNCTION(led9), |
|
FUNCTION(led10), |
|
FUNCTION(led11), |
|
FUNCTION(mdc), |
|
FUNCTION(mdio), |
|
FUNCTION(pcie), |
|
FUNCTION(pmu), |
|
FUNCTION(prng_rosc), |
|
FUNCTION(qpic), |
|
FUNCTION(rgmii), |
|
FUNCTION(rmii), |
|
FUNCTION(sdio), |
|
FUNCTION(smart0), |
|
FUNCTION(smart1), |
|
FUNCTION(smart2), |
|
FUNCTION(smart3), |
|
FUNCTION(tm), |
|
FUNCTION(wifi0), |
|
FUNCTION(wifi1), |
|
}; |
|
|
|
static const struct msm_pingroup ipq4019_groups[] = { |
|
PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA, NA), |
|
PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA, NA), |
|
PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA, |
|
NA, NA, NA, NA, NA), |
|
PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA, |
|
NA, NA, NA, NA), |
|
PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA, |
|
NA, NA, NA), |
|
PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA, |
|
NA, NA, NA, NA, NA), |
|
PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA, |
|
NA, NA, NA), |
|
PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA, |
|
NA, NA, NA, NA), |
|
PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA, |
|
NA, NA, NA, NA), |
|
PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm, |
|
wifi0, wifi1, NA, NA, NA), |
|
PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA, |
|
NA, NA, tm, NA, NA, NA), |
|
PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx, |
|
NA, NA, NA, NA, NA, tm, NA), |
|
PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx, |
|
NA, NA, NA, NA, NA, tm, NA), |
|
PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA, |
|
tm, NA, NA, NA), |
|
PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out, |
|
i2s_spdif_in, NA, NA, NA, NA, tm, NA), |
|
PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA, NA), |
|
PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, |
|
NA), |
|
PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), |
|
}; |
|
|
|
static const struct msm_pinctrl_soc_data ipq4019_pinctrl = { |
|
.pins = ipq4019_pins, |
|
.npins = ARRAY_SIZE(ipq4019_pins), |
|
.functions = ipq4019_functions, |
|
.nfunctions = ARRAY_SIZE(ipq4019_functions), |
|
.groups = ipq4019_groups, |
|
.ngroups = ARRAY_SIZE(ipq4019_groups), |
|
.ngpios = 100, |
|
.pull_no_keeper = true, |
|
}; |
|
|
|
static int ipq4019_pinctrl_probe(struct platform_device *pdev) |
|
{ |
|
return msm_pinctrl_probe(pdev, &ipq4019_pinctrl); |
|
} |
|
|
|
static const struct of_device_id ipq4019_pinctrl_of_match[] = { |
|
{ .compatible = "qcom,ipq4019-pinctrl", }, |
|
{ }, |
|
}; |
|
|
|
static struct platform_driver ipq4019_pinctrl_driver = { |
|
.driver = { |
|
.name = "ipq4019-pinctrl", |
|
.of_match_table = ipq4019_pinctrl_of_match, |
|
}, |
|
.probe = ipq4019_pinctrl_probe, |
|
.remove = msm_pinctrl_remove, |
|
}; |
|
|
|
static int __init ipq4019_pinctrl_init(void) |
|
{ |
|
return platform_driver_register(&ipq4019_pinctrl_driver); |
|
} |
|
arch_initcall(ipq4019_pinctrl_init); |
|
|
|
static void __exit ipq4019_pinctrl_exit(void) |
|
{ |
|
platform_driver_unregister(&ipq4019_pinctrl_driver); |
|
} |
|
module_exit(ipq4019_pinctrl_exit); |
|
|
|
MODULE_DESCRIPTION("Qualcomm ipq4019 pinctrl driver"); |
|
MODULE_LICENSE("GPL v2"); |
|
MODULE_DEVICE_TABLE(of, ipq4019_pinctrl_of_match);
|
|
|