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201 lines
3.4 KiB
201 lines
3.4 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* linux/drivers/pinctrl/pinctrl-lantiq.h |
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* based on linux/drivers/pinctrl/pinctrl-pxa3xx.h |
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* |
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* Copyright (C) 2012 John Crispin <[email protected]> |
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*/ |
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#ifndef __PINCTRL_LANTIQ_H |
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#define __PINCTRL_LANTIQ_H |
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#include <linux/clkdev.h> |
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#include <linux/pinctrl/pinctrl.h> |
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#include <linux/pinctrl/pinconf.h> |
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#include <linux/pinctrl/pinmux.h> |
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#include <linux/pinctrl/consumer.h> |
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#include <linux/pinctrl/machine.h> |
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#include "core.h" |
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#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) |
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#define LTQ_MAX_MUX 4 |
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#define MFPR_FUNC_MASK 0x3 |
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#define LTQ_PINCONF_PACK(param, arg) ((param) << 16 | (arg)) |
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#define LTQ_PINCONF_UNPACK_PARAM(conf) ((conf) >> 16) |
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#define LTQ_PINCONF_UNPACK_ARG(conf) ((conf) & 0xffff) |
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enum ltq_pinconf_param { |
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LTQ_PINCONF_PARAM_PULL, |
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LTQ_PINCONF_PARAM_OPEN_DRAIN, |
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LTQ_PINCONF_PARAM_DRIVE_CURRENT, |
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LTQ_PINCONF_PARAM_SLEW_RATE, |
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LTQ_PINCONF_PARAM_OUTPUT, |
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}; |
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struct ltq_cfg_param { |
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const char *property; |
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enum ltq_pinconf_param param; |
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}; |
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struct ltq_mfp_pin { |
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const char *name; |
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const unsigned int pin; |
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const unsigned short func[LTQ_MAX_MUX]; |
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}; |
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struct ltq_pin_group { |
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const char *name; |
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const unsigned mux; |
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const unsigned *pins; |
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const unsigned npins; |
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}; |
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struct ltq_pmx_func { |
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const char *name; |
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const char * const *groups; |
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const unsigned num_groups; |
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}; |
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struct ltq_pinmux_info { |
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struct device *dev; |
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struct pinctrl_dev *pctrl; |
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/* we need to manage up to 5 pad controllers */ |
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void __iomem *membase[5]; |
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/* the descriptor for the subsystem */ |
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struct pinctrl_desc *desc; |
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/* we expose our pads to the subsystem */ |
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struct pinctrl_pin_desc *pads; |
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/* the number of pads. this varies between socs */ |
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unsigned int num_pads; |
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/* these are our multifunction pins */ |
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const struct ltq_mfp_pin *mfp; |
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unsigned int num_mfp; |
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/* a number of multifunction pins can be grouped together */ |
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const struct ltq_pin_group *grps; |
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unsigned int num_grps; |
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/* a mapping between function string and id */ |
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const struct ltq_pmx_func *funcs; |
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unsigned int num_funcs; |
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/* the pinconf options that we are able to read from the DT */ |
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const struct ltq_cfg_param *params; |
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unsigned int num_params; |
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/* the pad controller can have a irq mapping */ |
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const unsigned *exin; |
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unsigned int num_exin; |
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/* we need 5 clocks max */ |
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struct clk *clk[5]; |
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/* soc specific callback used to apply muxing */ |
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int (*apply_mux)(struct pinctrl_dev *pctrldev, int pin, int mux); |
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}; |
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enum ltq_pin { |
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GPIO0 = 0, |
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GPIO1, |
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GPIO2, |
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GPIO3, |
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GPIO4, |
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GPIO5, |
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GPIO6, |
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GPIO7, |
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GPIO8, |
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GPIO9, |
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GPIO10, /* 10 */ |
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GPIO11, |
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GPIO12, |
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GPIO13, |
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GPIO14, |
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GPIO15, |
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GPIO16, |
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GPIO17, |
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GPIO18, |
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GPIO19, |
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GPIO20, /* 20 */ |
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GPIO21, |
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GPIO22, |
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GPIO23, |
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GPIO24, |
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GPIO25, |
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GPIO26, |
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GPIO27, |
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GPIO28, |
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GPIO29, |
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GPIO30, /* 30 */ |
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GPIO31, |
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GPIO32, |
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GPIO33, |
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GPIO34, |
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GPIO35, |
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GPIO36, |
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GPIO37, |
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GPIO38, |
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GPIO39, |
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GPIO40, /* 40 */ |
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GPIO41, |
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GPIO42, |
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GPIO43, |
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GPIO44, |
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GPIO45, |
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GPIO46, |
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GPIO47, |
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GPIO48, |
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GPIO49, |
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GPIO50, /* 50 */ |
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GPIO51, |
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GPIO52, |
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GPIO53, |
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GPIO54, |
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GPIO55, |
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GPIO56, |
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GPIO57, |
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GPIO58, |
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GPIO59, |
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GPIO60, /* 60 */ |
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GPIO61, |
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GPIO62, |
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GPIO63, |
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GPIO64, |
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GPIO65, |
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GPIO66, |
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GPIO67, |
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GPIO68, |
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GPIO69, |
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GPIO70, |
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GPIO71, |
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GPIO72, |
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GPIO73, |
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GPIO74, |
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GPIO75, |
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GPIO76, |
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GPIO77, |
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GPIO78, |
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GPIO79, |
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GPIO80, |
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GPIO81, |
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GPIO82, |
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GPIO83, |
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GPIO84, |
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GPIO85, |
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GPIO86, |
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GPIO87, |
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GPIO88, |
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}; |
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extern int ltq_pinctrl_register(struct platform_device *pdev, |
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struct ltq_pinmux_info *info); |
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extern int ltq_pinctrl_unregister(struct platform_device *pdev); |
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#endif /* __PINCTRL_LANTIQ_H */
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