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112 lines
2.5 KiB
112 lines
2.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (C) 2008 Christian Lamparter <[email protected]> |
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* |
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* This driver is a port from stlc45xx: |
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* Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies). |
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*/ |
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#ifndef P54SPI_H |
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#define P54SPI_H |
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#include <linux/mutex.h> |
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#include <linux/list.h> |
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#include <net/mac80211.h> |
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#include "p54.h" |
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/* Bit 15 is read/write bit; ON = READ, OFF = WRITE */ |
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#define SPI_ADRS_READ_BIT_15 0x8000 |
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#define SPI_ADRS_ARM_INTERRUPTS 0x00 |
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#define SPI_ADRS_ARM_INT_EN 0x04 |
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#define SPI_ADRS_HOST_INTERRUPTS 0x08 |
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#define SPI_ADRS_HOST_INT_EN 0x0c |
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#define SPI_ADRS_HOST_INT_ACK 0x10 |
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#define SPI_ADRS_GEN_PURP_1 0x14 |
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#define SPI_ADRS_GEN_PURP_2 0x18 |
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#define SPI_ADRS_DEV_CTRL_STAT 0x26 /* high word */ |
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#define SPI_ADRS_DMA_DATA 0x28 |
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#define SPI_ADRS_DMA_WRITE_CTRL 0x2c |
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#define SPI_ADRS_DMA_WRITE_LEN 0x2e |
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#define SPI_ADRS_DMA_WRITE_BASE 0x30 |
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#define SPI_ADRS_DMA_READ_CTRL 0x34 |
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#define SPI_ADRS_DMA_READ_LEN 0x36 |
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#define SPI_ADRS_DMA_READ_BASE 0x38 |
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#define SPI_CTRL_STAT_HOST_OVERRIDE 0x8000 |
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#define SPI_CTRL_STAT_START_HALTED 0x4000 |
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#define SPI_CTRL_STAT_RAM_BOOT 0x2000 |
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#define SPI_CTRL_STAT_HOST_RESET 0x1000 |
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#define SPI_CTRL_STAT_HOST_CPU_EN 0x0800 |
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#define SPI_DMA_WRITE_CTRL_ENABLE 0x0001 |
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#define SPI_DMA_READ_CTRL_ENABLE 0x0001 |
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#define HOST_ALLOWED (1 << 7) |
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#define SPI_TIMEOUT 100 /* msec */ |
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#define SPI_MAX_TX_PACKETS 32 |
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#define SPI_MAX_PACKET_SIZE 32767 |
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#define SPI_TARGET_INT_WAKEUP 0x00000001 |
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#define SPI_TARGET_INT_SLEEP 0x00000002 |
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#define SPI_TARGET_INT_RDDONE 0x00000004 |
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#define SPI_TARGET_INT_CTS 0x00004000 |
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#define SPI_TARGET_INT_DR 0x00008000 |
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#define SPI_HOST_INT_READY 0x00000001 |
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#define SPI_HOST_INT_WR_READY 0x00000002 |
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#define SPI_HOST_INT_SW_UPDATE 0x00000004 |
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#define SPI_HOST_INT_UPDATE 0x10000000 |
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/* clear to send */ |
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#define SPI_HOST_INT_CR 0x00004000 |
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/* data ready */ |
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#define SPI_HOST_INT_DR 0x00008000 |
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#define SPI_HOST_INTS_DEFAULT \ |
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(SPI_HOST_INT_READY | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE) |
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#define TARGET_BOOT_SLEEP 50 |
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struct p54s_dma_regs { |
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__le16 cmd; |
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__le16 len; |
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__le32 addr; |
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} __packed; |
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struct p54s_tx_info { |
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struct list_head tx_list; |
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}; |
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struct p54s_priv { |
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/* p54_common has to be the first entry */ |
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struct p54_common common; |
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struct ieee80211_hw *hw; |
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struct spi_device *spi; |
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struct work_struct work; |
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struct mutex mutex; |
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struct completion fw_comp; |
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spinlock_t tx_lock; |
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/* protected by tx_lock */ |
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struct list_head tx_pending; |
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enum fw_state fw_state; |
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const struct firmware *firmware; |
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}; |
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#endif /* P54SPI_H */
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