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120 lines
2.8 KiB
120 lines
2.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */ |
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#include <linux/init.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <uapi/linux/idxd.h> |
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#include "idxd.h" |
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#include "registers.h" |
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static struct idxd_desc *__get_desc(struct idxd_wq *wq, int idx, int cpu) |
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{ |
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struct idxd_desc *desc; |
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struct idxd_device *idxd = wq->idxd; |
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desc = wq->descs[idx]; |
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memset(desc->hw, 0, sizeof(struct dsa_hw_desc)); |
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memset(desc->completion, 0, idxd->compl_size); |
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desc->cpu = cpu; |
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if (device_pasid_enabled(idxd)) |
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desc->hw->pasid = idxd->pasid; |
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/* |
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* Descriptor completion vectors are 1-8 for MSIX. We will round |
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* robin through the 8 vectors. |
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*/ |
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wq->vec_ptr = (wq->vec_ptr % idxd->num_wq_irqs) + 1; |
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desc->hw->int_handle = wq->vec_ptr; |
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return desc; |
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} |
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struct idxd_desc *idxd_alloc_desc(struct idxd_wq *wq, enum idxd_op_type optype) |
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{ |
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int cpu, idx; |
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struct idxd_device *idxd = wq->idxd; |
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DEFINE_SBQ_WAIT(wait); |
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struct sbq_wait_state *ws; |
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struct sbitmap_queue *sbq; |
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if (idxd->state != IDXD_DEV_ENABLED) |
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return ERR_PTR(-EIO); |
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sbq = &wq->sbq; |
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idx = sbitmap_queue_get(sbq, &cpu); |
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if (idx < 0) { |
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if (optype == IDXD_OP_NONBLOCK) |
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return ERR_PTR(-EAGAIN); |
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} else { |
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return __get_desc(wq, idx, cpu); |
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} |
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ws = &sbq->ws[0]; |
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for (;;) { |
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sbitmap_prepare_to_wait(sbq, ws, &wait, TASK_INTERRUPTIBLE); |
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if (signal_pending_state(TASK_INTERRUPTIBLE, current)) |
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break; |
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idx = sbitmap_queue_get(sbq, &cpu); |
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if (idx > 0) |
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break; |
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schedule(); |
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} |
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sbitmap_finish_wait(sbq, ws, &wait); |
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if (idx < 0) |
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return ERR_PTR(-EAGAIN); |
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return __get_desc(wq, idx, cpu); |
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} |
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void idxd_free_desc(struct idxd_wq *wq, struct idxd_desc *desc) |
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{ |
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int cpu = desc->cpu; |
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desc->cpu = -1; |
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sbitmap_queue_clear(&wq->sbq, desc->id, cpu); |
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} |
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int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc) |
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{ |
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struct idxd_device *idxd = wq->idxd; |
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int vec = desc->hw->int_handle; |
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void __iomem *portal; |
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int rc; |
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if (idxd->state != IDXD_DEV_ENABLED) |
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return -EIO; |
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portal = wq->portal; |
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/* |
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* The wmb() flushes writes to coherent DMA data before |
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* possibly triggering a DMA read. The wmb() is necessary |
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* even on UP because the recipient is a device. |
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*/ |
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wmb(); |
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if (wq_dedicated(wq)) { |
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iosubmit_cmds512(portal, desc->hw, 1); |
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} else { |
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/* |
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* It's not likely that we would receive queue full rejection |
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* since the descriptor allocation gates at wq size. If we |
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* receive a -EAGAIN, that means something went wrong such as the |
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* device is not accepting descriptor at all. |
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*/ |
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rc = enqcmds(portal, desc->hw); |
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if (rc < 0) |
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return rc; |
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} |
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/* |
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* Pending the descriptor to the lockless list for the irq_entry |
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* that we designated the descriptor to. |
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*/ |
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if (desc->hw->flags & IDXD_OP_FLAG_RCI) |
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llist_add(&desc->llnode, |
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&idxd->irq_entries[vec].pending_llist); |
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return 0; |
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}
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