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172 lines
4.1 KiB
172 lines
4.1 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
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*/ |
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#include <linux/clk-provider.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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struct ti_syscon_gate_clk_priv { |
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struct clk_hw hw; |
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struct regmap *regmap; |
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u32 reg; |
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u32 idx; |
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}; |
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struct ti_syscon_gate_clk_data { |
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char *name; |
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u32 offset; |
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u32 bit_idx; |
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}; |
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static struct |
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ti_syscon_gate_clk_priv *to_ti_syscon_gate_clk_priv(struct clk_hw *hw) |
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{ |
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return container_of(hw, struct ti_syscon_gate_clk_priv, hw); |
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} |
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static int ti_syscon_gate_clk_enable(struct clk_hw *hw) |
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{ |
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struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw); |
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return regmap_write_bits(priv->regmap, priv->reg, priv->idx, |
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priv->idx); |
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} |
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static void ti_syscon_gate_clk_disable(struct clk_hw *hw) |
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{ |
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struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw); |
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regmap_write_bits(priv->regmap, priv->reg, priv->idx, 0); |
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} |
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static int ti_syscon_gate_clk_is_enabled(struct clk_hw *hw) |
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{ |
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unsigned int val; |
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struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw); |
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regmap_read(priv->regmap, priv->reg, &val); |
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return !!(val & priv->idx); |
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} |
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static const struct clk_ops ti_syscon_gate_clk_ops = { |
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.enable = ti_syscon_gate_clk_enable, |
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.disable = ti_syscon_gate_clk_disable, |
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.is_enabled = ti_syscon_gate_clk_is_enabled, |
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}; |
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static struct clk_hw |
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*ti_syscon_gate_clk_register(struct device *dev, struct regmap *regmap, |
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const struct ti_syscon_gate_clk_data *data) |
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{ |
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struct ti_syscon_gate_clk_priv *priv; |
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struct clk_init_data init; |
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int ret; |
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
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if (!priv) |
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return ERR_PTR(-ENOMEM); |
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init.name = data->name; |
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init.ops = &ti_syscon_gate_clk_ops; |
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init.parent_names = NULL; |
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init.num_parents = 0; |
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init.flags = 0; |
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priv->regmap = regmap; |
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priv->reg = data->offset; |
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priv->idx = BIT(data->bit_idx); |
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priv->hw.init = &init; |
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ret = devm_clk_hw_register(dev, &priv->hw); |
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if (ret) |
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return ERR_PTR(ret); |
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return &priv->hw; |
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} |
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static int ti_syscon_gate_clk_probe(struct platform_device *pdev) |
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{ |
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const struct ti_syscon_gate_clk_data *data, *p; |
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struct clk_hw_onecell_data *hw_data; |
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struct device *dev = &pdev->dev; |
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struct regmap *regmap; |
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int num_clks, i; |
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data = device_get_match_data(dev); |
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if (!data) |
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return -EINVAL; |
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regmap = syscon_node_to_regmap(dev->of_node); |
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if (IS_ERR(regmap)) { |
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if (PTR_ERR(regmap) == -EPROBE_DEFER) |
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return -EPROBE_DEFER; |
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dev_err(dev, "failed to find parent regmap\n"); |
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return PTR_ERR(regmap); |
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} |
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num_clks = 0; |
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for (p = data; p->name; p++) |
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num_clks++; |
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hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, num_clks), |
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GFP_KERNEL); |
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if (!hw_data) |
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return -ENOMEM; |
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hw_data->num = num_clks; |
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for (i = 0; i < num_clks; i++) { |
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hw_data->hws[i] = ti_syscon_gate_clk_register(dev, regmap, |
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&data[i]); |
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if (IS_ERR(hw_data->hws[i])) |
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dev_warn(dev, "failed to register %s\n", |
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data[i].name); |
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} |
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, |
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hw_data); |
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} |
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#define TI_SYSCON_CLK_GATE(_name, _offset, _bit_idx) \ |
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{ \ |
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.name = _name, \ |
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.offset = (_offset), \ |
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.bit_idx = (_bit_idx), \ |
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} |
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static const struct ti_syscon_gate_clk_data am654_clk_data[] = { |
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TI_SYSCON_CLK_GATE("ehrpwm_tbclk0", 0x0, 0), |
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TI_SYSCON_CLK_GATE("ehrpwm_tbclk1", 0x4, 0), |
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TI_SYSCON_CLK_GATE("ehrpwm_tbclk2", 0x8, 0), |
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TI_SYSCON_CLK_GATE("ehrpwm_tbclk3", 0xc, 0), |
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TI_SYSCON_CLK_GATE("ehrpwm_tbclk4", 0x10, 0), |
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TI_SYSCON_CLK_GATE("ehrpwm_tbclk5", 0x14, 0), |
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{ /* Sentinel */ }, |
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}; |
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static const struct of_device_id ti_syscon_gate_clk_ids[] = { |
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{ |
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.compatible = "ti,am654-ehrpwm-tbclk", |
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.data = &am654_clk_data, |
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}, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids); |
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static struct platform_driver ti_syscon_gate_clk_driver = { |
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.probe = ti_syscon_gate_clk_probe, |
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.driver = { |
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.name = "ti-syscon-gate-clk", |
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.of_match_table = ti_syscon_gate_clk_ids, |
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}, |
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}; |
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module_platform_driver(ti_syscon_gate_clk_driver); |
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MODULE_AUTHOR("Vignesh Raghavendra <[email protected]>"); |
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MODULE_DESCRIPTION("Syscon backed gate-clock driver"); |
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MODULE_LICENSE("GPL");
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