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1081 lines
24 KiB
1081 lines
24 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Intel & MS High Precision Event Timer Implementation. |
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* |
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* Copyright (C) 2003 Intel Corporation |
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* Venki Pallipadi |
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* (c) Copyright 2004 Hewlett-Packard Development Company, L.P. |
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* Bob Picco <[email protected]> |
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*/ |
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|
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#include <linux/interrupt.h> |
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#include <linux/kernel.h> |
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#include <linux/types.h> |
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#include <linux/miscdevice.h> |
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#include <linux/major.h> |
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#include <linux/ioport.h> |
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#include <linux/fcntl.h> |
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#include <linux/init.h> |
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#include <linux/poll.h> |
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#include <linux/mm.h> |
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#include <linux/proc_fs.h> |
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#include <linux/spinlock.h> |
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#include <linux/sysctl.h> |
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#include <linux/wait.h> |
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#include <linux/sched/signal.h> |
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#include <linux/bcd.h> |
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#include <linux/seq_file.h> |
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#include <linux/bitops.h> |
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#include <linux/compat.h> |
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#include <linux/clocksource.h> |
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#include <linux/uaccess.h> |
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#include <linux/slab.h> |
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#include <linux/io.h> |
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#include <linux/acpi.h> |
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#include <linux/hpet.h> |
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#include <asm/current.h> |
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#include <asm/irq.h> |
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#include <asm/div64.h> |
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|
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/* |
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* The High Precision Event Timer driver. |
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* This driver is closely modelled after the rtc.c driver. |
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* See HPET spec revision 1. |
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*/ |
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#define HPET_USER_FREQ (64) |
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#define HPET_DRIFT (500) |
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|
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#define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
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|
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/* WARNING -- don't get confused. These macros are never used |
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* to write the (single) counter, and rarely to read it. |
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* They're badly named; to fix, someday. |
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*/ |
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#if BITS_PER_LONG == 64 |
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#define write_counter(V, MC) writeq(V, MC) |
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#define read_counter(MC) readq(MC) |
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#else |
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#define write_counter(V, MC) writel(V, MC) |
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#define read_counter(MC) readl(MC) |
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#endif |
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|
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static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ |
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static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
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|
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/* This clocksource driver currently only works on ia64 */ |
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#ifdef CONFIG_IA64 |
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static void __iomem *hpet_mctr; |
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|
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static u64 read_hpet(struct clocksource *cs) |
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{ |
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return (u64)read_counter((void __iomem *)hpet_mctr); |
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} |
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|
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static struct clocksource clocksource_hpet = { |
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.name = "hpet", |
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.rating = 250, |
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.read = read_hpet, |
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.mask = CLOCKSOURCE_MASK(64), |
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.flags = CLOCK_SOURCE_IS_CONTINUOUS, |
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}; |
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static struct clocksource *hpet_clocksource; |
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#endif |
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|
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/* A lock for concurrent access by app and isr hpet activity. */ |
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static DEFINE_SPINLOCK(hpet_lock); |
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|
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#define HPET_DEV_NAME (7) |
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|
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struct hpet_dev { |
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struct hpets *hd_hpets; |
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struct hpet __iomem *hd_hpet; |
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struct hpet_timer __iomem *hd_timer; |
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unsigned long hd_ireqfreq; |
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unsigned long hd_irqdata; |
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wait_queue_head_t hd_waitqueue; |
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struct fasync_struct *hd_async_queue; |
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unsigned int hd_flags; |
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unsigned int hd_irq; |
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unsigned int hd_hdwirq; |
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char hd_name[HPET_DEV_NAME]; |
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}; |
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|
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struct hpets { |
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struct hpets *hp_next; |
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struct hpet __iomem *hp_hpet; |
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unsigned long hp_hpet_phys; |
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struct clocksource *hp_clocksource; |
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unsigned long long hp_tick_freq; |
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unsigned long hp_delta; |
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unsigned int hp_ntimer; |
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unsigned int hp_which; |
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struct hpet_dev hp_dev[]; |
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}; |
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|
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static struct hpets *hpets; |
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|
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#define HPET_OPEN 0x0001 |
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#define HPET_IE 0x0002 /* interrupt enabled */ |
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#define HPET_PERIODIC 0x0004 |
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#define HPET_SHARED_IRQ 0x0008 |
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|
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|
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#ifndef readq |
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static inline unsigned long long readq(void __iomem *addr) |
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{ |
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return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); |
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} |
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#endif |
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|
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#ifndef writeq |
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static inline void writeq(unsigned long long v, void __iomem *addr) |
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{ |
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writel(v & 0xffffffff, addr); |
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writel(v >> 32, addr + 4); |
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} |
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#endif |
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|
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static irqreturn_t hpet_interrupt(int irq, void *data) |
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{ |
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struct hpet_dev *devp; |
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unsigned long isr; |
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|
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devp = data; |
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isr = 1 << (devp - devp->hd_hpets->hp_dev); |
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|
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if ((devp->hd_flags & HPET_SHARED_IRQ) && |
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!(isr & readl(&devp->hd_hpet->hpet_isr))) |
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return IRQ_NONE; |
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|
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spin_lock(&hpet_lock); |
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devp->hd_irqdata++; |
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|
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/* |
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* For non-periodic timers, increment the accumulator. |
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* This has the effect of treating non-periodic like periodic. |
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*/ |
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if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { |
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unsigned long m, t, mc, base, k; |
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struct hpet __iomem *hpet = devp->hd_hpet; |
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struct hpets *hpetp = devp->hd_hpets; |
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|
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t = devp->hd_ireqfreq; |
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m = read_counter(&devp->hd_timer->hpet_compare); |
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mc = read_counter(&hpet->hpet_mc); |
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/* The time for the next interrupt would logically be t + m, |
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* however, if we are very unlucky and the interrupt is delayed |
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* for longer than t then we will completely miss the next |
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* interrupt if we set t + m and an application will hang. |
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* Therefore we need to make a more complex computation assuming |
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* that there exists a k for which the following is true: |
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* k * t + base < mc + delta |
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* (k + 1) * t + base > mc + delta |
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* where t is the interval in hpet ticks for the given freq, |
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* base is the theoretical start value 0 < base < t, |
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* mc is the main counter value at the time of the interrupt, |
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* delta is the time it takes to write the a value to the |
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* comparator. |
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* k may then be computed as (mc - base + delta) / t . |
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*/ |
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base = mc % t; |
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k = (mc - base + hpetp->hp_delta) / t; |
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write_counter(t * (k + 1) + base, |
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&devp->hd_timer->hpet_compare); |
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} |
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|
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if (devp->hd_flags & HPET_SHARED_IRQ) |
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writel(isr, &devp->hd_hpet->hpet_isr); |
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spin_unlock(&hpet_lock); |
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|
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wake_up_interruptible(&devp->hd_waitqueue); |
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|
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kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); |
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|
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return IRQ_HANDLED; |
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} |
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|
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static void hpet_timer_set_irq(struct hpet_dev *devp) |
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{ |
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unsigned long v; |
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int irq, gsi; |
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struct hpet_timer __iomem *timer; |
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|
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spin_lock_irq(&hpet_lock); |
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if (devp->hd_hdwirq) { |
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spin_unlock_irq(&hpet_lock); |
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return; |
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} |
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|
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timer = devp->hd_timer; |
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|
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/* we prefer level triggered mode */ |
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v = readl(&timer->hpet_config); |
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if (!(v & Tn_INT_TYPE_CNF_MASK)) { |
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v |= Tn_INT_TYPE_CNF_MASK; |
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writel(v, &timer->hpet_config); |
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} |
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spin_unlock_irq(&hpet_lock); |
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|
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v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> |
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Tn_INT_ROUTE_CAP_SHIFT; |
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|
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/* |
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* In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by |
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* legacy device. In IO APIC mode, we skip all the legacy IRQS. |
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*/ |
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if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) |
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v &= ~0xf3df; |
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else |
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v &= ~0xffff; |
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|
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for_each_set_bit(irq, &v, HPET_MAX_IRQ) { |
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if (irq >= nr_irqs) { |
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irq = HPET_MAX_IRQ; |
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break; |
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} |
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|
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gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, |
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ACPI_ACTIVE_LOW); |
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if (gsi > 0) |
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break; |
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|
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/* FIXME: Setup interrupt source table */ |
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} |
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|
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if (irq < HPET_MAX_IRQ) { |
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spin_lock_irq(&hpet_lock); |
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v = readl(&timer->hpet_config); |
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v |= irq << Tn_INT_ROUTE_CNF_SHIFT; |
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writel(v, &timer->hpet_config); |
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devp->hd_hdwirq = gsi; |
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spin_unlock_irq(&hpet_lock); |
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} |
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return; |
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} |
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|
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static int hpet_open(struct inode *inode, struct file *file) |
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{ |
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struct hpet_dev *devp; |
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struct hpets *hpetp; |
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int i; |
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if (file->f_mode & FMODE_WRITE) |
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return -EINVAL; |
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mutex_lock(&hpet_mutex); |
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spin_lock_irq(&hpet_lock); |
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|
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for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) |
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for (i = 0; i < hpetp->hp_ntimer; i++) |
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if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) |
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continue; |
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else { |
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devp = &hpetp->hp_dev[i]; |
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break; |
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} |
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|
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if (!devp) { |
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spin_unlock_irq(&hpet_lock); |
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mutex_unlock(&hpet_mutex); |
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return -EBUSY; |
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} |
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file->private_data = devp; |
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devp->hd_irqdata = 0; |
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devp->hd_flags |= HPET_OPEN; |
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spin_unlock_irq(&hpet_lock); |
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mutex_unlock(&hpet_mutex); |
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hpet_timer_set_irq(devp); |
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return 0; |
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} |
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static ssize_t |
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hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) |
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{ |
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DECLARE_WAITQUEUE(wait, current); |
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unsigned long data; |
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ssize_t retval; |
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struct hpet_dev *devp; |
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devp = file->private_data; |
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if (!devp->hd_ireqfreq) |
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return -EIO; |
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if (count < sizeof(unsigned long)) |
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return -EINVAL; |
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add_wait_queue(&devp->hd_waitqueue, &wait); |
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for ( ; ; ) { |
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set_current_state(TASK_INTERRUPTIBLE); |
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spin_lock_irq(&hpet_lock); |
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data = devp->hd_irqdata; |
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devp->hd_irqdata = 0; |
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spin_unlock_irq(&hpet_lock); |
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if (data) |
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break; |
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else if (file->f_flags & O_NONBLOCK) { |
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retval = -EAGAIN; |
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goto out; |
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} else if (signal_pending(current)) { |
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retval = -ERESTARTSYS; |
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goto out; |
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} |
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schedule(); |
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} |
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retval = put_user(data, (unsigned long __user *)buf); |
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if (!retval) |
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retval = sizeof(unsigned long); |
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out: |
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__set_current_state(TASK_RUNNING); |
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remove_wait_queue(&devp->hd_waitqueue, &wait); |
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return retval; |
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} |
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static __poll_t hpet_poll(struct file *file, poll_table * wait) |
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{ |
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unsigned long v; |
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struct hpet_dev *devp; |
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devp = file->private_data; |
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if (!devp->hd_ireqfreq) |
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return 0; |
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poll_wait(file, &devp->hd_waitqueue, wait); |
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spin_lock_irq(&hpet_lock); |
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v = devp->hd_irqdata; |
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spin_unlock_irq(&hpet_lock); |
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if (v != 0) |
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return EPOLLIN | EPOLLRDNORM; |
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|
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return 0; |
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} |
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|
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#ifdef CONFIG_HPET_MMAP |
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#ifdef CONFIG_HPET_MMAP_DEFAULT |
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static int hpet_mmap_enabled = 1; |
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#else |
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static int hpet_mmap_enabled = 0; |
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#endif |
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|
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static __init int hpet_mmap_enable(char *str) |
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{ |
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get_option(&str, &hpet_mmap_enabled); |
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pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled"); |
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return 1; |
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} |
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__setup("hpet_mmap=", hpet_mmap_enable); |
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|
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static int hpet_mmap(struct file *file, struct vm_area_struct *vma) |
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{ |
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struct hpet_dev *devp; |
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unsigned long addr; |
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|
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if (!hpet_mmap_enabled) |
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return -EACCES; |
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devp = file->private_data; |
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addr = devp->hd_hpets->hp_hpet_phys; |
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|
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if (addr & (PAGE_SIZE - 1)) |
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return -ENOSYS; |
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|
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
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return vm_iomap_memory(vma, addr, PAGE_SIZE); |
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} |
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#else |
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static int hpet_mmap(struct file *file, struct vm_area_struct *vma) |
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{ |
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return -ENOSYS; |
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} |
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#endif |
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|
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static int hpet_fasync(int fd, struct file *file, int on) |
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{ |
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struct hpet_dev *devp; |
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|
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devp = file->private_data; |
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|
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if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) |
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return 0; |
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else |
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return -EIO; |
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} |
|
|
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static int hpet_release(struct inode *inode, struct file *file) |
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{ |
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struct hpet_dev *devp; |
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struct hpet_timer __iomem *timer; |
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int irq = 0; |
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|
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devp = file->private_data; |
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timer = devp->hd_timer; |
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|
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spin_lock_irq(&hpet_lock); |
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|
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writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), |
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&timer->hpet_config); |
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|
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irq = devp->hd_irq; |
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devp->hd_irq = 0; |
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|
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devp->hd_ireqfreq = 0; |
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|
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if (devp->hd_flags & HPET_PERIODIC |
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&& readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { |
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unsigned long v; |
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|
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v = readq(&timer->hpet_config); |
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v ^= Tn_TYPE_CNF_MASK; |
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writeq(v, &timer->hpet_config); |
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} |
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|
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devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); |
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spin_unlock_irq(&hpet_lock); |
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|
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if (irq) |
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free_irq(irq, devp); |
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|
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file->private_data = NULL; |
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return 0; |
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} |
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|
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static int hpet_ioctl_ieon(struct hpet_dev *devp) |
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{ |
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struct hpet_timer __iomem *timer; |
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struct hpet __iomem *hpet; |
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struct hpets *hpetp; |
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int irq; |
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unsigned long g, v, t, m; |
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unsigned long flags, isr; |
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|
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timer = devp->hd_timer; |
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hpet = devp->hd_hpet; |
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hpetp = devp->hd_hpets; |
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|
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if (!devp->hd_ireqfreq) |
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return -EIO; |
|
|
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spin_lock_irq(&hpet_lock); |
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|
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if (devp->hd_flags & HPET_IE) { |
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spin_unlock_irq(&hpet_lock); |
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return -EBUSY; |
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} |
|
|
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devp->hd_flags |= HPET_IE; |
|
|
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if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) |
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devp->hd_flags |= HPET_SHARED_IRQ; |
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spin_unlock_irq(&hpet_lock); |
|
|
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irq = devp->hd_hdwirq; |
|
|
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if (irq) { |
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unsigned long irq_flags; |
|
|
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if (devp->hd_flags & HPET_SHARED_IRQ) { |
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/* |
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* To prevent the interrupt handler from seeing an |
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* unwanted interrupt status bit, program the timer |
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* so that it will not fire in the near future ... |
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*/ |
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writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, |
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&timer->hpet_config); |
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write_counter(read_counter(&hpet->hpet_mc), |
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&timer->hpet_compare); |
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/* ... and clear any left-over status. */ |
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isr = 1 << (devp - devp->hd_hpets->hp_dev); |
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writel(isr, &hpet->hpet_isr); |
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} |
|
|
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sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
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irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0; |
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if (request_irq(irq, hpet_interrupt, irq_flags, |
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devp->hd_name, (void *)devp)) { |
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printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
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irq = 0; |
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} |
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} |
|
|
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if (irq == 0) { |
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spin_lock_irq(&hpet_lock); |
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devp->hd_flags ^= HPET_IE; |
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spin_unlock_irq(&hpet_lock); |
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return -EIO; |
|
} |
|
|
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devp->hd_irq = irq; |
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t = devp->hd_ireqfreq; |
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v = readq(&timer->hpet_config); |
|
|
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/* 64-bit comparators are not yet supported through the ioctls, |
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* so force this into 32-bit mode if it supports both modes |
|
*/ |
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g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; |
|
|
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if (devp->hd_flags & HPET_PERIODIC) { |
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g |= Tn_TYPE_CNF_MASK; |
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v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; |
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writeq(v, &timer->hpet_config); |
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local_irq_save(flags); |
|
|
|
/* |
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* NOTE: First we modify the hidden accumulator |
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* register supported by periodic-capable comparators. |
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* We never want to modify the (single) counter; that |
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* would affect all the comparators. The value written |
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* is the counter value when the first interrupt is due. |
|
*/ |
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m = read_counter(&hpet->hpet_mc); |
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write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); |
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/* |
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* Then we modify the comparator, indicating the period |
|
* for subsequent interrupt. |
|
*/ |
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write_counter(t, &timer->hpet_compare); |
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} else { |
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local_irq_save(flags); |
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m = read_counter(&hpet->hpet_mc); |
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write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); |
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} |
|
|
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if (devp->hd_flags & HPET_SHARED_IRQ) { |
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isr = 1 << (devp - devp->hd_hpets->hp_dev); |
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writel(isr, &hpet->hpet_isr); |
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} |
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writeq(g, &timer->hpet_config); |
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local_irq_restore(flags); |
|
|
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return 0; |
|
} |
|
|
|
/* converts Hz to number of timer ticks */ |
|
static inline unsigned long hpet_time_div(struct hpets *hpets, |
|
unsigned long dis) |
|
{ |
|
unsigned long long m; |
|
|
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m = hpets->hp_tick_freq + (dis >> 1); |
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return div64_ul(m, dis); |
|
} |
|
|
|
static int |
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hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg, |
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struct hpet_info *info) |
|
{ |
|
struct hpet_timer __iomem *timer; |
|
struct hpets *hpetp; |
|
int err; |
|
unsigned long v; |
|
|
|
switch (cmd) { |
|
case HPET_IE_OFF: |
|
case HPET_INFO: |
|
case HPET_EPI: |
|
case HPET_DPI: |
|
case HPET_IRQFREQ: |
|
timer = devp->hd_timer; |
|
hpetp = devp->hd_hpets; |
|
break; |
|
case HPET_IE_ON: |
|
return hpet_ioctl_ieon(devp); |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
err = 0; |
|
|
|
switch (cmd) { |
|
case HPET_IE_OFF: |
|
if ((devp->hd_flags & HPET_IE) == 0) |
|
break; |
|
v = readq(&timer->hpet_config); |
|
v &= ~Tn_INT_ENB_CNF_MASK; |
|
writeq(v, &timer->hpet_config); |
|
if (devp->hd_irq) { |
|
free_irq(devp->hd_irq, devp); |
|
devp->hd_irq = 0; |
|
} |
|
devp->hd_flags ^= HPET_IE; |
|
break; |
|
case HPET_INFO: |
|
{ |
|
memset(info, 0, sizeof(*info)); |
|
if (devp->hd_ireqfreq) |
|
info->hi_ireqfreq = |
|
hpet_time_div(hpetp, devp->hd_ireqfreq); |
|
info->hi_flags = |
|
readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; |
|
info->hi_hpet = hpetp->hp_which; |
|
info->hi_timer = devp - hpetp->hp_dev; |
|
break; |
|
} |
|
case HPET_EPI: |
|
v = readq(&timer->hpet_config); |
|
if ((v & Tn_PER_INT_CAP_MASK) == 0) { |
|
err = -ENXIO; |
|
break; |
|
} |
|
devp->hd_flags |= HPET_PERIODIC; |
|
break; |
|
case HPET_DPI: |
|
v = readq(&timer->hpet_config); |
|
if ((v & Tn_PER_INT_CAP_MASK) == 0) { |
|
err = -ENXIO; |
|
break; |
|
} |
|
if (devp->hd_flags & HPET_PERIODIC && |
|
readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { |
|
v = readq(&timer->hpet_config); |
|
v ^= Tn_TYPE_CNF_MASK; |
|
writeq(v, &timer->hpet_config); |
|
} |
|
devp->hd_flags &= ~HPET_PERIODIC; |
|
break; |
|
case HPET_IRQFREQ: |
|
if ((arg > hpet_max_freq) && |
|
!capable(CAP_SYS_RESOURCE)) { |
|
err = -EACCES; |
|
break; |
|
} |
|
|
|
if (!arg) { |
|
err = -EINVAL; |
|
break; |
|
} |
|
|
|
devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
|
} |
|
|
|
return err; |
|
} |
|
|
|
static long |
|
hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
|
{ |
|
struct hpet_info info; |
|
int err; |
|
|
|
mutex_lock(&hpet_mutex); |
|
err = hpet_ioctl_common(file->private_data, cmd, arg, &info); |
|
mutex_unlock(&hpet_mutex); |
|
|
|
if ((cmd == HPET_INFO) && !err && |
|
(copy_to_user((void __user *)arg, &info, sizeof(info)))) |
|
err = -EFAULT; |
|
|
|
return err; |
|
} |
|
|
|
#ifdef CONFIG_COMPAT |
|
struct compat_hpet_info { |
|
compat_ulong_t hi_ireqfreq; /* Hz */ |
|
compat_ulong_t hi_flags; /* information */ |
|
unsigned short hi_hpet; |
|
unsigned short hi_timer; |
|
}; |
|
|
|
static long |
|
hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
|
{ |
|
struct hpet_info info; |
|
int err; |
|
|
|
mutex_lock(&hpet_mutex); |
|
err = hpet_ioctl_common(file->private_data, cmd, arg, &info); |
|
mutex_unlock(&hpet_mutex); |
|
|
|
if ((cmd == HPET_INFO) && !err) { |
|
struct compat_hpet_info __user *u = compat_ptr(arg); |
|
if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || |
|
put_user(info.hi_flags, &u->hi_flags) || |
|
put_user(info.hi_hpet, &u->hi_hpet) || |
|
put_user(info.hi_timer, &u->hi_timer)) |
|
err = -EFAULT; |
|
} |
|
|
|
return err; |
|
} |
|
#endif |
|
|
|
static const struct file_operations hpet_fops = { |
|
.owner = THIS_MODULE, |
|
.llseek = no_llseek, |
|
.read = hpet_read, |
|
.poll = hpet_poll, |
|
.unlocked_ioctl = hpet_ioctl, |
|
#ifdef CONFIG_COMPAT |
|
.compat_ioctl = hpet_compat_ioctl, |
|
#endif |
|
.open = hpet_open, |
|
.release = hpet_release, |
|
.fasync = hpet_fasync, |
|
.mmap = hpet_mmap, |
|
}; |
|
|
|
static int hpet_is_known(struct hpet_data *hdp) |
|
{ |
|
struct hpets *hpetp; |
|
|
|
for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) |
|
if (hpetp->hp_hpet_phys == hdp->hd_phys_address) |
|
return 1; |
|
|
|
return 0; |
|
} |
|
|
|
static struct ctl_table hpet_table[] = { |
|
{ |
|
.procname = "max-user-freq", |
|
.data = &hpet_max_freq, |
|
.maxlen = sizeof(int), |
|
.mode = 0644, |
|
.proc_handler = proc_dointvec, |
|
}, |
|
{} |
|
}; |
|
|
|
static struct ctl_table hpet_root[] = { |
|
{ |
|
.procname = "hpet", |
|
.maxlen = 0, |
|
.mode = 0555, |
|
.child = hpet_table, |
|
}, |
|
{} |
|
}; |
|
|
|
static struct ctl_table dev_root[] = { |
|
{ |
|
.procname = "dev", |
|
.maxlen = 0, |
|
.mode = 0555, |
|
.child = hpet_root, |
|
}, |
|
{} |
|
}; |
|
|
|
static struct ctl_table_header *sysctl_header; |
|
|
|
/* |
|
* Adjustment for when arming the timer with |
|
* initial conditions. That is, main counter |
|
* ticks expired before interrupts are enabled. |
|
*/ |
|
#define TICK_CALIBRATE (1000UL) |
|
|
|
static unsigned long __hpet_calibrate(struct hpets *hpetp) |
|
{ |
|
struct hpet_timer __iomem *timer = NULL; |
|
unsigned long t, m, count, i, flags, start; |
|
struct hpet_dev *devp; |
|
int j; |
|
struct hpet __iomem *hpet; |
|
|
|
for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) |
|
if ((devp->hd_flags & HPET_OPEN) == 0) { |
|
timer = devp->hd_timer; |
|
break; |
|
} |
|
|
|
if (!timer) |
|
return 0; |
|
|
|
hpet = hpetp->hp_hpet; |
|
t = read_counter(&timer->hpet_compare); |
|
|
|
i = 0; |
|
count = hpet_time_div(hpetp, TICK_CALIBRATE); |
|
|
|
local_irq_save(flags); |
|
|
|
start = read_counter(&hpet->hpet_mc); |
|
|
|
do { |
|
m = read_counter(&hpet->hpet_mc); |
|
write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); |
|
} while (i++, (m - start) < count); |
|
|
|
local_irq_restore(flags); |
|
|
|
return (m - start) / i; |
|
} |
|
|
|
static unsigned long hpet_calibrate(struct hpets *hpetp) |
|
{ |
|
unsigned long ret = ~0UL; |
|
unsigned long tmp; |
|
|
|
/* |
|
* Try to calibrate until return value becomes stable small value. |
|
* If SMI interruption occurs in calibration loop, the return value |
|
* will be big. This avoids its impact. |
|
*/ |
|
for ( ; ; ) { |
|
tmp = __hpet_calibrate(hpetp); |
|
if (ret <= tmp) |
|
break; |
|
ret = tmp; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
int hpet_alloc(struct hpet_data *hdp) |
|
{ |
|
u64 cap, mcfg; |
|
struct hpet_dev *devp; |
|
u32 i, ntimer; |
|
struct hpets *hpetp; |
|
struct hpet __iomem *hpet; |
|
static struct hpets *last; |
|
unsigned long period; |
|
unsigned long long temp; |
|
u32 remainder; |
|
|
|
/* |
|
* hpet_alloc can be called by platform dependent code. |
|
* If platform dependent code has allocated the hpet that |
|
* ACPI has also reported, then we catch it here. |
|
*/ |
|
if (hpet_is_known(hdp)) { |
|
printk(KERN_DEBUG "%s: duplicate HPET ignored\n", |
|
__func__); |
|
return 0; |
|
} |
|
|
|
hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs), |
|
GFP_KERNEL); |
|
|
|
if (!hpetp) |
|
return -ENOMEM; |
|
|
|
hpetp->hp_which = hpet_nhpet++; |
|
hpetp->hp_hpet = hdp->hd_address; |
|
hpetp->hp_hpet_phys = hdp->hd_phys_address; |
|
|
|
hpetp->hp_ntimer = hdp->hd_nirqs; |
|
|
|
for (i = 0; i < hdp->hd_nirqs; i++) |
|
hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; |
|
|
|
hpet = hpetp->hp_hpet; |
|
|
|
cap = readq(&hpet->hpet_cap); |
|
|
|
ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; |
|
|
|
if (hpetp->hp_ntimer != ntimer) { |
|
printk(KERN_WARNING "hpet: number irqs doesn't agree" |
|
" with number of timers\n"); |
|
kfree(hpetp); |
|
return -ENODEV; |
|
} |
|
|
|
if (last) |
|
last->hp_next = hpetp; |
|
else |
|
hpets = hpetp; |
|
|
|
last = hpetp; |
|
|
|
period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
|
HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ |
|
temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ |
|
temp += period >> 1; /* round */ |
|
do_div(temp, period); |
|
hpetp->hp_tick_freq = temp; /* ticks per second */ |
|
|
|
printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
|
hpetp->hp_which, hdp->hd_phys_address, |
|
hpetp->hp_ntimer > 1 ? "s" : ""); |
|
for (i = 0; i < hpetp->hp_ntimer; i++) |
|
printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
|
printk(KERN_CONT "\n"); |
|
|
|
temp = hpetp->hp_tick_freq; |
|
remainder = do_div(temp, 1000000); |
|
printk(KERN_INFO |
|
"hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", |
|
hpetp->hp_which, hpetp->hp_ntimer, |
|
cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, |
|
(unsigned) temp, remainder); |
|
|
|
mcfg = readq(&hpet->hpet_config); |
|
if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { |
|
write_counter(0L, &hpet->hpet_mc); |
|
mcfg |= HPET_ENABLE_CNF_MASK; |
|
writeq(mcfg, &hpet->hpet_config); |
|
} |
|
|
|
for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
|
struct hpet_timer __iomem *timer; |
|
|
|
timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; |
|
|
|
devp->hd_hpets = hpetp; |
|
devp->hd_hpet = hpet; |
|
devp->hd_timer = timer; |
|
|
|
/* |
|
* If the timer was reserved by platform code, |
|
* then make timer unavailable for opens. |
|
*/ |
|
if (hdp->hd_state & (1 << i)) { |
|
devp->hd_flags = HPET_OPEN; |
|
continue; |
|
} |
|
|
|
init_waitqueue_head(&devp->hd_waitqueue); |
|
} |
|
|
|
hpetp->hp_delta = hpet_calibrate(hpetp); |
|
|
|
/* This clocksource driver currently only works on ia64 */ |
|
#ifdef CONFIG_IA64 |
|
if (!hpet_clocksource) { |
|
hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; |
|
clocksource_hpet.archdata.fsys_mmio = hpet_mctr; |
|
clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq); |
|
hpetp->hp_clocksource = &clocksource_hpet; |
|
hpet_clocksource = &clocksource_hpet; |
|
} |
|
#endif |
|
|
|
return 0; |
|
} |
|
|
|
static acpi_status hpet_resources(struct acpi_resource *res, void *data) |
|
{ |
|
struct hpet_data *hdp; |
|
acpi_status status; |
|
struct acpi_resource_address64 addr; |
|
|
|
hdp = data; |
|
|
|
status = acpi_resource_to_address64(res, &addr); |
|
|
|
if (ACPI_SUCCESS(status)) { |
|
hdp->hd_phys_address = addr.address.minimum; |
|
hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length); |
|
if (!hdp->hd_address) |
|
return AE_ERROR; |
|
|
|
if (hpet_is_known(hdp)) { |
|
iounmap(hdp->hd_address); |
|
return AE_ALREADY_EXISTS; |
|
} |
|
} else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
|
struct acpi_resource_fixed_memory32 *fixmem32; |
|
|
|
fixmem32 = &res->data.fixed_memory32; |
|
|
|
hdp->hd_phys_address = fixmem32->address; |
|
hdp->hd_address = ioremap(fixmem32->address, |
|
HPET_RANGE_SIZE); |
|
if (!hdp->hd_address) |
|
return AE_ERROR; |
|
|
|
if (hpet_is_known(hdp)) { |
|
iounmap(hdp->hd_address); |
|
return AE_ALREADY_EXISTS; |
|
} |
|
} else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
|
struct acpi_resource_extended_irq *irqp; |
|
int i, irq; |
|
|
|
irqp = &res->data.extended_irq; |
|
|
|
for (i = 0; i < irqp->interrupt_count; i++) { |
|
if (hdp->hd_nirqs >= HPET_MAX_TIMERS) |
|
break; |
|
|
|
irq = acpi_register_gsi(NULL, irqp->interrupts[i], |
|
irqp->triggering, irqp->polarity); |
|
if (irq < 0) |
|
return AE_ERROR; |
|
|
|
hdp->hd_irq[hdp->hd_nirqs] = irq; |
|
hdp->hd_nirqs++; |
|
} |
|
} |
|
|
|
return AE_OK; |
|
} |
|
|
|
static int hpet_acpi_add(struct acpi_device *device) |
|
{ |
|
acpi_status result; |
|
struct hpet_data data; |
|
|
|
memset(&data, 0, sizeof(data)); |
|
|
|
result = |
|
acpi_walk_resources(device->handle, METHOD_NAME__CRS, |
|
hpet_resources, &data); |
|
|
|
if (ACPI_FAILURE(result)) |
|
return -ENODEV; |
|
|
|
if (!data.hd_address || !data.hd_nirqs) { |
|
if (data.hd_address) |
|
iounmap(data.hd_address); |
|
printk("%s: no address or irqs in _CRS\n", __func__); |
|
return -ENODEV; |
|
} |
|
|
|
return hpet_alloc(&data); |
|
} |
|
|
|
static const struct acpi_device_id hpet_device_ids[] = { |
|
{"PNP0103", 0}, |
|
{"", 0}, |
|
}; |
|
|
|
static struct acpi_driver hpet_acpi_driver = { |
|
.name = "hpet", |
|
.ids = hpet_device_ids, |
|
.ops = { |
|
.add = hpet_acpi_add, |
|
}, |
|
}; |
|
|
|
static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; |
|
|
|
static int __init hpet_init(void) |
|
{ |
|
int result; |
|
|
|
result = misc_register(&hpet_misc); |
|
if (result < 0) |
|
return -ENODEV; |
|
|
|
sysctl_header = register_sysctl_table(dev_root); |
|
|
|
result = acpi_bus_register_driver(&hpet_acpi_driver); |
|
if (result < 0) { |
|
if (sysctl_header) |
|
unregister_sysctl_table(sysctl_header); |
|
misc_deregister(&hpet_misc); |
|
return result; |
|
} |
|
|
|
return 0; |
|
} |
|
device_initcall(hpet_init); |
|
|
|
/* |
|
MODULE_AUTHOR("Bob Picco <[email protected]>"); |
|
MODULE_LICENSE("GPL"); |
|
*/
|
|
|