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380 lines
10 KiB
380 lines
10 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* NVDIMM Firmware Interface Table - NFIT |
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* |
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* Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
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*/ |
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#ifndef __NFIT_H__ |
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#define __NFIT_H__ |
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#include <linux/workqueue.h> |
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#include <linux/libnvdimm.h> |
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#include <linux/ndctl.h> |
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#include <linux/types.h> |
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#include <linux/acpi.h> |
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#include <acpi/acuuid.h> |
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/* ACPI 6.1 */ |
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#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba" |
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/* https://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */ |
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#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66" |
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#define UUID_INTEL_BUS "c7d8acd4-2df8-4b82-9f65-a325335af149" |
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/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */ |
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#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6" |
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#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e" |
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/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */ |
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#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05" |
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/* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */ |
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#define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80" |
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#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \ |
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| ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \ |
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| ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED) |
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#define NVDIMM_CMD_MAX 31 |
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#define NVDIMM_STANDARD_CMDMASK \ |
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(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \ |
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| 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \ |
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| 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \ |
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| 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR) |
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/* |
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* Command numbers that the kernel needs to know about to handle |
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* non-default DSM revision ids |
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*/ |
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enum nvdimm_family_cmds { |
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NVDIMM_INTEL_LATCH_SHUTDOWN = 10, |
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NVDIMM_INTEL_GET_MODES = 11, |
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NVDIMM_INTEL_GET_FWINFO = 12, |
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NVDIMM_INTEL_START_FWUPDATE = 13, |
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NVDIMM_INTEL_SEND_FWUPDATE = 14, |
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NVDIMM_INTEL_FINISH_FWUPDATE = 15, |
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NVDIMM_INTEL_QUERY_FWUPDATE = 16, |
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NVDIMM_INTEL_SET_THRESHOLD = 17, |
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NVDIMM_INTEL_INJECT_ERROR = 18, |
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NVDIMM_INTEL_GET_SECURITY_STATE = 19, |
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NVDIMM_INTEL_SET_PASSPHRASE = 20, |
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NVDIMM_INTEL_DISABLE_PASSPHRASE = 21, |
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NVDIMM_INTEL_UNLOCK_UNIT = 22, |
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NVDIMM_INTEL_FREEZE_LOCK = 23, |
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NVDIMM_INTEL_SECURE_ERASE = 24, |
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NVDIMM_INTEL_OVERWRITE = 25, |
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NVDIMM_INTEL_QUERY_OVERWRITE = 26, |
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NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27, |
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NVDIMM_INTEL_MASTER_SECURE_ERASE = 28, |
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NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO = 29, |
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NVDIMM_INTEL_FW_ACTIVATE_ARM = 30, |
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}; |
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enum nvdimm_bus_family_cmds { |
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NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO = 1, |
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NVDIMM_BUS_INTEL_FW_ACTIVATE = 2, |
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}; |
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#define NVDIMM_INTEL_SECURITY_CMDMASK \ |
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(1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \ |
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| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \ |
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| 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \ |
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| 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \ |
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| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \ |
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| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE) |
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#define NVDIMM_INTEL_FW_ACTIVATE_CMDMASK \ |
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(1 << NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO | 1 << NVDIMM_INTEL_FW_ACTIVATE_ARM) |
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#define NVDIMM_BUS_INTEL_FW_ACTIVATE_CMDMASK \ |
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(1 << NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO | 1 << NVDIMM_BUS_INTEL_FW_ACTIVATE) |
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#define NVDIMM_INTEL_CMDMASK \ |
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(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \ |
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| 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \ |
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| 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \ |
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| 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \ |
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| 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \ |
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| NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK) |
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#define NVDIMM_INTEL_DENY_CMDMASK \ |
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(NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK) |
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enum nfit_uuids { |
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/* for simplicity alias the uuid index with the family id */ |
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NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL, |
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NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1, |
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NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2, |
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NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT, |
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NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV, |
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/* |
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* to_nfit_bus_uuid() expects to translate bus uuid family ids |
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* to a UUID index using NVDIMM_FAMILY_MAX as an offset |
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*/ |
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NFIT_BUS_INTEL = NVDIMM_FAMILY_MAX + NVDIMM_BUS_FAMILY_INTEL, |
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NFIT_SPA_VOLATILE, |
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NFIT_SPA_PM, |
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NFIT_SPA_DCR, |
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NFIT_SPA_BDW, |
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NFIT_SPA_VDISK, |
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NFIT_SPA_VCD, |
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NFIT_SPA_PDISK, |
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NFIT_SPA_PCD, |
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NFIT_DEV_BUS, |
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NFIT_UUID_MAX, |
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}; |
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/* |
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* Region format interface codes are stored with the interface as the |
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* LSB and the function as the MSB. |
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*/ |
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#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */ |
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#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */ |
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#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */ |
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enum { |
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NFIT_BLK_READ_FLUSH = 1, |
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NFIT_BLK_DCR_LATCH = 2, |
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NFIT_ARS_STATUS_DONE = 0, |
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NFIT_ARS_STATUS_BUSY = 1 << 16, |
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NFIT_ARS_STATUS_NONE = 2 << 16, |
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NFIT_ARS_STATUS_INTR = 3 << 16, |
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NFIT_ARS_START_BUSY = 6, |
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NFIT_ARS_CAP_NONE = 1, |
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NFIT_ARS_F_OVERFLOW = 1, |
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NFIT_ARS_TIMEOUT = 90, |
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}; |
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enum nfit_root_notifiers { |
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NFIT_NOTIFY_UPDATE = 0x80, |
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NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81, |
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}; |
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enum nfit_dimm_notifiers { |
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NFIT_NOTIFY_DIMM_HEALTH = 0x81, |
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}; |
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enum nfit_ars_state { |
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ARS_REQ_SHORT, |
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ARS_REQ_LONG, |
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ARS_FAILED, |
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}; |
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struct nfit_spa { |
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struct list_head list; |
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struct nd_region *nd_region; |
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unsigned long ars_state; |
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u32 clear_err_unit; |
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u32 max_ars; |
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struct acpi_nfit_system_address spa[]; |
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}; |
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struct nfit_dcr { |
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struct list_head list; |
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struct acpi_nfit_control_region dcr[]; |
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}; |
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struct nfit_bdw { |
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struct list_head list; |
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struct acpi_nfit_data_region bdw[]; |
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}; |
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struct nfit_idt { |
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struct list_head list; |
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struct acpi_nfit_interleave idt[]; |
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}; |
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struct nfit_flush { |
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struct list_head list; |
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struct acpi_nfit_flush_address flush[]; |
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}; |
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struct nfit_memdev { |
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struct list_head list; |
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struct acpi_nfit_memory_map memdev[]; |
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}; |
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enum nfit_mem_flags { |
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NFIT_MEM_LSR, |
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NFIT_MEM_LSW, |
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NFIT_MEM_DIRTY, |
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NFIT_MEM_DIRTY_COUNT, |
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}; |
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#define NFIT_DIMM_ID_LEN 22 |
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/* assembled tables for a given dimm/memory-device */ |
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struct nfit_mem { |
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struct nvdimm *nvdimm; |
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struct acpi_nfit_memory_map *memdev_dcr; |
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struct acpi_nfit_memory_map *memdev_pmem; |
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struct acpi_nfit_memory_map *memdev_bdw; |
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struct acpi_nfit_control_region *dcr; |
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struct acpi_nfit_data_region *bdw; |
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struct acpi_nfit_system_address *spa_dcr; |
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struct acpi_nfit_system_address *spa_bdw; |
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struct acpi_nfit_interleave *idt_dcr; |
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struct acpi_nfit_interleave *idt_bdw; |
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struct kernfs_node *flags_attr; |
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struct nfit_flush *nfit_flush; |
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struct list_head list; |
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struct acpi_device *adev; |
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struct acpi_nfit_desc *acpi_desc; |
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enum nvdimm_fwa_state fwa_state; |
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enum nvdimm_fwa_result fwa_result; |
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int fwa_count; |
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char id[NFIT_DIMM_ID_LEN+1]; |
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struct resource *flush_wpq; |
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unsigned long dsm_mask; |
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unsigned long flags; |
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u32 dirty_shutdown; |
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int family; |
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}; |
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enum scrub_flags { |
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ARS_BUSY, |
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ARS_CANCEL, |
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ARS_VALID, |
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ARS_POLL, |
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}; |
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struct acpi_nfit_desc { |
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struct nvdimm_bus_descriptor nd_desc; |
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struct acpi_table_header acpi_header; |
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struct mutex init_mutex; |
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struct list_head memdevs; |
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struct list_head flushes; |
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struct list_head dimms; |
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struct list_head spas; |
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struct list_head dcrs; |
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struct list_head bdws; |
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struct list_head idts; |
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struct nvdimm_bus *nvdimm_bus; |
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struct device *dev; |
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struct nd_cmd_ars_status *ars_status; |
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struct nfit_spa *scrub_spa; |
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struct delayed_work dwork; |
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struct list_head list; |
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struct kernfs_node *scrub_count_state; |
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unsigned int max_ars; |
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unsigned int scrub_count; |
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unsigned int scrub_mode; |
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unsigned long scrub_flags; |
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unsigned long dimm_cmd_force_en; |
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unsigned long bus_cmd_force_en; |
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unsigned long bus_dsm_mask; |
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unsigned long family_dsm_mask[NVDIMM_BUS_FAMILY_MAX + 1]; |
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unsigned int platform_cap; |
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unsigned int scrub_tmo; |
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int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
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void *iobuf, u64 len, int rw); |
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enum nvdimm_fwa_state fwa_state; |
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enum nvdimm_fwa_capability fwa_cap; |
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int fwa_count; |
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bool fwa_noidle; |
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bool fwa_nosuspend; |
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}; |
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enum scrub_mode { |
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HW_ERROR_SCRUB_OFF, |
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HW_ERROR_SCRUB_ON, |
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}; |
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enum nd_blk_mmio_selector { |
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BDW, |
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DCR, |
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}; |
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struct nd_blk_addr { |
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union { |
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void __iomem *base; |
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void *aperture; |
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}; |
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}; |
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struct nfit_blk { |
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struct nfit_blk_mmio { |
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struct nd_blk_addr addr; |
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u64 size; |
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u64 base_offset; |
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u32 line_size; |
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u32 num_lines; |
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u32 table_size; |
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struct acpi_nfit_interleave *idt; |
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struct acpi_nfit_system_address *spa; |
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} mmio[2]; |
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struct nd_region *nd_region; |
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u64 bdw_offset; /* post interleave offset */ |
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u64 stat_offset; |
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u64 cmd_offset; |
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u32 dimm_flags; |
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}; |
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extern struct list_head acpi_descs; |
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extern struct mutex acpi_desc_lock; |
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int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, |
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enum nfit_ars_state req_type); |
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#ifdef CONFIG_X86_MCE |
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void nfit_mce_register(void); |
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void nfit_mce_unregister(void); |
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#else |
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static inline void nfit_mce_register(void) |
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{ |
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} |
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static inline void nfit_mce_unregister(void) |
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{ |
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} |
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#endif |
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int nfit_spa_type(struct acpi_nfit_system_address *spa); |
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static inline struct acpi_nfit_memory_map *__to_nfit_memdev( |
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struct nfit_mem *nfit_mem) |
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{ |
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if (nfit_mem->memdev_dcr) |
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return nfit_mem->memdev_dcr; |
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return nfit_mem->memdev_pmem; |
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} |
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static inline struct acpi_nfit_desc *to_acpi_desc( |
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struct nvdimm_bus_descriptor *nd_desc) |
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{ |
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return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
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} |
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#ifdef CONFIG_PROVE_LOCKING |
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static inline void nfit_device_lock(struct device *dev) |
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{ |
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device_lock(dev); |
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mutex_lock(&dev->lockdep_mutex); |
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} |
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static inline void nfit_device_unlock(struct device *dev) |
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{ |
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mutex_unlock(&dev->lockdep_mutex); |
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device_unlock(dev); |
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} |
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#else |
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static inline void nfit_device_lock(struct device *dev) |
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{ |
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device_lock(dev); |
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} |
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static inline void nfit_device_unlock(struct device *dev) |
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{ |
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device_unlock(dev); |
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} |
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#endif |
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const guid_t *to_nfit_uuid(enum nfit_uuids id); |
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int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz); |
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void acpi_nfit_shutdown(void *data); |
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void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event); |
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void __acpi_nvdimm_notify(struct device *dev, u32 event); |
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int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
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unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc); |
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void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev); |
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bool intel_fwa_supported(struct nvdimm_bus *nvdimm_bus); |
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extern struct device_attribute dev_attr_firmware_activate_noidle; |
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#endif /* __NFIT_H__ */
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