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299 lines
8.0 KiB
299 lines
8.0 KiB
# SPDX-License-Identifier: GPL-2.0 |
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menu "Platform support" |
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source "arch/powerpc/platforms/powernv/Kconfig" |
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source "arch/powerpc/platforms/pseries/Kconfig" |
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source "arch/powerpc/platforms/chrp/Kconfig" |
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source "arch/powerpc/platforms/512x/Kconfig" |
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source "arch/powerpc/platforms/52xx/Kconfig" |
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source "arch/powerpc/platforms/powermac/Kconfig" |
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source "arch/powerpc/platforms/maple/Kconfig" |
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source "arch/powerpc/platforms/pasemi/Kconfig" |
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source "arch/powerpc/platforms/ps3/Kconfig" |
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source "arch/powerpc/platforms/cell/Kconfig" |
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source "arch/powerpc/platforms/8xx/Kconfig" |
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source "arch/powerpc/platforms/82xx/Kconfig" |
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source "arch/powerpc/platforms/83xx/Kconfig" |
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source "arch/powerpc/platforms/85xx/Kconfig" |
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source "arch/powerpc/platforms/86xx/Kconfig" |
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source "arch/powerpc/platforms/embedded6xx/Kconfig" |
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source "arch/powerpc/platforms/44x/Kconfig" |
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source "arch/powerpc/platforms/40x/Kconfig" |
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source "arch/powerpc/platforms/amigaone/Kconfig" |
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config KVM_GUEST |
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bool "KVM Guest support" |
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select EPAPR_PARAVIRT |
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help |
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This option enables various optimizations for running under the KVM |
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hypervisor. Overhead for the kernel when not running inside KVM should |
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be minimal. |
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In case of doubt, say Y |
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config EPAPR_PARAVIRT |
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bool "ePAPR para-virtualization support" |
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help |
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Enables ePAPR para-virtualization support for guests. |
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In case of doubt, say Y |
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config PPC_NATIVE |
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bool |
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depends on PPC_BOOK3S_32 || PPC64 |
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help |
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Support for running natively on the hardware, i.e. without |
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a hypervisor. This option is not user-selectable but should |
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be selected by all platforms that need it. |
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config PPC_OF_BOOT_TRAMPOLINE |
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bool "Support booting from Open Firmware or yaboot" |
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depends on PPC_BOOK3S_32 || PPC64 |
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default y |
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help |
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Support from booting from Open Firmware or yaboot using an |
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Open Firmware client interface. This enables the kernel to |
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communicate with open firmware to retrieve system information |
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such as the device tree. |
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In case of doubt, say Y |
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config PPC_DT_CPU_FTRS |
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bool "Device-tree based CPU feature discovery & setup" |
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depends on PPC_BOOK3S_64 |
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default y |
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help |
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This enables code to use a new device tree binding for describing CPU |
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compatibility and features. Saying Y here will attempt to use the new |
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binding if the firmware provides it. Currently only the skiboot |
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firmware provides this binding. |
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If you're not sure say Y. |
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config UDBG_RTAS_CONSOLE |
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bool "RTAS based debug console" |
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depends on PPC_RTAS |
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config PPC_SMP_MUXED_IPI |
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bool |
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help |
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Select this option if your platform supports SMP and your |
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interrupt controller provides less than 4 interrupts to each |
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cpu. This will enable the generic code to multiplex the 4 |
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messages on to one ipi. |
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config IPIC |
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bool |
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config MPIC |
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bool |
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config MPIC_TIMER |
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bool "MPIC Global Timer" |
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depends on MPIC && FSL_SOC |
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help |
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The MPIC global timer is a hardware timer inside the |
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Freescale PIC complying with OpenPIC standard. When the |
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specified interval times out, the hardware timer generates |
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an interrupt. The driver currently is only tested on fsl |
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chip, but it can potentially support other global timers |
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complying with the OpenPIC standard. |
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config FSL_MPIC_TIMER_WAKEUP |
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tristate "Freescale MPIC global timer wakeup driver" |
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depends on FSL_SOC && MPIC_TIMER && PM |
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help |
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The driver provides a way to wake up the system by MPIC |
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timer. |
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e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" |
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config PPC_EPAPR_HV_PIC |
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bool |
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select EPAPR_PARAVIRT |
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config MPIC_WEIRD |
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bool |
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config MPIC_MSGR |
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bool "MPIC message register support" |
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depends on MPIC |
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help |
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Enables support for the MPIC message registers. These |
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registers are used for inter-processor communication. |
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config PPC_I8259 |
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bool |
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config U3_DART |
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bool |
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depends on PPC64 |
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config PPC_RTAS |
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bool |
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config RTAS_ERROR_LOGGING |
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bool |
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depends on PPC_RTAS |
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config PPC_RTAS_DAEMON |
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bool |
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depends on PPC_RTAS |
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config RTAS_PROC |
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bool "Proc interface to RTAS" |
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depends on PPC_RTAS && PROC_FS |
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default y |
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config RTAS_FLASH |
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tristate "Firmware flash interface" |
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depends on PPC64 && RTAS_PROC |
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config MMIO_NVRAM |
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bool |
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config MPIC_U3_HT_IRQS |
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bool |
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config MPIC_BROKEN_REGREAD |
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bool |
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depends on MPIC |
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help |
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This option enables a MPIC driver workaround for some chips |
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that have a bug that causes some interrupt source information |
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to not read back properly. It is safe to use on other chips as |
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well, but enabling it uses about 8KB of memory to keep copies |
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of the register contents in software. |
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config EEH |
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bool |
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depends on (PPC_POWERNV || PPC_PSERIES) && PCI |
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default y |
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config PPC_MPC106 |
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bool |
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config PPC_970_NAP |
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bool |
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config PPC_P7_NAP |
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bool |
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config PPC_BOOK3S_IDLE |
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def_bool y |
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depends on (PPC_970_NAP || PPC_P7_NAP) |
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config PPC_INDIRECT_PIO |
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bool |
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select GENERIC_IOMAP |
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config PPC_INDIRECT_MMIO |
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bool |
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config PPC_IO_WORKAROUNDS |
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bool |
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source "drivers/cpufreq/Kconfig" |
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menu "CPUIdle driver" |
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source "drivers/cpuidle/Kconfig" |
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endmenu |
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config TAU |
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bool "On-chip CPU temperature sensor support" |
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depends on PPC_BOOK3S_32 |
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help |
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G3 and G4 processors have an on-chip temperature sensor called the |
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'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die |
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temperature within 2-4 degrees Celsius. This option shows the current |
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on-die temperature in /proc/cpuinfo if the cpu supports it. |
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Unfortunately, this sensor is very inaccurate when uncalibrated, so |
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don't assume the cpu temp is actually what /proc/cpuinfo says it is. |
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config TAU_INT |
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bool "Interrupt driven TAU driver (EXPERIMENTAL)" |
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depends on TAU |
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help |
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The TAU supports an interrupt driven mode which causes an interrupt |
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whenever the temperature goes out of range. This is the fastest way |
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to get notified the temp has exceeded a range. With this option off, |
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a timer is used to re-check the temperature periodically. |
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If in doubt, say N here. |
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config TAU_AVERAGE |
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bool "Average high and low temp" |
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depends on TAU |
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help |
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The TAU hardware can compare the temperature to an upper and lower |
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bound. The default behavior is to show both the upper and lower |
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bound in /proc/cpuinfo. If the range is large, the temperature is |
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either changing a lot, or the TAU hardware is broken (likely on some |
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G4's). If the range is small (around 4 degrees), the temperature is |
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relatively stable. If you say Y here, a single temperature value, |
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halfway between the upper and lower bounds, will be reported in |
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/proc/cpuinfo. |
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If in doubt, say N here. |
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config QE_GPIO |
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bool "QE GPIO support" |
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depends on QUICC_ENGINE |
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select GPIOLIB |
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help |
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Say Y here if you're going to use hardware that connects to the |
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QE GPIOs. |
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config CPM2 |
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bool "Enable support for the CPM2 (Communications Processor Module)" |
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depends on (FSL_SOC_BOOKE && PPC32) || 8260 |
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select CPM |
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select HAVE_PCI |
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select GPIOLIB |
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help |
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The CPM2 (Communications Processor Module) is a coprocessor on |
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embedded CPUs made by Freescale. Selecting this option means that |
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you wish to build a kernel for a machine with a CPM2 coprocessor |
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on it (826x, 827x, 8560). |
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config FSL_ULI1575 |
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bool |
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select GENERIC_ISA_DMA |
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help |
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Supports for the ULI1575 PCIe south bridge that exists on some |
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Freescale reference boards. The boards all use the ULI in pretty |
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much the same way. |
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config CPM |
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bool |
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select GENERIC_ALLOCATOR |
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config OF_RTC |
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bool |
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help |
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Uses information from the OF or flattened device tree to instantiate |
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platform devices for direct mapped RTC chips like the DS1742 or DS1743. |
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config GEN_RTC |
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bool "Use the platform RTC operations from user space" |
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select RTC_CLASS |
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select RTC_DRV_GENERIC |
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help |
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This option provides backwards compatibility with the old gen_rtc.ko |
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module that was traditionally used for old PowerPC machines. |
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Platforms should migrate to enabling the RTC_DRV_GENERIC by hand |
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replacing their get_rtc_time/set_rtc_time callbacks with |
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a proper RTC device driver. |
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config MCU_MPC8349EMITX |
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bool "MPC8349E-mITX MCU driver" |
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depends on I2C=y && PPC_83xx |
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select GPIOLIB |
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help |
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Say Y here to enable soft power-off functionality on the Freescale |
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boards with the MPC8349E-mITX-compatible MCU chips. This driver will |
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also register MCU GPIOs with the generic GPIO API, so you'll able |
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to use MCU pins as GPIOs. |
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endmenu
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