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481 lines
11 KiB
481 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* MPC8360E EMDS Device Tree Source |
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* |
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* Copyright 2006 Freescale Semiconductor Inc. |
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*/ |
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/* |
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/memreserve/ 00000000 1000000; |
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*/ |
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/dts-v1/; |
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/ { |
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model = "MPC8360MDS"; |
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compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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aliases { |
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ethernet0 = &enet0; |
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ethernet1 = &enet1; |
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serial0 = &serial0; |
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serial1 = &serial1; |
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pci0 = &pci0; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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PowerPC,8360@0 { |
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device_type = "cpu"; |
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reg = <0x0>; |
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d-cache-line-size = <32>; // 32 bytes |
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i-cache-line-size = <32>; // 32 bytes |
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d-cache-size = <32768>; // L1, 32K |
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i-cache-size = <32768>; // L1, 32K |
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timebase-frequency = <66000000>; |
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bus-frequency = <264000000>; |
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clock-frequency = <528000000>; |
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}; |
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}; |
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memory { |
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device_type = "memory"; |
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reg = <0x00000000 0x10000000>; |
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}; |
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localbus@e0005000 { |
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#address-cells = <2>; |
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#size-cells = <1>; |
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compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", |
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"simple-bus"; |
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reg = <0xe0005000 0xd8>; |
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ranges = <0 0 0xfe000000 0x02000000 |
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1 0 0xf8000000 0x00008000>; |
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flash@0,0 { |
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compatible = "cfi-flash"; |
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reg = <0 0 0x2000000>; |
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bank-width = <2>; |
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device-width = <1>; |
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}; |
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bcsr@1,0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "fsl,mpc8360mds-bcsr"; |
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reg = <1 0 0x8000>; |
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ranges = <0 1 0 0x8000>; |
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bcsr13: gpio-controller@d { |
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#gpio-cells = <2>; |
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compatible = "fsl,mpc8360mds-bcsr-gpio"; |
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reg = <0xd 1>; |
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gpio-controller; |
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}; |
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}; |
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}; |
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soc8360@e0000000 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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device_type = "soc"; |
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compatible = "simple-bus"; |
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ranges = <0x0 0xe0000000 0x00100000>; |
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reg = <0xe0000000 0x00000200>; |
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bus-frequency = <264000000>; |
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wdt@200 { |
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device_type = "watchdog"; |
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compatible = "mpc83xx_wdt"; |
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reg = <0x200 0x100>; |
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}; |
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pmc: power@b00 { |
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compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; |
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reg = <0xb00 0x100 0xa00 0x100>; |
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interrupts = <80 0x8>; |
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interrupt-parent = <&ipic>; |
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}; |
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i2c@3000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cell-index = <0>; |
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compatible = "fsl-i2c"; |
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reg = <0x3000 0x100>; |
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interrupts = <14 0x8>; |
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interrupt-parent = <&ipic>; |
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dfsrr; |
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rtc@68 { |
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compatible = "dallas,ds1374"; |
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reg = <0x68>; |
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}; |
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}; |
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i2c@3100 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cell-index = <1>; |
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compatible = "fsl-i2c"; |
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reg = <0x3100 0x100>; |
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interrupts = <15 0x8>; |
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interrupt-parent = <&ipic>; |
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dfsrr; |
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}; |
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serial0: serial@4500 { |
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cell-index = <0>; |
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device_type = "serial"; |
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compatible = "fsl,ns16550", "ns16550"; |
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reg = <0x4500 0x100>; |
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clock-frequency = <264000000>; |
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interrupts = <9 0x8>; |
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interrupt-parent = <&ipic>; |
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}; |
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serial1: serial@4600 { |
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cell-index = <1>; |
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device_type = "serial"; |
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compatible = "fsl,ns16550", "ns16550"; |
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reg = <0x4600 0x100>; |
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clock-frequency = <264000000>; |
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interrupts = <10 0x8>; |
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interrupt-parent = <&ipic>; |
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}; |
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dma@82a8 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; |
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reg = <0x82a8 4>; |
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ranges = <0 0x8100 0x1a8>; |
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interrupt-parent = <&ipic>; |
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interrupts = <71 8>; |
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cell-index = <0>; |
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dma-channel@0 { |
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compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
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reg = <0 0x80>; |
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cell-index = <0>; |
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interrupt-parent = <&ipic>; |
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interrupts = <71 8>; |
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}; |
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dma-channel@80 { |
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compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
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reg = <0x80 0x80>; |
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cell-index = <1>; |
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interrupt-parent = <&ipic>; |
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interrupts = <71 8>; |
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}; |
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dma-channel@100 { |
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compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
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reg = <0x100 0x80>; |
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cell-index = <2>; |
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interrupt-parent = <&ipic>; |
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interrupts = <71 8>; |
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}; |
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dma-channel@180 { |
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compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; |
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reg = <0x180 0x28>; |
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cell-index = <3>; |
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interrupt-parent = <&ipic>; |
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interrupts = <71 8>; |
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}; |
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}; |
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crypto@30000 { |
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compatible = "fsl,sec2.0"; |
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reg = <0x30000 0x10000>; |
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interrupts = <11 0x8>; |
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interrupt-parent = <&ipic>; |
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fsl,num-channels = <4>; |
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fsl,channel-fifo-len = <24>; |
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fsl,exec-units-mask = <0x7e>; |
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fsl,descriptor-types-mask = <0x01010ebf>; |
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sleep = <&pmc 0x03000000>; |
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}; |
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ipic: pic@700 { |
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interrupt-controller; |
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#address-cells = <0>; |
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#interrupt-cells = <2>; |
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reg = <0x700 0x100>; |
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device_type = "ipic"; |
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}; |
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par_io@1400 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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reg = <0x1400 0x100>; |
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ranges = <0 0x1400 0x100>; |
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device_type = "par_io"; |
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num-ports = <7>; |
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qe_pio_b: gpio-controller@18 { |
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#gpio-cells = <2>; |
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compatible = "fsl,mpc8360-qe-pario-bank", |
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"fsl,mpc8323-qe-pario-bank"; |
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reg = <0x18 0x18>; |
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gpio-controller; |
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}; |
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pio1: ucc_pin@1 { |
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pio-map = < |
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/* port pin dir open_drain assignment has_irq */ |
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0 3 1 0 1 0 /* TxD0 */ |
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0 4 1 0 1 0 /* TxD1 */ |
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0 5 1 0 1 0 /* TxD2 */ |
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0 6 1 0 1 0 /* TxD3 */ |
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1 6 1 0 3 0 /* TxD4 */ |
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1 7 1 0 1 0 /* TxD5 */ |
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1 9 1 0 2 0 /* TxD6 */ |
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1 10 1 0 2 0 /* TxD7 */ |
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0 9 2 0 1 0 /* RxD0 */ |
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0 10 2 0 1 0 /* RxD1 */ |
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0 11 2 0 1 0 /* RxD2 */ |
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0 12 2 0 1 0 /* RxD3 */ |
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0 13 2 0 1 0 /* RxD4 */ |
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1 1 2 0 2 0 /* RxD5 */ |
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1 0 2 0 2 0 /* RxD6 */ |
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1 4 2 0 2 0 /* RxD7 */ |
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0 7 1 0 1 0 /* TX_EN */ |
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0 8 1 0 1 0 /* TX_ER */ |
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0 15 2 0 1 0 /* RX_DV */ |
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0 16 2 0 1 0 /* RX_ER */ |
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0 0 2 0 1 0 /* RX_CLK */ |
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2 9 1 0 3 0 /* GTX_CLK - CLK10 */ |
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2 8 2 0 1 0>; /* GTX125 - CLK9 */ |
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}; |
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pio2: ucc_pin@2 { |
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pio-map = < |
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/* port pin dir open_drain assignment has_irq */ |
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0 17 1 0 1 0 /* TxD0 */ |
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0 18 1 0 1 0 /* TxD1 */ |
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0 19 1 0 1 0 /* TxD2 */ |
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0 20 1 0 1 0 /* TxD3 */ |
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1 2 1 0 1 0 /* TxD4 */ |
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1 3 1 0 2 0 /* TxD5 */ |
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1 5 1 0 3 0 /* TxD6 */ |
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1 8 1 0 3 0 /* TxD7 */ |
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0 23 2 0 1 0 /* RxD0 */ |
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0 24 2 0 1 0 /* RxD1 */ |
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0 25 2 0 1 0 /* RxD2 */ |
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0 26 2 0 1 0 /* RxD3 */ |
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0 27 2 0 1 0 /* RxD4 */ |
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1 12 2 0 2 0 /* RxD5 */ |
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1 13 2 0 3 0 /* RxD6 */ |
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1 11 2 0 2 0 /* RxD7 */ |
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0 21 1 0 1 0 /* TX_EN */ |
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0 22 1 0 1 0 /* TX_ER */ |
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0 29 2 0 1 0 /* RX_DV */ |
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0 30 2 0 1 0 /* RX_ER */ |
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0 31 2 0 1 0 /* RX_CLK */ |
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2 2 1 0 2 0 /* GTX_CLK - CLK10 */ |
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2 3 2 0 1 0 /* GTX125 - CLK4 */ |
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0 1 3 0 2 0 /* MDIO */ |
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0 2 1 0 1 0>; /* MDC */ |
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}; |
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}; |
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}; |
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qe@e0100000 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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device_type = "qe"; |
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compatible = "fsl,qe"; |
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ranges = <0x0 0xe0100000 0x00100000>; |
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reg = <0xe0100000 0x480>; |
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brg-frequency = <0>; |
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bus-frequency = <396000000>; |
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fsl,qe-num-riscs = <2>; |
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fsl,qe-num-snums = <28>; |
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muram@10000 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "fsl,qe-muram", "fsl,cpm-muram"; |
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ranges = <0x0 0x00010000 0x0000c000>; |
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data-only@0 { |
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compatible = "fsl,qe-muram-data", |
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"fsl,cpm-muram-data"; |
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reg = <0x0 0xc000>; |
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}; |
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}; |
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timer@440 { |
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compatible = "fsl,mpc8360-qe-gtm", |
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"fsl,qe-gtm", "fsl,gtm"; |
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reg = <0x440 0x40>; |
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clock-frequency = <132000000>; |
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interrupts = <12 13 14 15>; |
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interrupt-parent = <&qeic>; |
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}; |
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spi@4c0 { |
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cell-index = <0>; |
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compatible = "fsl,spi"; |
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reg = <0x4c0 0x40>; |
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interrupts = <2>; |
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interrupt-parent = <&qeic>; |
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mode = "cpu"; |
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}; |
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spi@500 { |
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cell-index = <1>; |
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compatible = "fsl,spi"; |
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reg = <0x500 0x40>; |
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interrupts = <1>; |
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interrupt-parent = <&qeic>; |
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mode = "cpu"; |
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}; |
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usb@6c0 { |
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compatible = "fsl,mpc8360-qe-usb", |
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"fsl,mpc8323-qe-usb"; |
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reg = <0x6c0 0x40 0x8b00 0x100>; |
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interrupts = <11>; |
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interrupt-parent = <&qeic>; |
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fsl,fullspeed-clock = "clk21"; |
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fsl,lowspeed-clock = "brg9"; |
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gpios = <&qe_pio_b 2 0 /* USBOE */ |
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&qe_pio_b 3 0 /* USBTP */ |
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&qe_pio_b 8 0 /* USBTN */ |
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&qe_pio_b 9 0 /* USBRP */ |
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&qe_pio_b 11 0 /* USBRN */ |
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&bcsr13 5 0 /* SPEED */ |
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&bcsr13 4 1>; /* POWER */ |
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}; |
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enet0: ucc@2000 { |
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device_type = "network"; |
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compatible = "ucc_geth"; |
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cell-index = <1>; |
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reg = <0x2000 0x200>; |
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interrupts = <32>; |
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interrupt-parent = <&qeic>; |
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local-mac-address = [ 00 00 00 00 00 00 ]; |
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rx-clock-name = "none"; |
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tx-clock-name = "clk9"; |
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phy-handle = <&phy0>; |
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phy-connection-type = "rgmii-id"; |
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pio-handle = <&pio1>; |
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}; |
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enet1: ucc@3000 { |
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device_type = "network"; |
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compatible = "ucc_geth"; |
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cell-index = <2>; |
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reg = <0x3000 0x200>; |
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interrupts = <33>; |
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interrupt-parent = <&qeic>; |
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local-mac-address = [ 00 00 00 00 00 00 ]; |
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rx-clock-name = "none"; |
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tx-clock-name = "clk4"; |
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phy-handle = <&phy1>; |
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phy-connection-type = "rgmii-id"; |
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pio-handle = <&pio2>; |
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}; |
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mdio@2120 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <0x2120 0x18>; |
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compatible = "fsl,ucc-mdio"; |
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phy0: ethernet-phy@0 { |
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interrupt-parent = <&ipic>; |
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interrupts = <17 0x8>; |
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reg = <0x0>; |
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}; |
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phy1: ethernet-phy@1 { |
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interrupt-parent = <&ipic>; |
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interrupts = <18 0x8>; |
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reg = <0x1>; |
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}; |
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tbi-phy@2 { |
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device_type = "tbi-phy"; |
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reg = <0x2>; |
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}; |
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}; |
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qeic: interrupt-controller@80 { |
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interrupt-controller; |
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compatible = "fsl,qe-ic"; |
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#address-cells = <0>; |
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#interrupt-cells = <1>; |
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reg = <0x80 0x80>; |
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big-endian; |
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interrupts = <32 0x8 33 0x8>; // high:32 low:33 |
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interrupt-parent = <&ipic>; |
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}; |
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}; |
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pci0: pci@e0008500 { |
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
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interrupt-map = < |
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/* IDSEL 0x11 AD17 */ |
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0x8800 0x0 0x0 0x1 &ipic 20 0x8 |
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0x8800 0x0 0x0 0x2 &ipic 21 0x8 |
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0x8800 0x0 0x0 0x3 &ipic 22 0x8 |
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0x8800 0x0 0x0 0x4 &ipic 23 0x8 |
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/* IDSEL 0x12 AD18 */ |
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0x9000 0x0 0x0 0x1 &ipic 22 0x8 |
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0x9000 0x0 0x0 0x2 &ipic 23 0x8 |
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0x9000 0x0 0x0 0x3 &ipic 20 0x8 |
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0x9000 0x0 0x0 0x4 &ipic 21 0x8 |
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/* IDSEL 0x13 AD19 */ |
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0x9800 0x0 0x0 0x1 &ipic 23 0x8 |
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0x9800 0x0 0x0 0x2 &ipic 20 0x8 |
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0x9800 0x0 0x0 0x3 &ipic 21 0x8 |
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0x9800 0x0 0x0 0x4 &ipic 22 0x8 |
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/* IDSEL 0x15 AD21*/ |
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0xa800 0x0 0x0 0x1 &ipic 20 0x8 |
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0xa800 0x0 0x0 0x2 &ipic 21 0x8 |
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0xa800 0x0 0x0 0x3 &ipic 22 0x8 |
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0xa800 0x0 0x0 0x4 &ipic 23 0x8 |
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/* IDSEL 0x16 AD22*/ |
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0xb000 0x0 0x0 0x1 &ipic 23 0x8 |
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0xb000 0x0 0x0 0x2 &ipic 20 0x8 |
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0xb000 0x0 0x0 0x3 &ipic 21 0x8 |
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0xb000 0x0 0x0 0x4 &ipic 22 0x8 |
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/* IDSEL 0x17 AD23*/ |
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0xb800 0x0 0x0 0x1 &ipic 22 0x8 |
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0xb800 0x0 0x0 0x2 &ipic 23 0x8 |
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0xb800 0x0 0x0 0x3 &ipic 20 0x8 |
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0xb800 0x0 0x0 0x4 &ipic 21 0x8 |
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/* IDSEL 0x18 AD24*/ |
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0xc000 0x0 0x0 0x1 &ipic 21 0x8 |
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0xc000 0x0 0x0 0x2 &ipic 22 0x8 |
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0xc000 0x0 0x0 0x3 &ipic 23 0x8 |
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0xc000 0x0 0x0 0x4 &ipic 20 0x8>; |
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interrupt-parent = <&ipic>; |
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interrupts = <66 0x8>; |
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bus-range = <0 0>; |
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ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 |
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0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
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0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
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clock-frequency = <66666666>; |
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#interrupt-cells = <1>; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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reg = <0xe0008500 0x100 /* internal registers */ |
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0xe0008300 0x8>; /* config space access registers */ |
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compatible = "fsl,mpc8349-pci"; |
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device_type = "pci"; |
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sleep = <&pmc 0x00010000>; |
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}; |
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};
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