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148 lines
4.2 KiB
148 lines
4.2 KiB
/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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/* |
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* eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines |
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* |
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* Copyright (c) 2001, 2002 Daniel Engstrom <[email protected]> |
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*/ |
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#ifndef ASM_EISA_EEPROM_H |
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#define ASM_EISA_EEPROM_H |
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extern void __iomem *eisa_eeprom_addr; |
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#define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */ |
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#define HPEE_SLOT_INFO(slot) (20+(48*slot)) |
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struct eeprom_header |
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{ |
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u_int32_t num_writes; /* number of writes */ |
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u_int8_t flags; /* flags, usage? */ |
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u_int8_t ver_maj; |
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u_int8_t ver_min; |
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u_int8_t num_slots; /* number of EISA slots in system */ |
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u_int16_t csum; /* checksum, I don't know how to calculate this */ |
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u_int8_t pad[10]; |
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} __attribute__ ((packed)); |
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struct eeprom_eisa_slot_info |
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{ |
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u_int32_t eisa_slot_id; |
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u_int32_t config_data_offset; |
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u_int32_t num_writes; |
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u_int16_t csum; |
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u_int16_t num_functions; |
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u_int16_t config_data_length; |
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/* bits 0..3 are the duplicate slot id */ |
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#define HPEE_SLOT_INFO_EMBEDDED 0x10 |
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#define HPEE_SLOT_INFO_VIRTUAL 0x20 |
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#define HPEE_SLOT_INFO_NO_READID 0x40 |
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#define HPEE_SLOT_INFO_DUPLICATE 0x80 |
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u_int8_t slot_info; |
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#define HPEE_SLOT_FEATURES_ENABLE 0x01 |
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#define HPEE_SLOT_FEATURES_IOCHK 0x02 |
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#define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80 |
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u_int8_t slot_features; |
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u_int8_t ver_min; |
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u_int8_t ver_maj; |
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#define HPEE_FUNCTION_INFO_HAVE_TYPE 0x01 |
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#define HPEE_FUNCTION_INFO_HAVE_MEMORY 0x02 |
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#define HPEE_FUNCTION_INFO_HAVE_IRQ 0x04 |
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#define HPEE_FUNCTION_INFO_HAVE_DMA 0x08 |
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#define HPEE_FUNCTION_INFO_HAVE_PORT 0x10 |
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#define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20 |
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/* I think there are two slighty different |
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* versions of the function_info field |
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* one int the fixed header and one optional |
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* in the parsed slot data area */ |
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#define HPEE_FUNCTION_INFO_HAVE_FUNCTION 0x01 |
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#define HPEE_FUNCTION_INFO_F_DISABLED 0x80 |
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#define HPEE_FUNCTION_INFO_CFG_FREE_FORM 0x40 |
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u_int8_t function_info; |
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#define HPEE_FLAG_BOARD_IS_ISA 0x01 /* flag and minor version for isa board */ |
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u_int8_t flags; |
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u_int8_t pad[24]; |
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} __attribute__ ((packed)); |
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#define HPEE_MEMORY_MAX_ENT 9 |
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/* memory descriptor: byte 0 */ |
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#define HPEE_MEMORY_WRITABLE 0x01 |
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#define HPEE_MEMORY_CACHABLE 0x02 |
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#define HPEE_MEMORY_TYPE_MASK 0x18 |
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#define HPEE_MEMORY_TYPE_SYS 0x00 |
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#define HPEE_MEMORY_TYPE_EXP 0x08 |
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#define HPEE_MEMORY_TYPE_VIR 0x10 |
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#define HPEE_MEMORY_TYPE_OTH 0x18 |
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#define HPEE_MEMORY_SHARED 0x20 |
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#define HPEE_MEMORY_MORE 0x80 |
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/* memory descriptor: byte 1 */ |
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#define HPEE_MEMORY_WIDTH_MASK 0x03 |
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#define HPEE_MEMORY_WIDTH_BYTE 0x00 |
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#define HPEE_MEMORY_WIDTH_WORD 0x01 |
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#define HPEE_MEMORY_WIDTH_DWORD 0x02 |
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#define HPEE_MEMORY_DECODE_MASK 0x0c |
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#define HPEE_MEMORY_DECODE_20BITS 0x00 |
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#define HPEE_MEMORY_DECODE_24BITS 0x04 |
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#define HPEE_MEMORY_DECODE_32BITS 0x08 |
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/* byte 2 and 3 are a 16bit LE value |
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* containing the memory size in kilobytes */ |
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/* byte 4,5,6 are a 24bit LE value |
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* containing the memory base address */ |
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#define HPEE_IRQ_MAX_ENT 7 |
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/* Interrupt entry: byte 0 */ |
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#define HPEE_IRQ_CHANNEL_MASK 0xf |
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#define HPEE_IRQ_TRIG_LEVEL 0x20 |
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#define HPEE_IRQ_MORE 0x80 |
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/* byte 1 seems to be unused */ |
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#define HPEE_DMA_MAX_ENT 4 |
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/* dma entry: byte 0 */ |
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#define HPEE_DMA_CHANNEL_MASK 7 |
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#define HPEE_DMA_SIZE_MASK 0xc |
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#define HPEE_DMA_SIZE_BYTE 0x0 |
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#define HPEE_DMA_SIZE_WORD 0x4 |
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#define HPEE_DMA_SIZE_DWORD 0x8 |
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#define HPEE_DMA_SHARED 0x40 |
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#define HPEE_DMA_MORE 0x80 |
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/* dma entry: byte 1 */ |
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#define HPEE_DMA_TIMING_MASK 0x30 |
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#define HPEE_DMA_TIMING_ISA 0x0 |
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#define HPEE_DMA_TIMING_TYPEA 0x10 |
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#define HPEE_DMA_TIMING_TYPEB 0x20 |
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#define HPEE_DMA_TIMING_TYPEC 0x30 |
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#define HPEE_PORT_MAX_ENT 20 |
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/* port entry byte 0 */ |
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#define HPEE_PORT_SIZE_MASK 0x1f |
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#define HPEE_PORT_SHARED 0x40 |
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#define HPEE_PORT_MORE 0x80 |
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/* byte 1 and 2 is a 16bit LE value |
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* containing the start port number */ |
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#define HPEE_PORT_INIT_MAX_LEN 60 /* in bytes here */ |
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/* port init entry byte 0 */ |
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#define HPEE_PORT_INIT_WIDTH_MASK 0x3 |
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#define HPEE_PORT_INIT_WIDTH_BYTE 0x0 |
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#define HPEE_PORT_INIT_WIDTH_WORD 0x1 |
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#define HPEE_PORT_INIT_WIDTH_DWORD 0x2 |
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#define HPEE_PORT_INIT_MASK 0x4 |
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#define HPEE_PORT_INIT_MORE 0x80 |
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#define HPEE_SELECTION_MAX_ENT 26 |
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#define HPEE_TYPE_MAX_LEN 80 |
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#endif
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