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24 lines
679 B
24 lines
679 B
J-Core Programmable Interval Timer and Clocksource |
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Required properties: |
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- compatible: Must be "jcore,pit". |
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- reg: Memory region(s) for timer/clocksource registers. For SMP, |
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there should be one region per cpu, indexed by the sequential, |
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zero-based hardware cpu number. |
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- interrupts: An interrupt to assign for the timer. The actual pit |
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core is integrated with the aic and allows the timer interrupt |
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assignment to be programmed by software, but this property is |
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required in order to reserve an interrupt number that doesn't |
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conflict with other devices. |
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Example: |
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timer@200 { |
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compatible = "jcore,pit"; |
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reg = < 0x200 0x30 0x500 0x30 >; |
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interrupts = < 0x48 >; |
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};
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